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293 results on '"Grosse, Daniel"'

256. Acceleration of SAT-Based Iterative Property Checking.

Author

Borrione, Dominique, Paul, Wolfgang, Große, Daniel, and Drechsler, Rolf

Abstract

Formal property checking is used to check whether a circuit satisfies a temporal property or not. An important goal during the development of properties is the formulation of general proofs. Since assumptions of properties define the situations under which the commitments are checked, in order to obtain general proofs assumptions should be made as general as possible. In practice this is accomplished iteratively by generalizing the assumptions step by step. Thus, the veri.cation engineer may start with strong assumptions and weakens them gradually. In this paper we propose a new approach to speed up SAT-based iterative property checking. This process can be exploited by reusing conflict clauses in the corresponding SAT instances of consecutive property checking problems. By this the search space is pruned, since recomputations of identical conflicts are avoided. [ABSTRACT FROM AUTHOR]

Published
2005
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257. LESER FORUM.

Author

Grosse, Daniel and Pütter-Haux, Christiane

Published
2023

258. Equivalence Checking of Reversible Circuits.

Author

WILLE, ROBERT, GROSSE, DANIEL, MILLER, D. MICHAEL, and DRECHSLER, ROLF

Subjects
MATHEMATICAL equivalence, QUANTUM computing, COMPLEMENTARY metal oxide semiconductors, REVERSIBLE computing, CODING theory
Abstract

Reversible logic has become an intensely studied research subject due to its application in areas such as quantum computation and low power design. In contrast to traditional CMOS circuits, reversible logic is subject to important restrictions in that fanout and feedback are not allowed. As a result, a new gate library and circuit structure are required. This affects the design flow which has to be reorganized and in which single steps need considerable modification to support reversible logic. In this paper, circuit equivalence checking is considered in detail. The goal is to show that two reversible circuits are equivalent with respect to a common target functionality which may include dont-care conditions. The paper explores well-known techniques from irreversible equivalence checking and how those techniques can be applied to reversible circuits. Two approaches are proposed. The first employs decision diagram techniques and the second uses Boolean satisfiability. In particular, we consider how circuits obtained from different reversible embeddings of the same irreversible target function can be checked. Experimental results show that for both methods, circuits with up to 27,000 gates, as well as adders with more than 100 inputs and outputs, are handled in under three minutes with reasonable memory requirements. [ABSTRACT FROM AUTHOR]

Published
2012

259. Exact Synthesis of Elementary Quantum Gate Circuits.

Author

Große, Daniel, Wille, Robert, Dueck, Gerhard W., and Drechsler, Rolf

Subjects
LOGIC circuits, SUBROUTINES (Computer programs), QUANTUM computers, ALGORITHMS, BOOLEAN matrices
Abstract

Compact realizations of reversible logic functions are of interest in the design of quantum computers. In this paper we present an exact synthesis algorithm, based on Boolean Satisfiability (SAT), that finds the minimal elementary quantum gate realization for a given reversible function. Since these gates work in terms of qubits, a multi-valued encoding is proposed. Don't care conditions appear in many reversible functions. Constant inputs are often required when a function is embedded into a reversible one. The proposed algorithm takes full advantage of don't care conditions and automatically sets the constant inputs to their optimal values. The effectiveness of the algorithm is shown on a set of benchmark functions. [ABSTRACT FROM AUTHOR]

Published
2009

260. Exact Multiple-Control Toffoli Network Synthesis With SAT Techniques.

Author

Große, Daniel, Wille, Robert, Dueck, Gerhard W., and Drechsler, Rolf

Subjects
*QUANTUM computers, *COMPUTERS, *COMPUTER logic, *COMPUTER programming, *INTEGRATED circuits, *GATE array circuits, *OPTICAL computing
Abstract

Synthesis of reversible logic has become a very important research area in recent years. Applications can be found in the domain of low-power design, optical computing, and quantum computing. In the past, several approaches have been introduced that synthesize reversible networks with respect to a given function. Most of these methods only approximate a minimal network representation. In this paper, exact algorithms for the synthesis of multiple-control Toffoli networks are presented, i.e., algorithms that guarantee to find a network with the minimal number of gates. Our iterative algorithms formulate the synthesis problem as a sequence of decision problems. The decision problems are encoded as Boolean satisfiability (SAT) or SAT modulo theory (SMT) instances, respectively. As soon as one of these instances becomes satisfiable, a Toffoli network representation for the given function has been found. We show that choosing the encoding for synthesis is crucial for the resulting runtimes. Furthermore, we discuss the principal limits of the SAT and SMT approaches. To overcome these limits, we propose a method using problem-specific knowledge during synthesis. In addition, better embeddings to make irreversible functions reversible are considered. For the resulting synthesis problems, an improvement is presented that reduces the overall runtime by automatically setting the constant inputs to their optimal values. Experimental results on a large set of benchmarks demonstrate the differences between three exact synthesis algorithms. In addition, a comparison with the best-known heuristic results is provided. In summary, the results show that, for some benchmarks, the heuristic approaches have already found the minimal network, while for other benchmarks, significantly smaller networks exist. [ABSTRACT FROM AUTHOR]

Published
2009

263. Amphipods

Author

Grosse, Daniel J., Pauley, Gilbert B., and Moran, David

Subjects
Pacific Ocean, amphipods, Oceanography, Biology
Abstract

(PDF contains 24 pages) Series: United States. Army Corps of Engineers, TR EL-82-4 Performed for Coastal Ecology Group, Waterways Experiment Station, U. S. Army Corps of Engineers Vicksburg, MS 39180 and National Coastal Ecosystems Team, Division of Biological Services, Research and Development, Fish and Wildlife Service U.S. Department if the Interior Washington, DC 20240

Published
1989

264. Amphipods

Author

Grosse, Daniel J., Pauley, Gilbert B., and Moran, David

Subjects
amphipods, Oceanography, Biology
Abstract

This report wi11 focus largely on the subordersGammaridea, Caprellidea, and Hyperiidea because of their importance in coastal areas of the northeast Pacific Ocean. (PDF contains 27 pages) Series: United States. Army Corps of Engineers, TR EL-82-4 Performed for Coastal Ecology Group, Waterways Experiment Station, U. S. Army Corps of Engineers Vicksburg, MS 39180 and National Coastal Ecosystems Team, Division of Biological Services, Research and Development, Fish and Wildlife Service U.S. Department if the Interior Washington, DC 20240

Published
1986

265. Species Profiles: Life Histories and Environmental Requirements of Coastal Fishes and Invertebrates (Pacific Southwest): Amphipods

Author

WASHINGTON COOPERATIVE FISHERY RESEARCH UNIT SEATTLE, Grosse, Daniel J., Pauley, Gilbert B., WASHINGTON COOPERATIVE FISHERY RESEARCH UNIT SEATTLE, Grosse, Daniel J., and Pauley, Gilbert B.

Abstract

This species profile is one of a series on coastal aquatic organisms, principally fish, of sport, commercial, or ecological importance. The profiles are designed to provide coastal managers, engineers, and biologists with a brief comprehensive sketch of the biological characteristics and environmental requirements of the species and to describe how populations of the species may be expected to react to environmental changes caused by coastal development. Each profile has sections on taxonomy, life history, ecological role, environmental requirements, and economic importance, if applicable. This report focuses largely on the suborders Gammaridea and Hyperiidea because of their importance in coastal waters of the Pacific coast region of the Southwestern United States. Many of the California amphipod species are ubiquitous along the Pacific coast and extend northward into Oregon and Washington and southward into Baja California. Gammaridea are the most abundant and diverse group of amphipods. Keywords: Crsutacea, Reproduction physiology, Fecundity, Growth physiology, Fisheries, Dissolved oxygen, Salinity, Temperature, Water pollution, Dredging.

Published
1989

266. Species Profiles. Life Histories and Environmental Requirements of Coastal Fishes and Invertebrates (Pacific Northwest). Amphipods.

Author

WASHINGTON COOPERATIVE FISHERY RESEARCH UNIT SEATTLE, Grosse,Daniel J, Pauley,Gilbert B, Moran,David, WASHINGTON COOPERATIVE FISHERY RESEARCH UNIT SEATTLE, Grosse,Daniel J, Pauley,Gilbert B, and Moran,David

Abstract

This species profile is one of a series on coastal aquatic organisms, principally fish, of sport, commercial, or ecological importance. The profiles are designed to provide coastal managers, engineers, and biologists with a brief comprehensive sketch of the biological characteristics and environmental requirements of the species and to describe how populations of the species may be expected to react to environmental changes caused by coastal development. Each profile has sections on taxonomy, life history, ecological role, environmental requirements, and economic importance, if applicable. Keywords: Amphipods; Amphipoda; Crustacea; Life Cycles; Habitats; Reproduction; Marine biology.

Published
1986

267. Approximate BDD Optimization with Prioritized epsilon-Preferred Evolutionary Algorithm

Author

Shirinzadeh, Saeideh, Soeken, Mathias, Grosse, Daniel, Drechsler, Rolf, and Friedrich, T

Subjects
BDD approximation, epsilon-preferred evolutionary algorithm
Abstract

Approximate computing has gained high attention in various applications that can benefit from a reduction in costs by lowering the accuracy. In this paper we present an optimization approach for functional approximation of Binary Decision Diagrams (BDDs) which are known for their widespread applications in electronic design automation and formal verification. We propose a three-objective epsilon-preferred evolutionary algorithm with the first objective set to the BDD size which is given higher priority to the two other objectives set to errors caused by approximation. This is highly demanded by the application to ensure that the minimum size for the approximated BDD is accessible when the error metrics meet certain threshold values. While BDD size minimization is guaranteed by incorporating priority, the use of epsilon in the proposed approach ensures to guide the search towards desired error values in parallel. Experiments confirm the efficiency of the proposed approach by a size improvement of 64.24% at a fair cost of 3.86% inaccuracy on average.

268. Formal Verification of Integer Multipliers by Combining Gröbner Basis with Logic Reduction

Author

Sayed-Ahmed, Amr, Grosse, Daniel, Kühne, Ulrich, and Soeken, Mathias

Subjects
Computer Science::Hardware Architecture, ComputingMethodologies_SYMBOLICANDALGEBRAICMANIPULATION, Hardware_ARITHMETICANDLOGICSTRUCTURES
Abstract

Formal verification utilizing symbolic computer algebra has demonstrated the ability to formally verify large Galois field arithmetic circuits and basic architectures of integer arithmetic circuits. The technique models the circuit as Gröbner basis polynomials and reduces the polynomial equation of the circuit specification wrt. the polynomials model. However, during the Gröbner basis reduction, the technique suffers from exponential blow-up in the size of the polynomials, if it is applied on parallel adders and recoded multipliers. In this paper, we address the reasons of this blow-up and present an approach that allows to apply the technique on basic and complex parallel architectures of multipliers. The approach is based on applying a logic reduction rule during Gröbner basis rewriting. The rule uses structural circuit information to remove terms that evaluate to zero before their blow-up. The experiments show that the approach is applicable up to 128 bit multipliers.

272. LBSD 2: Architectural aspects in models and languages.

Author

Grosse, Daniel and Radetzki, Martin

Abstract

Each abstraction level in the design process has an architectural view that takes into account the specifics of the implementation building blocks at that level. This session is devoted to such architectural aspects. It deals with the programming of homogeneous manycore systems, the modeling of heterogeneous virtual system platforms, and the language-based design of reversible logic. [ABSTRACT FROM PUBLISHER]

Published
2012

281. AADD-Based Symbolic Simulation of SystemC AMS

Author

Zivkovic, Carna, Grimm, Christoph, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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282. Safe Interoperability for Web of Things Devices and Systems

Author

Korkan, Ege, Kaebisch, Sebastian, Kovatsch, Matthias, Steinhorst, Sebastian, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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283. A New Ageing-Aware Approach via Path Isolation

Author

Lu, Yue, Duan, Shengyu, Kazmierski, Tom J., Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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284. Blech, Imperative Synchronous Programming!

Author

Gretz, Friedrich, Grosch, Franz-Josef, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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285. SystemC Coding Guideline for Faster Out-of-Order Parallel Discrete Event Simulation

Author

Cheng, Zhongqi, Schmidt, Tim, Dömer, Rainer, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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286. Generation of Functional Mockup Units for Transactional Cyber-Physical Virtual Platforms

Author

Centomo, Stefano, Lora, Michele, Fummi, Franco, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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287. Automatic Design of Microfluidic Devices: An Overview of Platforms and Corresponding Design Tasks

Author

Wille, Robert, Li, Bing, Drechsler, Rolf, Schlichtmann, Ulf, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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288. Time in SCCharts

Author

Schulz-Rosengarten, Alexander, von Hanxleden, Reinhard, Mallet, Frédéric, de Simone, Robert, Deantoni, Julien, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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289. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions

Author

Kalsing, Arthur, Fesquet, Laurent, Aktouf, Chouki, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Ruediger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Große, Daniel, editor, Vinco, Sara, editor, and Patel, Hiren, editor

Published
2019
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290. Language and Hardware Acceleration Backend for Graph Processing

Author

Mokhov, Andrey, Gennaro, Alessandro de, Tarawneh, Ghaith, Wray, Jonny, Lukyanov, Georgy, Mileiko, Sergey, Scott, Joe, Yakovlev, Alex, Brown, Andrew, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Ruediger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Große, Daniel, editor, Vinco, Sara, editor, and Patel, Hiren, editor

Published
2019
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291. Symbolic Simulation of Dataflow Synchronous Programs with Timers

Author

Baudart, Guillaume, Bourke, Timothy, Pouzet, Marc, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Ruediger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Große, Daniel, editor, Vinco, Sara, editor, and Patel, Hiren, editor

Published
2019
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292. Fault Analysis in Analog Circuits Through Language Manipulation and Abstraction

Author

Fraccaroli, Enrico, Stefanni, Francesco, Fummi, Franco, Zwolinski, Mark, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Ruediger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Große, Daniel, editor, Vinco, Sara, editor, and Patel, Hiren, editor

Published
2019
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293. Automatic Integration of HDL IPs in Simulink Using FMI and S-Function Interfaces

Author

Centomo, Stefano, Lora, Michele, Portaluri, Antonio, Stefanni, Francesco, Fummi, Franco, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Ruediger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Große, Daniel, editor, Vinco, Sara, editor, and Patel, Hiren, editor

Published
2019
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