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This paper presents a low-power analog-to-time converter (ATC) for integrated bio-sensors. The proposed circuit facilitates the direct conversion of electrode bio-potential recordings into time-encoded digital pulses with high efficiency without prior signal amplification. This approach reduces the circuit complexity for multi-channel instrumentation systems and allows asynchronous digital control to maximize the potential power savings during sensor inactivity. A prototype fabricated using a 65-nm CMOS technology is demonstrated with measured characteristics. Experimental results show an input-referred noise figure of 3.8 $\mu V_{\mathrm{ rms}}$ for a 11-kHz signal bandwidth while dissipating 1.2 $\mu \text{W}$ from a 0.5-V supply and occupying $60\times 80\,\,\mu \text{m}\,\,^{\mathrm{ 2}}$ silicon area. This compact configuration is enabled by the proposed asynchronous readout that shapes the mismatch components arising from the multi-bit quantizer and the use of capacitive feedback.

The instrumentation systems for implantable brain–machine interfaces represent one of the most demanding applications for ultra low-power analogue-to-digital-converters (ADC) to date. To address this challenge, this paper proposes a $\Delta \Sigma $ SAR topology for very large sensor arrays that allows an exceptional reduction in silicon footprint by using a continuous time 0–2MASH topology. This configuration uses a specialized FIR window to decimate the $\Delta \Sigma $ modulator output and reject mismatch errors from the SAR quantizer, which mitigates the overhead from dynamic element matching techniques commonly used to achieve high precision. A fully differential prototype was fabricated using $0.18\,\mu $ m CMOS to demonstrate 10.8 ENOB precision with a 0.016 mm2 silicon footprint. Moreover, a 14fJ/conv figure-of-merit can be achieved, while resolving signals with the maximum input amplitude of ±1.2 Vpp sampled at 200 kS/s. The ADC topology exhibits a number of promising characteristics for both high speed and ultra low-power systems due to the reduced complexity, switching noise, sampling load, and oversampling ratio, which are critical parameters for many sensor applications.

This paper describes an on-chip interface for recovering power and providing full-duplex communication over an AC-coupled 4-wire lead between active implantable devices. The target application requires two modules to be implanted in the brain (cortex) and upper chest; connected via a subcutaneous lead. The brain implant consists of multiple identical “optrodes” that facilitate a bidirectional neural interface (electrical recording and optical stimulation), and the chest implant contains the power source (battery) and processor module. The proposed interface is integrated within each optrode ASIC allowing full-duplex and fully-differential communication based on Manchester encoding. The system features a head-to-chest uplink data rate (up to 1.6 Mbps) that is higher than that of the chest-to-head downlink (100 kbps), which is superimposed on a power carrier. On-chip power management provides an unregulated 5-V dc supply with up to 2.5-mA output current for stimulation, and two regulated voltages (3.3 and 3 V) with 60-dB power supply rejection ratio for recording and logic circuits. The 4-wire ASIC has been implemented in a 0.35-\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{upgreek} \usepackage{mathrsfs} \setlength{\oddsidemargin}{-69pt} \begin{document} }{}$\mu \text{m}$ \end{document} CMOS technology, occup-ying a 1.5-mm2 silicon area, and consumes a quiescent current of \documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{upgreek} \usepackage{mathrsfs} \setlength{\oddsidemargin}{-69pt} \begin{document} }{}$91.2~\mu \text{A}$ \end{document}. The system allows power transmission with measured efficiency of up to 66% from the chest to the brain implant. The downlink and uplink communication are successfully tested in a system with two optrodes and through a 4-wire implantable lead.

Objective: This paper describes the design, testing and use of a novel multichannel block-capable stimulator for acute neurophysiology experiments to study highly selective neural interfacing techniques. This paper demonstrates the stimulator's ability to excite and inhibit nerve activity in the rat sciatic nerve model concurrently using monophasic and biphasic nerve stimulation as well as high-frequency alternating current (HFAC). Approach: The proposed stimulator uses a Howland Current Pump circuit as the main analogue stimulator element. 4 current output channels with a common return path were implemented on printed circuit board using Commercial Off-The-Shelf components. Programmable operation is carried out by an ARM Cortex-M4 Microcontroller on the Freescale freedom development platform (K64F). Main Results: This stimulator design achieves +-10 mA of output current with +-15V of compliance and less than 6 uA of resolution using a quad-channel 12-bit external DAC, for four independently driven channels. This allows the stimulator to carry out both excitatory and inhibitory (HFAC block) stimulation. DC Output impedance is above 1 Mohm. Overall cost is less than USD 450 or GBP 350 and device size is approximately 9 cm x 6 cm x 5 cm. Significance: Experimental neurophysiology often requires significant investment in bulky equipment for specific stimulation requirements, especially when using HFAC block. Different stimulators have limited means of communicating with each other, making protocols more complicated. This device provides an effective solution for multi-channel stimulation and block of nerves, enabling studies on selective neural interfacing in acute scenarios with an affordable, portable and space-saving design for the laboratory. The stimulator can be further upgraded with additional modules to extend functionality while maintaining straightforward programming and integration of functions with one controller.

Heart rate variability (HRV), as measured by ultra-wideband (UWB) radar, enables contactless monitoring of physiological functioning in the human body. In the current study, we verified the reliability of HRV extraction from radar data, under limited transmitter power. In addition, we conducted a feasibility study of mental state classification from HRV data, measured using radar. Specifically, arctangent demodulation with calibration and low rank approximation have been used for radar signal pre-processing. An adaptive continuous wavelet filter and moving average filter were utilized for HRV extraction. For the mental state classification task, performance of support vector machine, k-nearest neighbors and random forest classifiers have been compared. The developed system has been validated on human participants, with 10 participants for HRV extraction, and three participants for the proof-of-concept mental state classification study. The results of HRV extraction demonstrate the reliability of time-domain parameter extraction from radar data. However, frequency-domain HRV parameters proved to be unreliable under low SNR. The best average overall mental state classification accuracy achieved was 82.34%, which has important implications for the feasibility of mental health monitoring using UWB radar.

Designing systems with many recording channels is a major challenge in brain-machine interfaces. Power, bandwidth, and size requirements impose tight design constraints for implementing the required processing within an acceptable latency and battery life. Moreover, the variety of brain decoding algorithms require highly versatile systems that can be rapidly adapted to execute different tasks from experiment to experiment as for example microcontrollers (MCUs). However, state of the art MCUs lack of performance and consume too much power to be used as generic platforms for neural decoding applications. To overcome the aforementioned limitations, this paper presents an MCU-based system consisting of a 64-channel event-based neural interface and a Parallel Ultra-Low-Power (PULP) platform that acquires and processes the neural activity. The flexibility of the system (called Neuro-PULP) has been demonstrated through the deployment of two applications: one compressing raw data in streaming mode for wireless transmission, and one generating the cluster and time-stamp of detected spikes, leveraging a low-power event-mode. The event-based approach, coupled with the energy efficiency of the PULP architecture, leads to a more than 4x improvement in energy efficiency with respect to state of the art systems based on FPGAs, leading to the average power consumption of $114 \mu \mathrm {W} /$channel, yet retaining the flexibility of fully programmable processor-based architectures.

The ability to acquire realtime diagnostics of brain tissue intraoperatively represents a key goal in the field of brain tumour neurosurgery. This can greatly enhance the precision, extent and effectiveness of key surgical procedures such as those performed for brain tumour resection and biopsy. To achieve this requires a miniature, handheld tool which can perform intraoperative in situ, in-vivo characterisation of different types of tissues e.g. normal brain tissue versus tumour tissue. Here we explored the feasibility and requirements of implementing a portable impedance characterisation system for brain tumour detection. We proposed and implemented a novel system based on PCB-based instrumentation using a square four-electrode microendoscopic probe. The system uses a digital-to-analogue converter to generate a multi-tone sinusoid waveform, and a floating bi-directional voltage-to-current converter to output the differential stimulation current to one pair of electrodes. The other pair of electrodes are connected to the sensing circuit based on an instrumentation amplifier. The recorded data is pre-processed by the micro-controller and then analysed on a host computer. To evaluate the system, tetrapolar impedances have been recorded from a number of different electrode configurations to sense pre-defined resistance values. The overall system consumed 143mA current, achieved 0.1% linearity and 15µV noise level, with a maximum signal bandwidth of 100kHz. Initial experimental results on tissue were carried out on a piece of rib-eye steak. Electrical impedance maps (EIM) and contour plots were then reconstructed to represent the impedance value in different tissue region.

Neural interfaces, and more specifically ones of the invasive/implantable variety, today are a topic of much controversy, often making the general public uncomfortable and intimidated. We have thus devised a bespoke interactive demo to help people understand brain implants and their need in the age of wearable devices, with the secondary objective of introducing the wireless cortical neural probe that we, at NGNI (Next Generation Neural Interfaces) lab, are developing.

In recent years, local field potentials (LFPs) have emerged as a promising alternative input signal for brain-machine interfaces (BMIs). Several studies have demonstrated that LFP-based BMIs could provide long-term recording stability and, at the same time, comparable decoding performance to their spike counterparts. However, despite the compelling results, most LFP-based BMIs still make use of hand-crafted features which is a time-consuming process and can be suboptimal. In this paper, we propose an end-to-end system approach based on temporal convolutional network (TCN) to automatically extract features and decode kinematics of hand movements directly from raw LFP signals. We benchmark its decoding performance against traditional approaches incorporating long short-term memory (LSTM) decoders driven by hand-crafted LFP features. Experimental results demonstrate significant performance improvement of the proposed approach compared to the traditional approaches, demonstrating the suitability and the potential of TCN-based end-to-end systems in providing stable and high decoding performance LFP-based BMIs.

Sleep serves an underlying function in mammals that appears to be essential for life, but despite decades of research, this function and a large part of the neuronal circuitry underlying its control, are little understood. To conduct research in this field, many devices capable of recording neural signals such as LFP and EEG have been developed. However, due to their size and weight, most of these devices are unsuitable for sleep studies in mice, the most commonly used animals. This paper presents a novel 4 channel, compact (2.1cm by 1.7cm) and lightweight (3.6g) neural-logging device that can record for 3 days on just two 0.6g zinc air 312 batteries. Instead of the typical solution of using multiple platforms, the presented device integrates high resolution EEG, EMG and temperature recordings into one platform. The onboard BLE module allows the device to be controlled wirelessly as well as stream data in real time, enabling researchers to check the progress of the recording with minimal animal disturbance. The device is able to accurately record EEG and temperature data through long 24 hour in-vivo recordings conducted. The obtained EEG data could be easily sleep scored and the temperature values were all within the expected physiological range.

Coherent ultra-wideband (UWB) radar-on-chip technology shows great promise for developing portable and low-cost medical imaging and monitoring devices. Particularly monitoring the mechanical functioning of the cardiovascular system is of interest, due to the ability of radar systems to track sub-mm motion inside the body at a high speed. For imaging applications, UWB radar systems are required, but there are still significant challenges with in-body sensing using low-power microwave equipment and wideband signals. Recently it was shown for the first time, on a single subject, that the arterial pulse wave can be measured at various locations in the body, using coherent UWB radar-on-chip technology. The current work provides more substantial evidence, in the form of new measurements and improved methods, to demonstrate that cardiovascular dynamics can be measured using radar-on-chip. Results across four participants were found to be robust and repeatable. Cardiovascular signals were recorded using radar-on-chip systems and electrocardiography (ECG). Through ECG-aligned averaging, the arterial pulse wave could be measured at a number of locations in the body. Pulse arrival time could be determined with high precision, and blood pressure pulse wave propagation through different arteries was demonstrated. In addition, cardiac dynamics were measured from the chest. This work serves as a first step in developing a portable and low-cost device for long-term monitoring of the cardiovascular system, and provides the fundamentals necessary for developing UWB radar-on-chip imaging systems.

This paper presents a novel analogue to digital converter using an oscillator-based loop filter for high-dynamic range bio-sensing applications. This is the first third-order feedforward ΔΣ modulator that strictly uses time domain integration for quantisation noise shaping. Furthermore we propose a new asynchronous extended-phase detection technique that increases the resolution of the 4 bit phase quantiser by another 5 bits to significantly improve both dynamic range and reduce the noise-shaping requirements. Preliminary simulation results show that this type of loop-filter can virtually prevent integrator saturation and achieves a peak 88 dB SNDR for kHz signals. The proposed system has been implemented using a 180 nm CMOS technology occupying 0.102 mm 2 and consumes 13.7 μW of power to digitise the 15 kHz signal bandwidth using a 2 MHz sampling clock.

Brain machine interfaces notoriously face difficulties in achieving long term implanted recording stability. It has been shown that damage and inflammation, caused during insertion by electrodes that are too large and stiff, provoke a sustained inflammatory tissue response. This is commonly referred to as the foreign body response, resulting in encapsulation and thus increased electrode impedance over time. Accordingly, neural interfaces with ever smaller and more flexible electrodes are continually in development, but unfortunately face challenges of their own, first and foremost of which is buckling and bending during insertion. This work presents the development of a prototype insertion method, comprising an insertion device and novel probe architecture, that promotes straight insertion without buckling, while simultaneously minimizing the insertion force for multi-microwire electrode probes. When compared against insertion of probes with unsupported free electrodes, the prototype method achieved significantly straighter electrode insertion, resulting in both a smaller distance between electrode recording tips and a greater average insertion depth. While achieving less straight insertion than probes with sucrose coated electrodes, a common technique for promoting reliable insertion without buckling, the tested method was able to maintain significantly lower insertion forces.

Objective. Brain–machine interfaces (BMIs) seek to restore lost motor functions in individuals with neurological disorders by enabling them to control external devices directly with their thoughts. This work aims to improve robustness and decoding accuracy that currently become major challenges in the clinical translation of intracortical BMIs. Approach. We propose entire spiking activity (ESA)—an envelope of spiking activity that can be extracted by a simple, threshold-less, and automated technique—as the input signal. We couple ESA with deep learning-based decoding algorithm that uses quasi-recurrent neural network (QRNN) architecture. We evaluate comprehensively the performance of ESA-driven QRNN decoder for decoding hand kinematics from neural signals chronically recorded from the primary motor cortex area of three non-human primates performing different tasks. Main results. Our proposed method yields consistently higher decoding performance than any other combinations of the input signal and decoding algorithm previously reported across long-term recording sessions. It can sustain high decoding performance even when removing spikes from the raw signals, when using the different number of channels, and when using a smaller amount of training data. Significance. Overall results demonstrate exceptionally high decoding accuracy and chronic robustness, which is highly desirable given it is an unresolved challenge in BMIs.

This paper reports a novel medication release and delivery mechanism as part of a next generation wireless capsule endoscope (WCE) for targeted drug delivery. This subsystem occupies a volume of only 17.9mm3 for the purpose of delivering a 1 ml payload to a target site of interest in the small intestinal tract. An in-depth analysis of the method employed to release and deliver the medication is described and a series of experiments is presented which validates the drug delivery system. The results show that a variable pitch conical compression spring manufactured from stainless steel can deliver 0.59 N when it is fully compressed and that this would be sufficient force to deliver the onboard medication.

Objective: This paper describes the design, testing and use of a novel multichannel block-capable stimulator for acute neurophysiology experiments to study highly selective neural interfacing techniques. This paper demonstrates the stimulator's ability to excite and inhibit nerve activity in the rat sciatic nerve model concurrently using monophasic and biphasic nerve stimulation as well as high-frequency alternating current (HFAC). Approach: The proposed stimulator uses a Howland Current Pump circuit as the main analogue stimulator element. 4 current output channels with a common return path were implemented on printed circuit board using Commercial Off-The-Shelf components. Programmable operation is carried out by an ARM Cortex-M4 Microcontroller on the Freescale freedom development platform (K64F). Main Results: This stimulator design achieves +-10 mA of output current with +-15 V of compliance and less than 6 uA of resolution using a quad-channel 12-bit external DAC, for four independently driven channels. This allows the stimulator to carry out both excitatory and inhibitory (HFAC block) stimulation. DC Output impedance is above 1 Mohm. Overall cost for materials i.e. PCB boards and electronic components is less than USD 450 or GBP 350 and device size is approximately 9 cm x 6 cm x 5 cm. Significance: Experimental neurophysiology often requires significant investment in bulky equipment for specific stimulation requirements, especially when using HFAC block. Different stimulators have limited means of communicating with each other, making protocols more complicated. This device provides an effective solution for multi-channel stimulation and block of nerves, enabling studies on selective neural interfacing in acute scenarios with an affordable, portable and space-saving design for the laboratory. The stimulator can be further upgraded with additional modules to extend functionality while maintaining straightforward programming and integration of functions with one controller. Additionally, all source files including all code and PCB design files are freely available to the community to use and further develop.

In this paper we report on the fabrication, implementation and experimental characterization of an integrated bidirectional communication System-on-Chip (SoC) for transcutaneous bidirectional optical biotelemetry links. The proposed architecture implements a UWB-inspired pulsed coding technique and contains a transmitter and a receiver to achieve a simultaneous bidirectional link. The transmitter generates sub-nanosecond current pulses to directly drive off-chip pulsed vertical cavity semiconductor lasers by means of a digital data coding subsystem and all the needed bias and driving circuits. On the other hand, the receiver manages off-chip fast Si photodiodes and includes signal conditioning, detection and digital data decoding circuits to support high bit rate and energy efficient communication links. The entire solution designed at transistor level has been fabricated in AMS 0.35µm standard CMOS technology into a compact silicon footprint lower than 0.13mm2 employing only 113 transistors and 1 resistor. A specific PCB has been developed together with a suitable test bench implemented on Xilinx Virtex-6 XC6VLX240T FPGA board to properly evaluate the performances and the main characteristics of the ASIC. Furthermore, a 6 GHz, 20 GS/s LeCroy WaveMaster 8600A digital oscilloscope has been employed to investigate the system time response. Preliminary experimental results validated the correct functionality of the overall integrated system demonstrating also its capability to operate, also in a bidirectional mode, at bit rates up to 250 Mbps with pulse widths up to 1.2ns and a minimum total power efficiency of about 160 pJ/bit in the conditions for which the transmitter and the receiver work simultaneously onto the same chip. These results make the developed solution suitable for high performances bidirectional optical biotelemetry links to be applied, e.g., to implantable neural recording/stimulation transcutaneous platforms that generally require communication channels with high up- e down-link bit rates at extremely low energy levels.

Local field potential (LFP) has gained increasing interest as an alternative input signal for brain-machine interfaces (BMIs) due to its informative features, long-term stability, and low frequency content. However, despite these interesting properties, LFP-based BMIs have been reported to yield low decoding performances compared to spike-based BMIs. In this paper, we propose a new decoder based on long short-term memory (LSTM) network which aims to improve the decoding performance of LFP-based BMIs. We compare offline decoding performance of the proposed LSTM decoder to a commonly used Kalman filter (KF) decoder on hand kinematics prediction tasks from multichannel LFPs. We also benchmark the performance of LFP-driven LSTM decoder against KF decoder driven by two types of spike signals: single-unit activity (SUA) and multi-unit activity (MUA). Our results show that LFP-driven LSTM decoder achieves significantly better decoding performance than LFP-, SUA-, and MUA-driven KF decoders. This suggests that LFPs coupled with LSTM decoder could provide high decoding performance, robust, and low power BMIs., Comment: Accepted for the 9th International IEEE EMBS Conference on Neural Engineering (NER 2019)

[This corrects the article DOI: 10.1371/journal.pone.0200392.].

Brain Machine Interfaces (BMIs) mostly utilise spike rate as an input feature for decoding a desired motor output as it conveys a useful measure to the underlying neuronal activity. The spike rate is typically estimated by a using non-overlap binning method that yields a coarse estimate. There exist several methods that can produce a smooth estimate which could potentially improve the decoding performance. However, these methods are relatively computationally heavy for real-time BMIs. To address this issue, we propose a new method for estimating spike rate that is able to yield a smooth estimate and also amenable to real-time BMIs. The proposed method, referred to as Bayesian adaptive kernel smoother (BAKS), employs kernel smoothing technique that considers the bandwidth as a random variable with prior distribution which is adaptively updated through a Bayesian framework. With appropriate selection of prior distribution and kernel function, an analytical expression can be achieved for the kernel bandwidth. We apply BAKS and evaluate its impact on of fline BMI decoding performance using Kalman filter. The results show that overlap BAKS improved the decoding performance up to 3.33% and 12.93% compared to overlap and non-overlap binning methods, respectively, depending on the window size. This suggests the feasibility and the potential use of BAKS method for real-time BMIs.

This paper presents a novel chopping method allow- ing suppression of 1/f flicker noise in continuous-time acquisition systems without the need for a fixed-frequency clock, stochasti- cally deriving the chopping signal from the input and hence achieving completely signal-dependent power consumption. The method is analysed, its basis of operation explained and a proof- of-concept implementation presented alongside simulated results demonstrating an increase in achieved SNR of more than 8 dB during acquisition of ECG, EAP and EEG signals.

Recent developments in the design of active im- plantable devices have achieved significant advances, for example, an increased number of recording channels, but too often practical clinical applications are restricted by device longevity. It is important however to complement efforts for increased func- tionality with translational work to develop implant technologies that are safe and reliable to be hosted inside the human body over long periods of time. This paper first examines techniques currently used to evaluate micro-package hermeticity and key challenges, highlighting the need for new, in situ instrumentation that can monitor the encapsulation status over time. Two novel circuits are then proposed to tackle the specific issue of moisture penetration inside a sub-mm, silicon-based package. They both share the use of metal tracks on the different layers of the CMOS stack to measure changes in impedance caused by moisture present in leak cracks or diffused into the oxide layers.

Deep Brain Stimulation (DBS) is a widely used clin- ical therapeutic modality to treat Parkinsons disease refractory symptoms and complications of levodopa therapy. Currently available DBS systems use continuous, open-loop stimulation strategies. It might be redundant and we could extend the battery life otherwise. Recently, robust electrophysiological signatures of Parkinsons disease have been characterized in motor cortex of patients undergoing DBS surgery. Reductions in the beta- gamma Phase-Amplitude coupling (PAC) correlated with symp- tom improvement, and the therapeutic effects of DBS itself. We aim to develop a miniature, implantable and adaptive system, which only stimulates the neural target, when triggered by the output of the appropriate PAC algorithm. As a first step, in this paper we compare published PAC algorithms by using human data intra-operatively recorded from Parkinsonian patients. We then introduce IIR masking for later achieving fast and low- power FPGA implementation of PAC mapping for intra-operative studies. Our closed-loop application is expected to consume significantly less power than current DBS systems, therefore we can increase the battery life, without compromising clinical benefits.

Implantable neural interfaces have evolved in the past decades from stimulation-only devices to closed-loop record- ing and stimulation systems, allowing both for more targeted therapeutic techniques and more advanced prosthetic implants. Emerging applications require multi-module active implantable devices with intrabody power and data transmission. This distributed approach poses a new set of challenges related to inter-module connectivity, functional reliability and patient safety. This paper addresses the ground referencing challenge in active multi-implant systems, with a particular focus on neural recording devices. Three different grounding schemes (passive, drive, and sense) are presented and evaluated in terms of both recording reliability and patient safety. Considerations on the practical implementation of body potential referencing circuitry are finally discussed, with a detailed analysis of their impact on the recording performance.

This paper reports on the implementation and characterisation of a thermally controlled device for in vitro biomedical applications, based on standard Printed Circuit Board (PCB) technology. This is proposed as a low cost alternative to state-of-the-art microfluidic devices and Lab-on-Chip (LoC) platforms, which we refer to as the thermal Lab-on-PCB concept. In total, six different prototype boards have been manufactured to implement as many mini-hotplate arrays. 3D multiphysics software simulations show the thermal response of the modelled mini-hotplate boards to electrical current stimulation, highlight- ing their versatile heating capability. A comparison with the results obtained by the characterisation of the fabricated PCBs demonstrates the dual temperature sensing/heating property of the mini-hotplate, exploitable in a larger range of temperature with respect to the typical operating range of LoC devices. The thermal system is controllable by means of external off-the-shelf circuitry designed and implemented on a single-channel control board prototype.

High-Frequency alternating current nerve block has great potential for neuromodulation-based therapies. However, no precise measurements have been made of the time needed for nerves to recover from block once the signal has been turned off. This study aims to characterise time to recovery of the rat sciatic nerve after 30 seconds of block at varying amplitudes and frequencies. Experiments were carried out in-vivo to quantify recovery times and recovery completeness within 0.7s from the end of block. The sciatic nerve was blocked with an alternating square wave signal of amplitude and frequency ranging from 2 to 9mA and 10 to 50 kHz respectively. To determine the recovery dynamics the nerve was stimulated at 100 Hz after cessation of the blocking stimulus. Electromyogram signals were measured from the gastrocnemius medialis and tibialis anterior muscles during trials as indicators of nerve function. This allowed for nerve recovery to be measured with a resolution of 10 ms. This resolution is much greater than previous measurements of nerve recovery in the literature. Times for the nerve to recover to a steady state of activity ranged from 20 to 430 milliseconds and final relative recovery activity at 0.7 seconds spanned 0.2 to 1 approximately. Higher blocking signal amplitudes increased recovery time and decreased recovery completeness. These results suggest that blocking signal properties affect nerve recovery dynamics, which could help improve neuromodulation therapies and allow more precise comparison of results across studies using different blocking signal parameters.

Neuromodulation technologies are progressing from pacemaking and sensory operations to full closed-loop control. In particular, optogenetics—the genetic modification of light sensitivity into neural tissue allows for simultaneous optical stimulation and electronic recording. This paper presents a neural interface application-specified integrated circuit (ASIC) for intelligent optoelectronic probes. The architecture is designed to enable simultaneous optical neural stimulation and electronic recording. It provides four low noise (2.08 μ V $_{\text{rms}}$ ) recording channels optimized for recording local field potentials (LFPs) (0.1–300 Hz bandwidth, $\pm$ 5 mV range, sampled 10-bit@4 kHz), which are more stable for chronic applications. For stimulation, it provides six independently addressable optical driver circuits, which can provide both intensity (8-bit resolution across a 1.1 mA range) and pulse-width modulation for high-radiance light emitting diodes (LEDs). The system includes a fully digital interface using a serial peripheral interface (SPI) protocol to allow for use with embedded controllers. The SPI interface is embedded within a finite state machine (FSM), which implements a command interpreter that can send out LFP data whilst receiving instructions to control LED emission. The circuit has been implemented in a commercially available 0.35 μ m CMOS technology occupying a 1.95 mm $\times$ 1.10 mm footprint for mounting onto the head of a silicon probe. Measured results are given for a variety of bench-top, in vitro and in vivo experiments, quantifying system performance and also demonstrating concurrent recording and stimulation within relevant experimental models.

Objective Longitudinal observation of single unit neural activity from large numbers of cortical neurons in awake and mobile animals is often a vital step in studying neural network behaviour and towards the prospect of building effective brain-machine interfaces (BMIs). These recordings generate enormous amounts of data for transmission and storage, and typically require offline processing to tease out the behaviour of individual neurons. Our aim was to create a compact system capable of: (1) reducing the data bandwidth by circa 2 to 3 orders of magnitude (greatly improving battery lifetime and enabling low power wireless transmission in future versions); (2) producing real-time, low-latency, spike sorted data; and (3) long term untethered operation. Approach We have developed a headstage that operates in two phases. In the short training phase a computer is attached and classic spike sorting is performed to generate templates. In the second phase the system is untethered and performs template matching to create an event driven spike output that is logged to a micro-SD card. To enable validation the system is capable of logging the high bandwidth raw neural signal data as well as the spike sorted data. Main results The system can successfully record 32 channels of raw neural signal data and/or spike sorted events for well over 24 h at a time and is robust to power dropouts during battery changes as well as SD card replacement. A 24 h initial recording in a non-human primate M1 showed consistent spike shapes with the expected changes in neural activity during awake behaviour and sleep cycles. Significance The presented platform allows neural activity to be unobtrusively monitored and processed in real-time in freely behaving untethered animals-revealing insights that are not attainable through scheduled recording sessions. This system achieves the lowest power per channel to date and provides a robust, low-latency, low-bandwidth and verifiable output suitable for BMIs, closed loop neuromodulation, wireless transmission and long term data logging.

Next generation brain machine interfaces fundamentally need to improve the information transfer rate and chronic consistency when observing neural activity over a long period of time. Towards this aim, this paper presents a novel System-on-Chip (SoC) for a mm-scale wireless neural recording node that can be implanted in a distributed fashion. The proposed self-regulating architecture allows each implant to operate autonomously and adaptively load the electromagnetic field to extract a precise amount of power for full-system operation. This can allow for a large number of recording sites across multiple implants extending through cortical regions without increased control overhead in the external head-stage. By observing local field potentials (LFPs) only, chronic stability is improved and good coverage is achieved whilst reducing the spatial density of recording sites. The system features a ΔΣ based instrumentation circuit that digitises high fidelity signal features at the sensor interface thereby minimising analogue resource requirements while maintaining exceptional noise efficiency. This has been implemented in a 0.35 μm CMOS technology allowing for wafer-scale post-processing for integration of electrodes, RF coil, electronics and packaging within a 3D structure. The presented configuration will record LFPs from 8 electrodes with a 825 Hz bandwidth and an input referred noise figure of 1.77μVrms. The resulting electronics has a core area of 2.1 mm2 and a power budget of 92 μW

Modern microtechnology is enabling the channel count of neural recording integrated circuits to scale exponentially. However, the raw data bandwidth of these systems is increasing proportionately, presenting major challenges in terms of power consumption and data transmission (especially for wireless systems). This paper presents a system that exploits the sparse nature of neural signals to address these challenges and provides a reconfigurable low-bandwidth event-driven output. Specifically, we present a novel 64-channel low-noise (2.1 V), low-power (23 W per analogue channel) neural recording system-on-chip (SoC). This features individually configurable channels, 10-bit analogue-to-digital conversion, digital filtering, spike detection, and an event-driven output. Each channel's gain, bandwidth, and sampling rate settings can be independently configured to extract local field potentials at a low data-rate and/or action potentials (APs) at a higher data rate. The sampled data are streamed through an SRAM buffer that supports additional on-chip processing such as digital filtering and spike detection. Real-time spike detection can achieve 2 orders of magnitude data reduction, by using a dual polarity simple threshold to enable an event driven output for neural spikes (16-sample window). The SoC additionally features a latency-encoded asynchronous output that is critical if used as part of a closed-loop system. This has been specifically developed to complement a separate on-node spike sorting coprocessor to provide a real-time (low latency) output. The system has been implemented in a commercially available 0.35-m CMOS technology occupying a silicon area of 19.1 mm (0.3 mm gross per channel), demonstrating a low-power and efficient architecture that could be further optimized by aggressive technology and supply voltage scaling.

This paper describes an integrated communication system, implementing a UWB-inspired pulsed coding technique, for an optical transcutaneous biotelemetry. The system consists of both a transmitter and a receiver facilitating a bidirectional link. The transmitter includes a digital data coding circuit and is capable of generating sub-nanosecond current pulses and directly driving an off-chip semiconductor laser diode including all bias and drive circuits. The receiver includes an integrated compact PN-junction photodiode together with signal conditioning, de- tection and digital data decoding circuits to enable a high bit rate, energy efficient communication. The proposed solution has been implemented in a commercially available 0.35 μ m CMOS technology provided by AMS. The circuit core occupies a compact silicon footprint of less than 0.13 mm 2 (only 113 transistors and 1 resistor). Post-layout simulations have validated the overall system operation demonstrating the ability to operate at bit rates up to 500 Mbps with pulse widths of 300 ps with a total power efficiency (transmitter + receiver) lower than 74 pJ/bit. This makes the system ideally suited for demanding applications that require high bit rates at extremely low energy levels. One such application is implantable brain machine interfaces requiring high uplink bitrates to transmit recorded data externally through a transcutaneous communication channel.

We present a finite difference time domain (FDTD) model for computation of A line scans in time domain optical coherence tomography (OCT). By simulating only the end of the two arms of the interferometer and computing the interference signal in post processing, it is possible to reduce the computational time required by the simulations and, thus, to simulate much bigger environments. Moreover, it is possible to simulate successive A lines and thus obtaining a cross section of the sample considered. In this paper we present the model applied to two different samples: a glass rod filled with water-sucrose solution at different concentrations and a peripheral nerve. This work demonstrates the feasibility of using OCT for non-invasive, direct optical monitoring of peripheral nerve activity, which is a long-sought goal of neuroscience.

The prospect of real-time and on-node spike sorting provides a genuine opportunity to push the envelope of large-scale integrated neural recording systems. In such systems the hardware resources, power requirements and data bandwidth increase linearly with channel count. Event-based (or data-driven) processing can provide here a new efficient means for hardware implementation that is completely activity dependant. In this work, we investigate using continuous-time level-crossing sampling for efficient data representation and subsequent spike processing.(1) We first compare signals (synthetic neural datasets) encoded with this technique against conventional sampling. (2) We then show how such a representation can be directly exploited by extracting simple time domain features from the bitstream to perform neural spike sorting. (3) The proposed method is implemented in a low power FPGA platform to demonstrate its hardware viability.It is observed that considerably lower data rates are achievable when using 7 bits or less to represent the signals, whilst maintaining the signal fidelity. Results obtained using both MATLAB and reconfigurable logic hardware (FPGA) indicate that feature extraction and spike sorting accuracies can be achieved with comparable or better accuracy than reference methods whilst also requiring relatively low hardware resources.By effectively exploiting continuous-time data representation, neural signal processing can be achieved in a completely event-driven manner, reducing both the required resources (memory, complexity) and computations (operations). This will see future large-scale neural systems integrating on-node processing in real-time hardware.

This paper presents an optical communication system, implementing a UWB-inspired pulsed coding technique, for emerging high throughput bio-applications such as brain machine interfaces. The proposed solution employs sub-nanosecond laser pulses that, compared to the state-of-the-art, allows for high bit rate transmissions and reduced power consumption. The overall architecture consist of a transmitter and receiver that employ a pulsed semiconductor laser and a small sensitive area photodiode. This can allow for CMOS integration into a compact silicon footprint (estimated lower than 1 mm2 in a 0.18 μm technology). The analogue circuits presented herein have been implemented using discrete off-the-shelf components. These provide the bias and drive signals for laser pulse generation, photodiode signal detection and conditioning. Moreover, the digital sub-system for data coding and decoding processes have been implemented on a FPGA board through VHDL description language. Experimental results validate the overall functionality of the proposed system using a diffuser between transmitter and receiver to emulate skin/tissue. This shows the capability of operating at bit rates up to 250 Mbps achieving BER less than 10−9 and power efficiency as low as 24pJ/bit. These results enable, for example, the transmission of a 1000-channel neural recording system sampled at 16kHz with 16-bit resolution.

A closed-loop optogenetic system for curing epilepsy is presented in this work. As it shown at figure 1, the system consists of a cortical brain implant with LEDs and recording electrodes, a customer designed CMOS chip[1][2][3] and a controller. The brain activities are recorded by the implant with recording electronics in a CMOS chip, the signals are processed by the controller, and the results are send back to the CMOS chip for delivering LED stimulation commands.

Next generation brain machine interfaces are targeting millimeter-scale implants that are freely floating and completely wireless. It is essential these systems achieve good power transmission efficiency but are also compatible with microsystem technologies. This paper presents two schemes for implementing mm-scale coils for power delivery by electromagnetic coupling — on-chip and wire-wound. A set of on-chip coils have been fabricated using a 0.35 μm CMOS technology with thick top metal option (3 μm aluminium). These achieve a maximum Q-factor of 16.37. The second approach describes wire-wound coils that have been fabricated using bondwire (25 μm gold), achieving a Q-factor of 24.54. This work develops the relevant analytical models, equivalent simulation models, and reports results using both finite element modeling (simulation) and experimental measurement of the fabricated devices. Finally, we compare results and discuss the relative merits of each approach.

Emerging applications for implantable devices are requiring multi-unit systems with intrabody transmission of power and data through wireline interfaces. This paper proposes a novel method for power delivery within such a configuration that makes use of closed loop dynamic regulation. This is implemented for an implantable application requiring a single master and multiple identical slave devices utilising a parallel-connected 4-wire interface. The power regulation is achieved within the master unit through closed loop monitoring of the current consumption to the wired link. Simultaneous power transfer and full-duplex data communication is achieved by superimposing the power carrier and downlink data over two wires and uplink data over a second pair of wires. Measured results using a fully isolated (AC coupled) 4-wire lead, demonstrate this implementation can transmit up to 120 mW of power at 6 V (at the slave device, after eliminating any losses). The master device has a maximum efficiency of 80 % including a dominant dynamic power loss. A 6 V constant supply at the slave device is recovered 1.5 ms after a step of 22 mA.

This paper proposes a novel method for integrating CMOS microelectronics with microwire-based electrodes for next generation implantable brain machine interfaces. There is strong evidence to suggest that microwire-based electrodes outperform micromachined and polymer-based electrodes in terms of signal integrity and chronic viability. Furthermore, it has been shown that the recording of Local Field Potentials (LFPs) is more robust to tissue damage and scar tissue growth when compared to action potentials. This work therefore investigates the suitability of microwire electrodes for LFP recording by studying the electrical properties of key materials. We identify Niobium (Nb) as a candidate material with highly desirable properties. There is however also an inherent incompatibility when it comes to connection of microwire-based electrodes to silicon chips. Here we present a new process flow utilising a recessed glass substrate for mechanical support, silicon interposer for interconnection, and electroplating for contact adhesion. Furthermore, the proposed structure lends itself to hermetic encapsulation towards gas cavity based micropackages.

The feasibility of using time domain optical coherence tomography (TD-OCT) to detect compound action potential in a peripheral nerve and the setup characteristics, are studied through the use of finite-difference time-domain (FDTD) technique.

The ability to process time-encoded signals with high fidelity is becoming increasingly important for the time domain (TD) circuit techniques that are used at the advanced nanometer technology nodes. This paper proposes a compact oscillator-based subsystem that performs precise filtering of asynchronous pulse-width modulation encoded signals and makes extensive use of digital logic, enabling low-voltage operation. First- and second-order primitives are introduced that can be used as TD memory or to enable analogue filtering of TD signals. These structures can be modeled precisely to realize more advanced linear or nonlinear functionality using an ensemble of units. This paper presents the measured results of a prototype fabricated using a 65-nm CMOS technology to realize a fourth- order low-pass Butterworth filter. The system utilizes a 0.5-V supply voltage with asynchronous digital control for closed-loop operation to achieve a 73-nW power budget. The implemented filter achieves a maximum signal to noise and distortion ratio of 53 dB with a narrow 5-kHz bandwidth resulting in an figure- of-merit of 8.2 fJ/pole. With this circuit occupying a compact 0.004-mm2 silicon footprint, this technique promises a substantial reduction in size over conventional Gm-C filters, whilst addition- ally offering direct integration with digital systems.

This work presents a computationally efficient real-time adaptive clustering algorithm that recognizes and adapts to dynamic changes observed in neural recordings. The algorithm consists of an off-line training phase that determines initial cluster positions and an on-line operation phase that continuously tracks drifts in clusters and periodically verifies acute changes in cluster composition. Analysis of chronic recordings from non-human primates shows that adaptive clustering achieves an improvement of 14% in classification accuracy and demonstrates an ability to recognize acute changes with 78% accuracy, with significantly improved computational efficiency compared to the state-of-the-art. The presented algorithm is suitable for long-term chronic monitoring of neural activity in many applications of neuroscience research and control of neural prosthetics and assistive devices.

This paper presents a hardware realisation of a novel ECG baseline drift removal that preserves the ECG signal integrity. The microcontroller implementation detects the fiducial markers of the ECG signal and the baseline wander estimation is achieved through a weighted piecewise linear interpolation. This estimated drift is then removed to recover a “clean” ECG signal without significantly distorting the ST segment. Experimental results using real data from the MIT-BIH Arrhythmia Database (recording 100 and 101) with added baseline wander (BWM1) from the MIT-BIH Noise Stress Database show an average root mean square error of 34.3 μV (mean), 30.4 μV (median) and 18.4 μV (standard deviation) per heart beat.

This paper presents a 64-bit on-chip identification system featuring low power consumption and randomness compensation for multi-node bio-implantable devices. A sense amplifier based bit-cell is proposed to realize the silicon physical unclonable function, providing a unique value whose probability has a uniform distribution and minimized influence from the temperature and supply variation. The entire system is designed and implemented in a typical 0.35 μm CMOS technology, including an array of 64 bit-cells, readout circuits, and digital controllers for data interfaces. Simulated results show that the proposed bit-cell design achieved a uniformity of 50.24% and a uniqueness of 50.03% for generated IDs. The system achieved an energy consumption of 6.0 pJ per bit with parallel outputs and 17.3 pJ per bit with serial outputs.

The paper presents a novel topology of a continuous-time analogue-to-digital converter (CT-ADC) featuring ultra-low static power consumption, activity-dependent dynamic consumption, and a compact footprint. This is achieved by utilising a novel charge-packet based threshold generation method, that alleviates the requirement for a conventional feedback DAC. The circuit has a static power consumption of 3.75 μW, with dynamic energy of 1.39pJ/conversion level. This type of converter is thus particularly well-suited for biosignals that are generally sparse in nature. The circuit has been optimised for neural spike recording by capturing a 3 kHz bandwidth with 8-bit resolution. For a typical extracellular neural recording the average power consumption is in the order of ∼4 μW. The circuit has been implemented in a commercially available 0.35 μm CMOS technology with core occupying a footprint of 0.12 mm2.

This paper presents a multichannel, ultra-low-noise arbitrary signal generation platform for emulating a wide range of different biopotential signals (e.g. ECG, EEG, etc). This is intended for use in the test, measurement and demonstration of bioinstrumentation and medical devices that interface to electrode inputs. The system is organized in 3 key blocks for generating, processing and converting the digital data into a parallel high performance analogue output. These blocks consist of: (1) a Raspberry Pi 3 (RPi3) board; (2) a custom Field Programmable Gate Array (FPGA) board with low-power IGLOO® Nano device; and (3) analogue board including the Digital-to-Analogue Converters (DACs) and output circuits. By implementing the system this way, good isolation can be achieved between the different power and signal domains. This mixed-signal architecture takes in a high bitrate SDIO (Secure Digital Input Output) stream, recodes and packetizes this to drive two multichannel DACs, with parallel analogue outputs that are then attenuated and filtered. The system achieves 32-parallel output channels each sampled at 48kS/s, with a 10 kHz bandwidth, 110 dB dynamic range and μV-level output noise.

This article reports an implantable transcutaneous telemetry for a brain machine interface that uses a novel optical communication system to achieve a highly energy-efficient link. Based on an pulse-based coding scheme, the system uses sub-nanosecond laser pulses to achieve data rates up to 300 Mbps with relatively low power levels when compared to other methods of wireless communication. This has been implemented using a combination of discrete components (semiconductor laser and driver, fast-response Si photodiode and interface) integrated at board level together with reconfigurable logic (encoder, decoder and processing circuits implemented using Xilinx KCU105 board with Kintex UltraScale FPGA). Experimental validation has been performed using a tissue sample that achieves representative level of attenuation/scattering (porcine skin) in the optical path. Results reveal that the system can operate at data rates up to 300 Mbps with a bit error rate (BER) of less than 10 $^{-10}$ , and an energy efficiency of 37 pJ/bit. This can communicate, for example, 1,024 channels of broadband neural data sampled at 18 kHz, 16-bit with only 11 mW power consumption.

This work presents a novel unsupervised algorithm for real-time adaptive clustering of neural spike data (spike sorting). The proposed Hierarchical Adaptive Means (HAM) clustering method combines centroid-based clustering with hierarchical cluster connectivity to classify incoming spikes using groups of clusters. It is described how the proposed method can adaptively track the incoming spike data without requiring any past history, iteration or training and autonomously determines the number of spike classes. Its performance (classification accuracy) has been tested using multiple datasets (both simulated and recorded) achieving a near-identical accuracy compared to k-means (using 10-iterations and provided with the number of spike classes). Also, its robustness in applying to different feature extraction methods has been demonstrated by achieving classification accuracies above 80% across multiple datasets. Last but crucially, its low complexity, that has been quantified through both memory and computation requirements makes this method hugely attractive for future hardware implementation.