201. Temperature and annealing effects on InAs nanowire MOSFETs
- Author
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Sofia Johansson, Lars-Erik Wernersson, Mattias Borg, Erik Lind, S. Gorji Ghalamestani, and Gogolides, Evangelos
- Subjects
Annealing (metallurgy) ,High-k ,Gate dielectric ,Oxide ,Nanowire ,Electrical Engineering, Electronic Engineering, Information Engineering ,law.invention ,Annealing ,chemistry.chemical_compound ,MOSFET ,law ,InAs ,Electrical and Electronic Engineering ,HfO2 ,High-κ dielectric ,Condensed matter physics ,Chemistry ,Transistor ,FET ,Condensed Matter Physics ,III-V semiconductor ,Atomic and Molecular Physics, and Optics ,Surfaces, Coatings and Films ,Electronic, Optical and Magnetic Materials ,Field-effect transistor - Abstract
We report on temperature dependence on the drive current as well as long-term effects of annealing in vertical InAs nanowire Field-Effect Transistors. Negatively charged traps in the HfO2 gate dielectric are suggested as one major factor in explaining the effects observed in the transistor characteristics. An energy barrier may be correlated with an un-gated InAs nanowire region covered with HfO2 and the effects of annealing may be explained by changed charging on defects in the oxide. Initial simulations confirm the general effects on the I-V characteristics by including fixed charge. (c) 2011 Elsevier B.V. All rights reserved.
- Published
- 2011