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A multiscale technology computer-aided design (TCAD) simulation methodology is presented to calculate the intrinsic transit time of InP double heterojunction bipolar transistors (DHBTs). A 2-D hyd-rodynamic (HD) simulator is employed to produce the dc characteristics and electrostatic potentials of the selected devices. Utilizing the cuts of the obtained potential profiles as inputs, a 1-D full-band, atomistic quantum transport (QT) solver is then deployed to determine the ballistic electronic transport properties of these components. The transit times of DHBTs based on InGaAs/InP and GaAsSb/InP technologies are finally investigated with the proposed approach. Good qualitative agreements are observed with the experimental measurements. The observed underestimations of the experimental transit times are justified with the physics-based compact model HiCuM, thus providing a basis for structure and performance optimizations toward real terahertz transistors. [ABSTRACT FROM AUTHOR]

This article is an extension of the previous report on an ultrawideband distributed amplifier (DA) in the InP double heterojunction bipolar transistor (DHBT) technology. With the choice of a tricode unit cell, the Miller capacitance is reduced and a larger bandwidth (BW) is obtained. Measured S-parameters show a 3-dB BW of near dc to >170 GHz with a gain of 12 dB. In addition, the circuit operates in low dc bias conditions, thus yielding a low measured noise figure (NF) of 8 dB over the frequency range of 5–50 GHz and 12 dB at 135 GHz. Within the 5–50-GHz frequency range, the NF is only 0.5 dB higher than the NF of a similar DA with cascode unit cell. When the circuit is measured for large-signal condition, it reaches a 1-dB output compression point, $P_{\mathrm {1\,dB}}$ , of 8.4 dBm at 150 GHz, a saturated output power of approximately 10 dBm, and an associated maximum power-added efficiency (PAE) of 6%. This is the best linearity as well as the highest saturated output power and PAE reported at this frequency for DAs. When measured at 20 GHz, the circuit shows a $P_{\mathrm {1\,dB}}$ , of 9 dBm and output referred third-order intercept point of 22 dBm, a saturated output power of 11 dBm, and an associated maximum PAE of 6%, thereby proving its uniform large-signal character within the full band. In short, this circuit brings in the unique combination of low NF, highly linear characteristics, and high PAE simultaneously together over large BW. Furthermore, the circuit consumes 180 mW of dc power only. [ABSTRACT FROM AUTHOR]

In this article, a 220-GHz direct detection polarimetric receiver is reported. This polarimetric receiver is intended for sensing of the microphysical properties of cloud ice in the earth’s upper atmosphere. In the article, we report the measured RF performance, including RF gain of approximately 35 dB per channel and integrated noise figure of the receiver. The noise figure is measured to be 5.1 dB for the horizontally polarized channel and 5.4 dB for the vertically polarized channel. The receiver measures only 1.8 cm $\times3.0$ cm $\times6.4$ cm and has a total regulated dc power consumption of 520 mW. This article represents the first 220-GHz polarimetric direct detection receiver and is enabled by an advanced 25-nm indium phosphide (InP) HEMT monolithic microwave integrated circuit (MMIC) technology. [ABSTRACT FROM AUTHOR]

In this paper multi-frequency piezoelectric MEMS ultrasonic transducers (pMUTs) are designed, characterized and tested for nondestructive evaluation (NDE) of solids. The transducers operate in flexural mode, and are tuned to three different frequencies namely 1 MHz, 1.5 MHz and 2 MHz. The microstructural layers consist of aluminum nitride (AlN) as an active sensing layer sandwiched between metal and doped silicon electrodes. pMUTs are designed with octagonal and circular membranes. The vibration of silicon membrane assists piezoelectric element to convert energies. The transducers are modeled numerically to obtain their dynamic characteristics. Piezoelectric Multi-User MEMS Processes (PiezoMUMPs) are utilized to manufacture pMUTs. The electromechanical characterization shows that the circular design has higher figure of merit as compared to the octagonal design due to more uniform stress distribution transferred between silicon and AlN layers. It is demonstrated that the piezeoelectric layer should be deposited up to the inflection point of diaphragm deformation. This avoids the signal cancellation due to opposite polarization. The performance of pMUTs as receiver is evaluated to detect the creep damage by implementing nonlinear ultrasonic testing (NLUT). NLUT is based on detecting higher harmonics in solids due to heterogeneity in materials. Significant amplification in the second harmonics is obtained due to highly narrowband and low damping characteristics of pMUTs that improves the resolution of NLUT to detect subwavelength damage. Higher harmonics can be detected using small footprint pMUT device, which is not possible with conventional piezoelectric transducers. This allows better spatial resolution of nonlinear measurement. [ABSTRACT FROM AUTHOR]

The power consumption (PC), window margin (WM), thermal stability (TS), and reliability [i.e., endurance (EN) and retention-time (RT)] of aluminum nitride (AlN) resistive random access memory (RRAM) devices with different film orientations [i.e., amorphous, (100)- and (002)-oriented] are investigated. It is shown that the charge carrier transport mechanism of the three devices is dominated by Ohmic behavior under low electric fields and the trap-controlled space charge limited current (TC-SCLC) model under high electric fields. Among the three devices, the (002)-oriented AlN sample provides the best overall PC, WM, TS, EN, and RT performance due to its ${c}$ -axis orientation, which is favorable for the formation and rupture of the vertically arranged conductive filaments (CFs) in the AlN film. [ABSTRACT FROM AUTHOR]

Type-I (straddled) InP DHBT devices have been fabricated to study the impact of different base-collector junction transition layer designs on the collector to emitter breakdown behavior, breakdown voltage, BVceo and the device output performance such as knee voltage, Vknee at high collector current densities, Jc. An abrupt breakdown behavior with BVceo of 11V and Vknee less than 1V at Jc>100kA/cm2 are achieved using an optimized base collector junction transition layer design. Using 2D numerical simulations, components of leakages dominating Iceo at low and high collector to emitter bias voltages are explained. It is further shown that the optimized device exhibits good RF and power performance achieving f $_{T}$ of 115GHz and f $_{max}$ of 150GHz at emitter width >1um. An MMIC power amplifier (PA) is also designed and fabricated using the optimized Type-I InP DHBT device. At 28GHz, good power performance is achieved with PAE of 54% and Psat of 26dBm. Thus, it is shown that InP DHBTs developed in this work are a good candidate for the next phase of 5G millimeter wave Ka-band power amplifier applications. [ABSTRACT FROM AUTHOR]

This letter presents a hybrid narrowband radio frequency (RF) impedance transformer using an aluminum nitride (AlN) microelectromechanical system (MEMS) resonator and lumped elements. The hybrid transformer consists of an AlN Lamb wave resonator, a parallel inductor, and a set of three lumped-element networks on a printed circuit board (PCB). The AlN resonator and the parallel inductor form the narrowband response while the lumped element networks fulfill the high impedance transformation. The transformer has been theoretically predicted and experimentally shown to achieve a narrow fractional bandwidth (FBW) of 2.2% and an extremely high impedance transformation ratio (ITR) of 200. [ABSTRACT FROM AUTHOR]

On-chip optical light sources are key components in photonic integrated circuits and optical communication. In this paper, we use a novel integration technique called template-assisted selective epitaxy (TASE) to monolithically integrate InP microdisk lasers on silicon. TASE offers several advantages for new device concepts such as lateral doping, dense co-integration of different III–V materials, and in-plane integration with silicon electronics and passive components. Here, we demonstrate room-temperature lasing from InP hexagonal microdisks integrated via TASE. In order to assess and evaluate the viability of TASE, a second InP hexagonal microdisk sample is prepared for comparison using the highly developed and mature direct wafer bonding technique. The lasing performance of the TASE monolithic devices and the bonded microdisk devices is investigated under pulsed optical pumping as a function of temperature and compared. The lasing threshold as well as the light-in light-out curves of our TASE structures compare favorably with the bonded InP hexagonal microdisks. This demonstrates that our TASE approach is a promising technique for the monolithic integration of optical devices on Si. [ABSTRACT FROM AUTHOR]

Indium phosphide (InP) is the most developed platform for photonic integrated circuits (PICs). Of interest is the advancement of this platform for applications that demand high performance, especially high output power, including free space communications and microwave photonics. In this paper, we summarize development of InP-based PIC transmitters. Two transmitter types were fabricated: one based on an offset quantum wells (OQW) platform and the other on a quantum well intermixing (QWI) platform. The OQW-based transmitter consists of a widely tunable laser, a high-speed semiconductor optical amplifier (SOA), a Mach–Zehnder modulator, and an output SOA. This transmitter demonstrates a 44-nm tuning range, >45 dB side mode suppression ratio, 14.5 dBm off-chip power, and a data rate of 7 Gbps. The second transmitter, based on QWI, utilizes an alternate epitaxial structure to achieve a lower confinement factor for higher SOA output saturation power. This QWI transmitter consists of a distributed Bragg reflector laser, a high-speed SOA, an electroabsorption modulator, and an output SOA. The measured off-chip power is 19.5 dBm, and a data rate of 20 Gbps is demonstrated. Based on the improved performance with the new epitaxial structure, a novel platform for high-power PIC transmitters integrated with low confinement and high-power SOAs is described. [ABSTRACT FROM AUTHOR]

Network slicing enables an infrastructure provider (InP) to support heterogeneous 5G services over a common platform (i.e., by creating a customized slice for each service). Once in operation, slices can be dynamically scaled up/down to match the variation of their service requirements. An InP generates revenue by accepting a slice request. If a slice cannot be scaled up when required, an InP has to also pay a penalty (proportional to the level of service degradation). It becomes then crucial for an InP to decide which slice requests should be accepted/rejected in order to increase its net profit. This paper presents a slice admission strategy based on reinforcement learning (RL) in the presence of services with different priorities. The use case considered is a 5G flexible radio access network (RAN), where slices of different mobile service providers are virtualized over the same RAN infrastructure. The proposed policy learns which are the services with the potential to bring high profit (i.e., high revenue with low degradation penalty), and hence should be accepted. The performance of the RL-based admission policy is compared against two deterministic heuristics. Results show that in the considered scenario, the proposed strategy outperforms the benchmark heuristics by at least 23%. Moreover, this paper shows how the policy is able to adapt to different conditions in terms of 1) slice degradation penalty versus slice revenue factors, and 2) proportion of high versus low priority services. [ABSTRACT FROM AUTHOR]

Optimization of piezoelectric energy harvester (PEH) to convert the ambient vibrational energy into maximum electrical energy has been of continued interest. The integration of the proof mass with the optimum cantilever width significantly enhances the output power of PEH. In this paper, we propose an optimized design of PEH that outperforms the existing AlN-based design in terms of power density. We analytically optimize the design of: 1) cantilever-to-harvester length and 2) cantilever-to-harvester width (proof mass width) ratios for the maximum output power. The optimized harvester is fabricated using a novel integration scheme for the bottom electrode with Au as an interlayer. The Au interlayer is used to grow a good quality of AlN film with piezoelectric coefficients, $d_{33} = 12$ pm/V and $d_{31} = -2.37 $ pm/V. It is found that in order to achieve the optimum output from PEH, the fractional length and width occupied by cantilever are 28%–40% and 38%–45%, respectively. The optimized designs are fabricated using a CMOS compatible process. The maximum power density measured from the fabricated PEHs is found to be 9.36 $\mu $ W/mm3, which is better than the similar reported data. The optimized and compact low-power PEHs reported in this paper have high potential to be integrated with the system on chip (SOC) and other wireless sensor applications. [ABSTRACT FROM AUTHOR]

In this paper, we report a novel aluminum nitride (AlN) resonant micro-electromechanical systems (MEMS) accelerometer. The spring beams are T-shaped with two masses hanged at the end. This accelerometer is sensitive to the $z$ -axis acceleration due to a thin thickness. Different from the working mechanism of the ordinary MEMS resonant accelerometers, masses of this accelerometer are excited to resonate in-plane. In addition the stiffness of spring beams changes significantly when an out plane ($z$ -axis) inertial force applied on the structure. Therefore, the resonant frequency of the structure will change with the out-plane inertial force. The resonant properties and sensitivities of this AlN accelerometer are simulated by COMSOL Multiphysics. The accelerometer is fabricated and tested. The size of the whole structure is $464\times 650\,\,\mu \text{m}^{2}$. The resonant frequency is 16.10925 kHz at the static state. The sensing-axis sensitivity of this accelerometer is 1.11 Hz/g (i.e., 68.9 ppm/g) tested from −5g to +5g. The linearity of the accelerometer is 0.9954. The cross-axis sensitivities are 0.053 Hz/g ($x$ -axis) and 0.048 Hz/g ($y$ -axis) respectively. The temperature coefficient of frequency (TCF) of this accelerometer is 0.815 Hz/ °C (i.e., 50.6 ppm/°C), tested from 0 °C to 50 °C. [2019-0062] [ABSTRACT FROM AUTHOR]

The creation of microelectromechanical systems (MEMS) that can operate through elevated temperatures would enable systems diagnostics and controls that are not possible with conventional-off-the-shelf components. The integration of silicon carbide (SiC) with aluminum nitride (AlN) has led to the fabrication of devices that can withstand elevated temperature anneals >935 °C. The results from a piezoelectric micromachined ultrasonic transducer (PMUT) and a microresonator are reported as demonstrations of the fabrication process. Testing the PMUT response before and after annealing at 935 °C led to a change in resonant frequency of less than 1%, which is attributable to a shift in film stress. The response of the microresonator was RF tested $in~ situ$ up to 500 °C and showed no degradation in its electromechanical coupling coefficient. The resonant frequency decreased with temperature due to the temperature coefficient of Young’s modulus, and the quality factor decreased with temperature and remained unrecoverable upon cooling. The degradation in the quality factor is suspected to be a result of oxidation of the titatium nitride (TiN) top electrode, which increases the resistivity and leads to an unrecoverable reduction in the quality factor. The robust piezoelectric response of AlN at these temperatures show that AlN is a very promising candidate for elevated temperature applications. [2019-0019] [ABSTRACT FROM AUTHOR]

In wireless network virtualization, guaranteeing service contracts with different mobile virtual network operators (MVNOs) and optimizing energy efficiency are crucial for the success of the virtualization scheme deployed by an infrastructure provider (InP). In this paper, a novel design framework is proposed for resource allocation in an OFDMA virtualized wireless network (VWN). Treating the virtual resources for a VWN as commodities, the InP wants to maximize its revenue by leasing the infrastructure and resources to the MVNOs while meeting certain contract agreements. Moreover, MVNOs want to serve their users at the best performance and pay the minimum cost to the InP. A Lyapunov based online algorithm is proposed to solve the InP's long-term optimization problem. The short-term optimization problem of the InP is considered as a combinatorial nonconvex problem. A multiple time-scale framework is proposed to solve the optimization problem of the InP, which decomposes the pricing decision, base station assignment, and resource allocation into different time-scale algorithms to achieve the design objectives. First, a distributed matching based algorithm is proposed to solve the base station assignment problem. Second, we propose a successive convex approximation approach to solve the joint subchannel assignment and energy efficiency problem. Finally, we propose a branch and bound based algorithm to optimally solve the price decision problem. Simulation results show the trade-off between energy efficiency, InP's revenue, and the isolation provisioning. [ABSTRACT FROM AUTHOR]

In this letter, we have conducted experiments on a traditional uni-traveling carrier photodiode (UTC-PD) and a previously modified UTC-PD under the zero-bias operational condition and make a comparison between them. The experimental results demonstrate that the modified UTC-PD is benefit to high speed, and the 3-dB bandwidth can achieve 40 GHz even when the active diameter of ${14}~{\mu }\text{m}$ under the zero-bias operation. Besides, based on the modified UTC-PD structure, we make some improvements in the collector to restrain the trend in which the bandwidth attenuated by the increase of photocurrent under the zero bias operation. [ABSTRACT FROM AUTHOR]

This paper reports wafer-level backside process technology, established with the intent to ensure stable operation of InP ICs in the submillimeter wavelength band, which generally suffer from ground bounce and substrate resonance. Our process consists of thinning a 3-in InP wafer, forming dense vias with interval cooling steps, backside metallization with single-level wiring and crack-free dicing. We investigate the effects of the backside process on InP-based heterojunction bipolar transistors and high electron mobility transistors. The results show that the backside process contributes to stable operation up to the 300-GHz range without any degradation of transistor characteristics. [ABSTRACT FROM AUTHOR]

In this paper, air-coupled piezoelectric micromachined ultrasonic transducers (PMUTs) using 36% scandium-doped aluminum nitride (ScAlN) thin-film are presented. ScAlN is known to exhibit higher piezoelectric properties compared to pure AlN leading to significant performance improvements in various piezoelectric micro-electromechanical systems (MEMS) applications including PMUTs. Here, the concentration of Sc in the actual sputtered 1- $\mu \text{m}$ -thick ScAlN film was 36%, which is slightly below the maximum at the phase boundary. The ScAlN PMUTs were fabricated from an SOI wafer, where the dry etching of ScAlN film was optimized. The frequency response and displacement sensitivity of the PMUTs were characterized in the air using laser Doppler vibrometry confirming $2\times $ higher transverse piezoelectric coefficient than AlN. The acoustic transmission and reception of the PMUTs were evaluated from a high-sensitivity microphone and pulse-echo measurements. The PMUTs were designed to operate below 100 kHz in order to mitigate the absorption loss, which resulted in a high transmit pressure of 105-dB sound pressure level (SPL) at 10 cm and only 30-dB attenuation at the 2-m range. Through implementing 36% ScAlN film, the presented PMUTs exhibited a large displacement and consequently, a high SPL compared to the state-of-the-art PMUTs and the bulk transducer considering the size and the excitation voltage. [ABSTRACT FROM AUTHOR]

The extension of a photonic integrated circuit foundry process flow is proposed by integrating selective area growth to enable bandgap tuning for each individual active building block. The process adaptations and the impact on performance are reviewed in terms of morphology requirements and topology reduction. This platform extension enables bandgap tuning for a set of active devices to cover the wavelength range from 1453 to 1651 nm. Integration is demonstrated in combination with active–passive butt-joint technology to create the most comprehensive range of generic building blocks. Performance and limitations of the range of achievable band edges within the same monolithic wafer are studied for amplifiers and extended cavity lasers. [ABSTRACT FROM AUTHOR]

Heterogeneous integration of III–V semiconductor photonics combined with silicon foundry technology enables low-cost, high-performance photonic integrated circuits. Highly reliable lasers using epitaxial deposition of quantum dot lasers, with <2 mA threshold and lifetime >>100 years at 35 C have been demonstrated at University of California, Santa Barbara (UCSB) and can be manufactured at wafer scale. Reduction in the linewidth enhancement factor allows isolator-free operation. This technology enables cost-effective photonic integrated circuits for applications such as microwave photonics and data communications. Optical frequency synthesis with ∼1.5 Hz accuracy is demonstrated using heterogeneous integration. Silicon photonics applications that will benefit from future heterogeneous integration are also demonstrated, including high dynamic range microwave photonic links and optical switching technology that scales to hyperscale datacenters with hundreds of thousands of servers. [ABSTRACT FROM AUTHOR]

This paper describes a highly accurate airflow volumetric flowmeter using piezoelectric micromachined ultrasonic transducers (pMUTs) arrays based on transit time. Two pieces of 10by10 multipled aluminum nitride (AlN) pMUTs arrays at resonant frequency of 980 kHz are employed to transmit and receive ultrasonic signals alternately. The dimension of the fabricated 10by10 array is about $3.5 \times 3.5$ mm2, so the pMUTs-based flowmeter is able to measure flow rate in a 3D-printed pipe with an inner diameter of 10 mm. An evaluation board TDC1000-TDC7200EVM with resolution in ns is used to excite the transducers and handle the received signal. Leveraging on the high signal to noise ratio (SNR, ~29dB) of the pMUTs array and excellent resolution (ns) of the evaluation board, the flowmeter has high accuracy. For the reference volumetric flow rate varying from 0–9 L/min in the range of laminar flow, the relative errors of the correctional volumetric flow are within 3%. [ABSTRACT FROM AUTHOR]

This paper reports on the investigation of anomalous low quality factors (${Q}\text{s}$) in AlN thin film-based length extensional (LE)-mode resonators using finite element method (FEM), analytical modeling, and experimental techniques. Different heterostructures of LE resonators having Al/AlN/Si, Al/AlN, AlN/Si, and Si are designed and fabricated using standard MEMS processes. Experimental ${Q}\text{s}$ along with resonances are obtained using electrical and optical readout and are compared with the modeled and analytically obtained ${Q}\text{s}$. The results show that the thermoelastic damping (TED) in metal electrode, anchor loss, and charge redistribution loss are not the dominant loss mechanisms. With the help of Mason’s network modeling, we investigated the dielectric loss, which is also observed to be negligible for these resonators. An internal mechanical loss, originating from the columnar growth of AlN and observed using Mason’s model, is proved to be the dominant loss mechanism. This observation is confirmed and reinforced by the COMOSL’s FEM analysis of TED in AlN, having columnar growth effect and by experimental results. [2018-0258] [ABSTRACT FROM AUTHOR]

This paper presents a high accuracy air-coupled reflective ultrasonic rangefinder based on piezoelectric micromachined ultrasonic transducers (pMUTs) using multi-frequency continuous waves (MFCWs). Two pieces of $5~times~5$ AlN pMUTs arrays at the resonant frequency of 492 kHz are employed to transmit and receive ultrasonic signals, respectively. The MFCW method, where the distance information is calculated from the phase difference, can cancel out the random noise in numerous repeating periods. Therefore, high-accuracy range measurement is achieved. The $3\sigma $ accuracy of the short distance measurement (< 100 mm) is 0.0711 mm with 0.096 mm/° first-order resolution and $1.934~\mu \text{m}$ /° second-order resolution. For long distance measurement (100–300 mm), the $3\sigma $ accuracy is 1.8208 mm with 0.481 mm/° first-order resolution and $1.954~\mu \text{m}$ /° second-order resolution. The MFCW-based rangefinder using pMUTs is a good candidate for short distance measurement with high accuracy. [2018-0267] [ABSTRACT FROM AUTHOR]

CMOS IC technology has become an affordable means for implementing capable systems operating at 300 GHz and above. CMOS circuits have been used to generate a signal up to 1.3 THz to detect both amplitude and phase of signals up to 1.2 THz, and to detect a signal amplitude up to ~10 THz. Additionally, a transmitter and a receiver operating up to ~300 GHz for electronic smelling using rotational spectroscopy, a 30-Gb/s 300-GHz QPSK transmitter for data communication with -6-dBm output power, and an 820 GHz imaging array fabricated in CMOS have been reported. These results, along with the CMOS circuit performance in the literature, and link analyses suggest that the electronics necessary for everyday life applications in the terahertz band can be affordably realized. [ABSTRACT FROM AUTHOR]

In evaluating GaN high-electron mobility transistors (HEMTs) for high-power applications, it is crucial to consider the device-level breakdown characteristics. This letter replaces the conventional AlGaN barrier and common AlGaN backbarrier with unstrained AlN, and it assesses the breakdown voltage of AlN/GaN/AlN quantum well HEMTs for gate-drain spacings in the range of 0.27– $5.1~\mu \text{m}$. The results are highlighted by a high breakdown voltage of 78 V for a gate-drain spacing of 390 nm, among the best reported for submicron-channel devices. In addition, small-signal RF measurements showed record performance for HEMTs on the AlN platform, with $\text {f}_{\text {t}}/\text {f}_{\text {max}} = {161}/{70}$ GHz. The cut-off frequency and corresponding drain bias are benchmarked against the state-of-the-art GaN HEMTs using the Johnson figure of merit, with measured devices highlighted by a JFoM value of 2.2 THz $\cdot $ V. These results illustrate the potential for AlN/GaN/AlN quantum well HEMTs as a future platform for high-power RF transistors. [ABSTRACT FROM AUTHOR]

We report on record high zero-bias external quantum efficiency (EQE) of 92% for back-illuminated Al0.40Ga0.60N p-i-n ultra-violet (UV) photodetectors on sapphire. The zero-bias responsivity measured 211 mA/W at 289 nm, which is the highest value reported for solar-blind, p-i-n detectors realized over any epitaxial wide band-gap semiconductor. This is also the first report for a p-i-n detector, where a polarization-graded Mg-doped AlGaN layer is utilized as the p-contact layer. The devices exhibited a ten-orders of magnitude rectification, a low reverse leakage current density of 1 nA/cm2 at 10 V, a high $\text{R}_{{0}}\text{A}$ product of $1.3\times 10^{{11}} \Omega $.cm2 and supported fields exceeding 5 MV/cm. The light-to-dark current ratio and the UV-to-visible rejection ratio for the detectors exceeded six-orders of magnitude and the thermal noise limited detectivity (D*) measured $6.1\times 10^{{14}}$ cmHz1/2W−1. The state-of-the-art performance parameters can be attributed to a high crystalline quality absorbing AlGaN epi-layer resulting from the use of an AlN/AlGaN superlattice buffer and an improved p-contact via polarization grading. [ABSTRACT FROM AUTHOR]

Wireless network slicing (i.e., network virtualization) is one of the potential technologies for addressing the issue of rapidly growing demand in mobile data services related to 5G cellular networks. It logically decouples the current cellular networks into two entities: infrastructure providers (InPs) and mobile virtual network operators (MVNOs). The resources of base stations (e.g., resource blocks, transmission power, and antennas), which are owned by the InP, are shared with multiple MVNOs who need resources for their mobile users. Specifically, the physical resources of an InP are abstracted into multiple isolated network slices, which are then allocated to MVNO’s mobile users. In this paper, two-level allocation problem in network slicing is examined while enabling efficient resource utilization, inter-slice isolation (i.e., no interference among slices), and intra-slice isolation (i.e., no interference between users in the same slice). A generalized Kelly mechanism (GKM) is also designed, based on which the upper level of the resource allocation issue (i.e., between the InP and MVNOs) is addressed. The benefit of using such a resource bidding and allocation framework is that the seller (InP) does not need to know the true valuation of the bidders (MVNOs). For solving the lower level of resource allocation issue (i.e., between MVNOs and their mobile users), the optimal resource allocation is derived from each MVNO to its mobile users by using Karush–Kuhn–Tucker (KKT) conditions. Then, bandwidth resources are allocated to the users of MVNOs. Finally, the results of the simulation are presented to verify the theoretical analysis of our proposed two-level resource allocation problem in wireless network slicing. [ABSTRACT FROM AUTHOR]

The breakdown voltage of GaN/Si high-electron-mobility transistors (HEMTs) for power electronics has shown to be improved by removing the silicon substrate. The drawback to this approach is the increase in the device’s thermal resistance, which limits the power dissipation that the device can achieve before severe degradation. This letter shows the ability to improve the thermal dissipation of these devices by depositing copper (Cu) below aluminum nitride (AlN) filled etched back GaN-on-Si HEMTs. The device’s channel temperature is measured via Raman thermometry. The device’s transient thermal dynamics is investigated via transient thermoreflectance imaging, and the temperature profile across the gate metal is monitored. In addition to the device’s thermal properties, a residual stress analysis of the GaN channel is performed via photoluminescence. A notable decrease in the tensile residual stress is observed with the removal of the substrate and the addition of the AlN and Cu layers. Overall, the backside copper is shown to decrease the gate temperature of the etched backed AlN filled devices while maintaining a high breakdown voltage. [ABSTRACT FROM AUTHOR]

New thin-film range resistors have been developed at the National Metrology Institute of Japan, to re-establish ac–dc voltage transfer standards in the 100–1000-V range at frequencies of 1–100 kHz. In earlier studies, the voltage dependence of the ac–dc transfer difference was observed during step-up procedures above 300 V. One of the possible reasons for this voltage dependence is the temperature rise due to the Joule heating, which may cause changes in the resistance of the resistor, as well as the temperature dependence of the dielectric losses in the resistor coating. In this paper, to reduce the voltage dependence, new thin-film heaters were directly fabricated on an aluminum nitride substrate to prevent heat from accumulating in the range resistor. The voltage dependence was evaluated by measuring the differences in impedance among various range resistors. Negligible voltage dependence in the step-up procedures from 100 to 1000 V was achieved. [ABSTRACT FROM AUTHOR]

We examine the power-performance variability of a projected sub-5-nm GaAsSb/InGaAs vertical tunnel FET considering various process control tolerances in the state-of-the-art device integration and propose countermeasures in device design. Nominal and three-sigma-corner device characteristics generated in quantum-mechanical/TCAD simulations are used to calibrate a semiempirical compact model, based on which the nominal and variability-inclusive energy-delay landscapes are extracted from ring-oscillator circuit simulations at sub-500-mV supply voltages. Variations in four parameters are identified as of major impact on the worst-case speed loss and iso-speed energy penalty: dopant pocket thickness, gate work function, hetero-band offset, and body thickness (in descending order). Variability-resilient device options are explored against pocket thickness variation, including: 1) pocket desensitization with increased thickness and reduced doping concentration and 2) broken-gap tunnel FET with a negative effective band gap. Reengineered devices achieve $< 18\times $ speed loss and $< 3\times $ energy penalty for (0.1–1) ns gate delay with respect to the nominal corner. [ABSTRACT FROM AUTHOR]

In this letter, a group of laterally coupled alternating thickness (LCAT) mode resonators based on 12% scandium-doped aluminum nitride (Sc0.12Al0.88N) are reported. The LCAT mode resonators are realized in-house by sandwiching a layer of 1- $ {\mu }\text{m}$ -thick Sc0.12Al0.88N between the top two sets and the bottom two sets of interdigitated electrode (IDE) fingers, all made of molybdenum (Mo). The experimental results show that an effective electromechanical coupling coefficient ($ {k}_{{\text {eff}}}^{{2}}$) of more than 10% and loaded quality factors ($ {Q}_{ {L}}$) as high as 870 are obtained, while the motional resistance of the resonators is kept as low as 0.68 $ {\Omega }$. The figure-of-merit (FoM) which is defined as $ {k}_{{\text {eff}}}^{{2}}~{Q}_{L}$ and phase velocity ($ {v}_{ {p}}$) is subsequently derived to be 87 and 7840 m/s, respectively. By changing the pitch of the IDE fingers, the resonators can operate from 1.96 GHz to 2.11 GHz without significant perturbation to their performance, corresponding to a lithographic frequency tuning range of 7.5%. In addition, clean spectra without any spurious modes are obtained within a 1-GHz frequency range for all fabricated devices of various pitches, making a significant step forward in the commercialization path of the reported resonators in the applications of the high-band selection filters integrated on a single chip for mobile communication. [ABSTRACT FROM AUTHOR]

The combination of network virtualization and software-defined networking enables an infrastructure provider to create software-defined virtual networks (vSDNs) over a shared substrate network (SNT), for supporting new network services more timely and cost-effectively. Meanwhile, as both the services and traffic in the Internet are becoming more and more dynamic, how to properly maintain vSDNs in a dynamic network environment exhibits increasing importance but still has not been fully explored. In this paper, we conduct a study on how to realize proactive and hitless vSDN reconfiguration to balance the utilization of ternary content-addressable memory (TCAM) in a dynamic SNT. Specifically, we consider both algorithm design and system prototyping. From the algorithmic perspective, we try to solve the problems of “what to reconfigure” and “how to reconfigure”. A selection algorithm is designed to proactively choose the virtual switches (vSWs) that should be migrated to other substrate switches for balancing TCAM utilization, i.e., solving what to reconfigure. Then, for the problem of how to reconfigure, i.e., where to re-map the selected vSWs and the virtual links connecting to them, we formulate a mixed integer linear programming model to solve it exactly, and design two heuristics to improve time efficiency. Next, we move to the system part, implement the proposed algorithms in our protocol-oblivious forwarding enabled network virtualization hypervisor system, and conduct experiments to demonstrate proactive and hitless vSDN reconfiguration. The experimental results indicate that our proposal does make vSDN reconfiguration transparent to the vSDNs’ virtual controllers and proactive, and when reconfiguring a vSDN with live traffic, it achieves hitless operations without traffic disruption. [ABSTRACT FROM AUTHOR]

Network slicing enables diversified services to be accommodated by isolated slices in network function virtualization-enabled software-defined networks. To maintain satisfactory user experience and high profit for service providers in a dynamic environment, a slice may need to be reconfigured according to the varying traffic demand and resource availability. However, frequent reconfigurations incur certain cost and might cause service interruption. In this paper, we propose a hybrid slice reconfiguration (HSR) framework, where a fast slice reconfiguration (FSR) scheme reconfigures flows for individual slices at the time scale of flow arrival/departure, while a dimensioning slices with reconfiguration (DSR) scheme is occasionally performed to adjust allocated resources according to the time-varying traffic demand. In order to optimize the slice’s profit, i.e., the total utility minus the resource consumption and reconfiguration cost, we formulate the problems for FSR and DSR, which are difficult to solve due to the discontinuity and non-convexity of the reconfiguration cost function. Hence, we approximate the reconfiguration cost function with ${L} _{1}$ norm, which preserves the sparsity of the solution, thus facilitating restricting reconfigurations. Besides, we design an algorithm to schedule FSR and DSR, so that DSR is timely triggered according to the traffic dynamics and resource availability to improve the profit of slice. Furthermore, we extend HSR with a resource reservation mechanism, which reserves partial resources for near future traffic to reduce potential reconfigurations. Numerical results validate that our reconfiguration framework is effective in reducing reconfiguration overhead and achieving high profit for slices. [ABSTRACT FROM AUTHOR]

The purpose of this paper is to study tradeoffs between efficiency and precision for the general virtual network embedding (VNE) problem. To narrow the gap between solutions contributed by previous heuristic schemes and the optimal solution, and to ease the unacceptable computational burden of optimization approaches to VNE for large-scale networks, we propose the use of graph eigenspace notions for node mapping, that is, for associating virtual nodes to substrate nodes (SNs). We also contribute an inexact algorithm which projects all SNs to a 2-D eigenspace for generating a more efficient node mapping. There are some similarities between our method and numerous graph-matching strategies emerging in machine learning fields, but there are also some differences between the two, because the VNE problem is not strictly mathematical with respect to the mapping it seeks. Thus, we provide the relevant theoretical evidence to guarantee the solution quality of our scheme compared with a couple of previous VNE proposals. Simulation results demonstrate that our schemes can reach a better tradeoff point regarding runtime (that approaches the overhead of implementing eigendecomposition of a general matrix) and embedding quality metrics. Besides, our inexact algorithm using 2-D projection exhibits an improvement in quality over previous node-rank-based methods. [ABSTRACT FROM AUTHOR]

The development of high-sensitive and economical strain sensors is crucial for precise and efficient measurement of ultra-small strain in industrial applications. This paper reports a microfabricated strain sensor based on aluminum nitride (AlN) combined with a metal-oxide-semiconductor field effect transistor (MOSFET). A high-quality AlN thin film works as a sensing element, which is connected electrically to the gate electrode of the MOSFET for the amplification of piezoelectric response of the AlN thin film. The pseudo gauge factor (GF) of the MOSFET is evaluated from the source-drain resistance change under the application of stress to the piezoelectric AlN thin film. A GF of as high as 1340 is obtained, which is seven times larger than the best GF demonstrated for the state-of-the-art silicon piezoresistive strain sensor. The exponential change of drain-source current with gate voltage in subthreshold region of the MOSFET offers a large enhancement of the sensitivity of such sensors. The developed strain sensor has various applications in strain and stress measurements in an ultra-small strain range. [ABSTRACT FROM AUTHOR]

GaN was grown on the sputtered AlN/patterned sapphire substrate under two growth modes by metal–organic chemical vapor deposition, which was named as “rising tide” and “tsunami” growth modes, respectively, due to different characteristics of the GaN growth process. High-quality GaN epilayer was obtained under “tsunami” growth mode, and the full-width at half-maximums of GaN (002)/(102) high-resolution X-ray diffraction rocking curves were 58/90 arcsec. The green InGaN/GaN light-emitting diodes fabricated on GaN under “tsunami” growth mode exhibited both higher light output power and external quantum efficiency. By monitoring the GaN films at different growth stages using the scanning electron microscope and the transmission electron microscope as well as cathodoluminescence, the dislocation annihilation mechanisms were researched. Under “tsunami” growth mode, GaN grew into the shape of a truncated pyramid that promoted dislocations originated from flat area bend toward the inclined planes, and it was noteworthy that the propagation of dislocations in grains on the conical surface was inhibited. While under “rising tide” growth mode, the dislocations on the conical surface had chances to extend. [ABSTRACT FROM AUTHOR]

This work describes a new method to enhance the electromechanical coupling coefficient ($k_{t}^{2}$) of 2-D mode resonators (2DMRs). This approach exploits the multimodal excitation of different Lamb waves to achieve a quasi-uniform vertical displacement distribution in the electrode regions of 2DMRs. To do so, the 2DMRs reported in this work rely on the use of metal frame structures placed at the edges of each metal strip forming the electrode gratings. To demonstrate the effectiveness of this new technique in enhancing $k_{t}^{2}$ , we report the design and simulated performance through the finite-element methods of a 2.5-GHz 2DMR using metal frames. Our analysis proves that this device can simultaneously exhibit high $k_{t}^{2}$ in excess of 6.4% and wide lithographic frequency tunability in excess of 10%, thus approaching the reported performance of aluminum nitride (AlN) film bulk acoustic resonators (FBARs) operating within the same frequency range. [ABSTRACT FROM AUTHOR]

We studied the impact of boundary walls and inclusions to the charge collection efficiency (CCE) of cadmium telluride (CdTe) pad detectors. By using ion beam-induced charge (IBIC) analysis, we were able to locate and classify various defects. We used 2-MeV protons that have a penetration depth of about 40 $\mu \text{m}$ in bulk CdTe. The detectors we measured had a surface area of 1 cm $\times \,\, 1$ cm and a thickness of 1 mm. They were passivated either by using aluminum nitride (AlN) or by aluminum oxide (Al2O3) and had a mesh of titanium tungsten Schottky contacts on both anode and cathode sides. In this paper, we show the results of our measurements and analyze the potential impact of the found defects on the performance of CdTe detectors with Geant4 simulations. [ABSTRACT FROM AUTHOR]

With a view to the expected increased data traffic volume and energy consumption of the fifth generation networks, the use of renewable energy (RE) sources and infrastructure sharing have been embraced as energy and cost-saving technologies. Aiming at reducing cost and grid energy consumption, in the present paper, we study RE exchange (REE) possibilities in late-trend network deployments of energy harvesting (EH) macrocell and small cell base stations (EH-MBSs, EH-SBSs) that use an EH system, an energy storage system, and the smart grid as energy procurement sources. On this basis, we study a two-tier network composed of EH-MBSs that are passively shared among a set of mobile network operators (MNOs), and EH-SBSs that are provided to MNOs by an infrastructure provider (InP). Taking into consideration the infrastructure location and the variety of stakeholders involved in the network deployment, we propose as REE approaches 1) a cooperative RE sharing, based on bankruptcy theory, for the shared EH-MBSs and 2) a non-cooperative, aggregator-assisted RE trading, which uses double auctions to describe the REE acts among the InP provided EH-SBSs managed by different MNOs, after an initial internal REE among the ones managed by a single MNO. Our results display that our proposals outperform baseline approaches, providing a considerable reduction in SG energy utilization and costs, with satisfaction of the participant parties. [ABSTRACT FROM AUTHOR]

This letter reports a non-reciprocal filter based on the use of nonlinearities in high quality-factor ($ {Q}$) silicon micro-acoustic resonators with asymmetric piezoelectric transducers. The two-port resonators are created by the integration of 120-nm piezoelectric aluminum nitride and 10-nm ferroelectric hafnium–zirconium-oxide transducers atop of 70-nm single-crystal silicon. The asymmetric electromechanical transduction architecture results in highly contrasted power-handing of the micro-acoustic resonator when excited at different ports, resulting in non-reciprocal transmission response for excitation powers beyond a certain threshold. A proof-of-concept filter at 253 MHz with 0.25% −3-dB bandwidth is implemented through electrical coupling of two asymmetrically transduced resonators with individual ${Q}$ of ~870. The filter demonstrates a non-reciprocal transmission ratio of ~16 dB for input power exceeding 5 dBm. [ABSTRACT FROM AUTHOR]

A microelectromechanical-system piezoelectric pressure sensor targeting hypersonic flow applications is presented. The sensing diaphragms have 500- $\mu \text{m}$ diameter and are comprised of a composite stack of Si, SiO2, and AlN. This paper presents the fabrication and packaging details of the sensor and then presents test results from a Mach-6 hypersonic-flow facility, in which the prototype sensor data are compared against data from a mature commercial sensor present in the same tests. Salient hypersonic-flow features are observed in signals captured by the prototype. The package is comprised of an on-chip two-element array with 650- $\mu \text{m}$ pitch, and signals from the elements captured during hypersonic-flow tests are highly correlated. [2018-0196] [ABSTRACT FROM AUTHOR]

In this paper, the carrier transport mechanisms in AlN nucleation layers grown by MOCVD on p-Si and p-silicon-on-insulator (SOI) substrates were investigated by using electrical characterizations at various electric fields and temperatures on Ni-Au/AlN/Si metal–insulator–semiconductor capacitors. For the case of the AlN on Si substrate, different contact schemes, i.e., top–bottom versus top–top, have been compared. It was found by capacitance–voltage measurements that an inversion channel related to the Shockley–Read–Hall (SRH) minority carrier generation in the silicon bulk and SOI substrates was formed. It showed that the AlN on p-SOI platform exhibited the same leakage mechanisms as for the AlN on the Si substrate. The contact scheme mainly affects the low forward and reverse bias characteristics, by adding a surface leakage contribution. At increasing the forward (positive) gate bias, the carrier transport process becomes in turn ohmic, variable-range hopping, SRH generation, and Fowler–Nordheim (FN) direct tunneling. Moreover, at the reverse bias, the carrier transportation is in turn dominated by the Schottky emission, Poole–Frenkel (PF) conduction, and FN direct tunneling with increasing bias. [ABSTRACT FROM AUTHOR]

Using a 2D metallic grating, we demonstrate the resonant enhancement of the external quantum efficiency of an nBn structure with a 0.5 $\mu \text{m}$ -thick-absorber. A total of two structures were studied with different barrier materials: ternary AlInSb and an InAs/AlInSb superlattice (SL). The device using an SL barrier had a diffusion-limited dark current of 6.7 $\mu \text{A}$ /cm2 at 150 K, which was four times lower than the ternary-barrier device. The surface plasmon polariton (SPP) resonance wavelength for devices with six different grating periods varied as predicted by simulations. The quantum efficiency (QE) was enhanced by up to 56% by coupling to the SPP mode. A peak external QE of 39% was achieved at $4~\mu \text{m}$ with a 1100 nm grating period. [ABSTRACT FROM AUTHOR]

Network slicing is a key concept in 5G networking. It enables an infrastructure provider (InP) to support heterogeneous services over a common platform by creating a customized slice for each one of them. Once in operation, the slices can be dynamically scaled up/down to match the variation of service requirements. Although an InP generates revenue by accepting a slice request, however it might need to pay a penalty (proportional to the level of service degradation) if a slice cannot be scaled up when required. Hence, it becomes crucial to decide which slice requests should be accepted in order to maximize the net profit of an InP. This paper presents a slice admission strategy based on big data analytics (BDA) predictions. The intuition is to accept a slice request only when it is estimated that no service degradation will take place for both the incoming slice request and the slices already in operation. In this way, the penalty paid by an InP is contained, with beneficial effects on the overall net profit. Apart from simulations, the performance of the proposed admission policy has also been evaluated using emulation. Simulation results show that, in the presence of a high penalty due to service degradation, using BDA predictions brings up to 50.7% increase in profit, as compared to a slice admission policy without BDA. Emulation results for a small network scenario show a profit increase of up to 38.3% with only a small impact on the slice provisioning time (i.e., due to the processing of BDA predictions). [ABSTRACT FROM AUTHOR]

High-frequency InGaAs-On-Si MOSFETs with gate lengths down to 14 nm and a Si CMOS compatible fabrication flow are demonstrated. Record high combined $\text{f}_{\text {t}}$ and $\text{f}_{\text {max}}$ of 370 and 310 GHz, respectively, for III-V MOSFETs on Si is achieved. The key features include an InP/10 nm In0.75Ga0.25As/InP quantum well in the channel, as well as, self-aligned 8 nm thick source and drain spacers together with source and drain extensions, which minimize the parasitic access resistances due to the spacers. The use of the quantum well is shown to increase the electron mobility by a factor of three, resulting in a significant increase of $\text{g}_{\text {m}}$ due to a reduction of defect scattering at the gate oxide interface. The InP barrier is also shown to suppress the effect of border traps, through a reduction of the $\text{g}_{\text {m}}$ frequency dispersion. [ABSTRACT FROM AUTHOR]

Comprehensive simulation results are reported for the source/drain (S/D) geometry effects on the drive current of various n-type (Si, In0.53Ga0.47As, Ge) and p-type (Si, Ge) metal–oxide–semiconductor field-effect transistors (MOSFETs). Full-band Monte Carlo (MC) simulations are run for different S/D structures (“raised” versus “lateral”) at a relevant International Technology Roadmap on Semiconductors node (gate length 14 nm). The “lateral” S/D gives higher drive currents (lower parasitic resistance) than the “raised” S/D because carriers do not need to make large momentum changes through scattering to get injected into the channel or to get collected by the drain, unlike in the “raised” S/D where 90°-turns are required. The S/D geometry effect is significant for novel materials with light effective mass and low scattering rate (e.g., ~20% on-current change in In0.53Ga0.47As) while it is still not negligible (up to ~5%) for conventional Si. The effect is more pronounced with small contact resistivity and low-S/D doping density. The classical model (drift–diffusion) captures only a part of the S/D geometry effect. In MOSFET benchmarking for future technology nodes, it should be critical to consider the S/D structure effect using rigorous models (such as MC) to correctly project the drive current performance, especially for novel materials with high mobility. [ABSTRACT FROM AUTHOR]

A scaling study of excess OFF-state current in planar InGaAs quantum-well MOSFETs is reported. We find that pure band-to-band tunneling (BTBT) dominates the drain OFF-state current in deviceswith channel length above $\sim 1~\mu \text{m}$. In this regime, the drain–gate voltage sets the rate of BTBT. In devices with channel lengths below $\textsf {1}~\mu \text{m}$ , a parasitic bipolar transistor effect becomes relevant. The bipolar current gain is found to scale inversely with the effective channel length for Lg between 70 nm and $\textsf {1}~\mu \text{m}$ , as expected from simple bipolar transistor theory. For Lg below ~7 nm, the OFF-state current increases rapidly due to an enhancement in bipolar current gain as a result of strong short-channel effects and punchthrough. Current gains in excess of 104 have been observed. A reduction in channel thickness decreases both BTBT and the bipolar gain effect. [ABSTRACT FROM AUTHOR]

We report on the hybrid ZnO/AlN/Si heterostructure-based ultraviolet (UV) photodetectors with infrared- and visible-blind characteristics. The heterostructure was formed by depositing ZnO thin films on Si (111) substrate by introducing an AlN as an intermediate layer. The ZnO film has been grown epitaxially on the underlying substrate with the improved crystallinity and excellent optical properties. The vertical transport properties of the ZnO/AlN/Si heterojunction under dark and light illumination demonstrate the intrinsic infrared- and visible-blind characteristics with excellent ultraviolet responsivity. The heterostructure exhibits a high UV responsivity of 14.5 A/W with UV-to-Infrared rejection ratio of nearly 4 orders of magnitude. The vertical electrical transport properties across the heterostructure are dominated by the holes in the reverse bias condition, whereas the transport of electrons in the forward bias is hindered at the ZnO/AlN interface due to an existence of huge conduction band offset between ZnO and AlN layers. The AlN intermediate layer acts as an electron blocking layer which allows the hole to transport across the heterostructure in the reverse bias condition. [ABSTRACT FROM AUTHOR]

High thermal conductive epoxy composites are particularly suitable for the impregnation process of superconducting power equipment due to their high electrical insulation property and low thermal expansion. In this study, the preparation and impregnation procedures of high thermal conductive epoxy (EP) composites were investigated first. Based on the orthogonal experiment results and the range analysis, the critical factors affecting on the thermal conductivity of final product in sequence were determined as aluminum nitride (AlN) filler content, filling ratio of AlN with different sizes, curing temperature, and surface modification method of AlN fillers. Through investigating the preparation factors of thermal conductive AlN/EP composites on their electrical insulation properties further, it was found that the increase of filler content, addition of nanofillers, and low curing temperature are advantageous for improving the electrical insulation property of composites. This study offers an experimental basis for the preparation and electrical application of dielectric polymer composites with high thermal conductivity in HTS equipment’ manufacture. [ABSTRACT FROM AUTHOR]

Network virtualization provides a promising tool to allow multiple virtual networks (VNs) to run on a shared substrate network (SN) simultaneously. VN embedding (VNE) is one of the key technologies of network virtualization. The main goal of VNE is to effectively map VN requests to the SN, which is efficiently utilizes the network resources. The emergence of software defined networks provides a platform for network virtualization to be used and promoted. In a real environment, the resource requirements of tenants are generally different. A single VN mapping algorithm can not effectively handle the multi-demand problem of tenants. We propose a self-adaptive VNE algorithm. VN requests are divided into different types by an adaptive algorithm, we use an integer linear programming formulation to solve VNE problem. This paper considers three different types of VN requests. Type 1 VN requests for high bandwidth requirements, type 2 VN requests for low latency requirements, and type 3 VN requests for high bandwidth requirements and latency requirements. The simulation results show that the virtual network embedding algorithm proposed in this paper can make full use of the SN resources and improve the overall revenue, while effectively dealing with the multi-demand problem of tenants. [ABSTRACT FROM AUTHOR]