Search

Communication and information technologies shape the world’s systems of today, and those systems shape our society. The security of those systems relies on mathematical problems that are hard to solve for classical computers, that is, the available current computers. Recent advances in quantum computing threaten the security of our systems and the communications we use. In order to face this threat, multiple solutions and protocols have been proposed in the Post-Quantum Cryptography project carried on by the National Institute of Standards and Technologies. The presented work focuses on defining a formal framework in Maude for the security analysis of different post-quantum key encapsulation mechanisms under assumptions given under the Dolev-Yao model. Through the use of our framework, we construct a symbolic model to represent the behaviour of each of the participants of the protocol in a network. We then conduct reachability analysis and find a man-in-the-middle attack in each of them and a design vulnerability in Bit Flipping Key Encapsulation. For both cases, we provide some insights on possible solutions. Then, we use the Maude Linear Temporal Logic model checker to extend the analysis of the symbolic system regarding security, liveness and fairness properties. Liveness and fairness properties hold while the security property does not due to the man-in-the-middle attack and the design vulnerability in Bit Flipping Key Encapsulation.

As an advantageous technique and service, the blockchain has shown great development and application prospects. However, its security has also met great challenges, and many security vulnerabilities and attack issues in blockchain-based services have emerged. Recently, security issues of blockchain have attracted extensive attention. However, there is still a lack of blockchain security research from a full-stack architecture perspective, as well as representative quantitative experimental reproduction and analysis. We aim to provide a security architecture to solve security risks in blockchain services from a full-stack architecture perspective. Meanwhile, we propose a formal definition of the full-stack security architecture for blockchain-based services, and we also propose a formal expression of security issues and defense solutions from a full-stack security perspective. We use ConCert to conduct a smart contract formal verification experiment by property-based testing. The security vulnerabilities of blockchain services in the Common Vulnerabilities and Exposures (CVE) and China Nation Vulnerability Database (CNVD) are selected and enumerated. Additionally, three real contract-layer real attack events are reproduced by an experimental approach. Using Alibaba's blockchain services and Identity Mixer in Hyperledger Fabric as a case study, the security problems and defense techniques are analyzed and researched. At last, the future research directions are proposed.

This paper analyzes the underlying logic of the processor's behavior level code. It proposes an automatic model construction and formal verification method for the cache consistency protocol with the aim of ensuring data consistency in the processor and the correctness of the cache function. The main idea of this method is to analyze the register transfer level (RTL) code directly at the module level and variable level, and extract the key modules and key variables according to the code information. Then, based on key variables, conditional behavior statements are retrieved from the code, and unnecessary statements are deleted. The model construction and simplification of related core states are completed automatically, while also simultaneously generating the attribute library to be verified, using "white list" as the construction strategy. Finally, complete cache consistency protocol verification is implemented in the model detector UPPAAL. Ultimately, this mechanism reduces the 142 state-transition path-guided global states of the cache module to be verified into 4 core functional states driven by consistency protocol implementation, effectively reducing the complexity of the formal model, and extracting 32 verification attributes into 6 verification attributes, reducing the verification time cost by 76.19%. [ABSTRACT FROM AUTHOR]

There are many security challenges in IoT, especially related to the authentication of restricted devices in long-distance and low-throughput networks. Problems such as impersonation, privacy issues, and excessive battery usage are some of the existing problems evaluated through the threat modeling of this work. A formal assessment of security solutions for their compliance in addressing such threats is desirable. Although several works address the verification of security protocols, verifying the security of components and their non-locking has been little explored. This work proposes to analyze the design-time security of the components of a multi-factor authentication mechanism with a reputation regarding security requirements that go beyond encryption or secrecy in data transmission. As a result, it was observed through temporal logic that the mechanism is deadlock-free and meets the requirements established in this work. Although it is not a work aimed at modeling the security mechanism, this document provides the necessary details for a better understanding of the mechanism and, consequently, the process of formal verification of its security properties. [ABSTRACT FROM AUTHOR]

Formal methods are proven techniques that provide a rigorous mathematical basis to software development. In particular, they allow the quality of development to be effectively improved by making accurate and explicit modelling, so that anomalies like ambiguities and incompleteness are identified in the early phases of the software development process. Semi‐formal UML models and formal Timed Automata models are used to design a telerehabilitation system through a practical approach based on abstraction and refinement. The formal verification of expected properties of the system is performed by the Uppaal tool. The motivation of this work is threefold: (i) showing the usefulness of formal methods to satisfy the validation needs of a medical telerehabilitation system; (ii) demonstrating our approach of system analysis through refinements to guide the development of a complex system; and (iii) highlighting, from a real‐life experience, the usefulness of models to involve the stakeholders all along the design of a system, from requirements to detailed specifications. [ABSTRACT FROM AUTHOR]

Nowadays, large-scale software systems in many domains, such as smart cities, involve multiple parties whose privacy policies may conflict with each other, and thus, data privacy violations may arise even without users being aware of it. In this context, identifying data security requirements and detecting potential privacy violations are crucial. In the area of model-based security requirements analysis, numerous research efforts have been done. However, few existing studies support automatic privacy violation identification from software requirements. To fill this gap, this paper presents MBIPV, a Model-Based approach for Identifying Privacy Violations from software requirements. First, this paper identifies six types of privacy violations in software requirements. Second, the MBIPV profile is proposed to support modeling software requirements using UML. Third, the MBIPV prototype tool is developed to generate formal models and corresponding privacy properties automatically. Then, the privacy properties are automatically verified by model checking. We evaluated the MBIPV method through case studies of four representative software systems from different domains: smart health, smart transportation, smart home, and e-commerce. The results show that MBIPV has high accuracy and efficiency in identifying the privacy violations from the software requirements. To the best of our knowledge, MBIPV is the first model-based approach that supports the automatic verification of privacy properties of UML software requirement models. The source code of the MBIPV tool and the experimental data are available online at https://github.com/YETONG1219/MBIPV. [ABSTRACT FROM AUTHOR]

The Internet of Things (IoT) has brought about a new era of connected devices and systems, with applications ranging from healthcare to transportation. However, the reliability and security of these systems are critical concerns that must be addressed to ensure their safe and effective operation. This paper presents a survey of formal verification and validation (FV&V) techniques for IoT systems, with a focus on the challenges and open issues in this field. We provide an overview of formal methods and testing techniques for the IoT and discuss the state explosion problem and techniques to address it. We also examined the use of AI in software testing and describe examples of tools that use AI in this context. Finally, we discuss the challenges and open issues in FV&V for the IoT and present possible future directions for research. This survey paper aimed to provide a comprehensive understanding of the current state of FV&V techniques for IoT systems and to highlight areas for further research and development. [ABSTRACT FROM AUTHOR]

Green's theorem is widely used in physics, hydrodynamics, chemistry and other fields. Traditional computer simulation and numerical calculation methods are usually used to build the system model based on Green's theorem. However, the possible system defects in the tool software lead to the deviation of the model, which makes the task fail. In order to solve the above problems, this paper adopts the formalization method based on higher-order logic to realize the higher-order logic modeling and verification of Green's theorem related content in the theorem prover HOL Light. Firstly, the basic concepts and properties of gradient and divergence are formally described. Secondly, formal modeling and verification of Green's theorem and its properties are carried out. Finally, the high-level logical derivation of groundwater control model is completed based on the formal model of Green's theorem, so as to ensure the safety of the system model. [ABSTRACT FROM AUTHOR]

Considering the resource limitations of low-cost wireless sensors, there is a growing inclination to utilize cryptographic primitives that are optimized for efficiency, such as symmetric key encryption/decryption and hash functions, when designing authentication schemes. However, designing a lightweight authentication scheme that can meet various security requirements poses a significant challenge. In recent years, numerous lightweight authentication schemes have been proposed in order to address these security needs. Nevertheless, recent research has revealed that many of these schemes exhibit security vulnerabilities and design deficiencies, including challenges related to asynchronization and impractical gateway-node search operations. Due to the inadequate security of existing schemes, this study introduces a novel privacy-preserving authentication scheme that aims to provide adaptive resilience against desynchronization attacks in wireless body area networks (WBANs). The proposed scheme utilizes lightweight cryptographic modules to optimize efficiency. To ensure user anonymity, the Chinese Remainder Theorem technique is employed, whereas forward secrecy and resistance to desynchronization attacks are achieved through the use of one-way hash chains and serial numbers, respectively. Through extensive analysis and comparisons, the proposed scheme is demonstrated to strike a fine balance between security and efficiency. [ABSTRACT FROM AUTHOR]

Interest in machine learning and neural networks has increased significantly in recent years. However, their applications are limited in safety-critical domains due to the lack of formal guarantees on their reliability and behavior. This paper shows recent advances in satisfiability modulo theory solvers used in the context of the verification of neural networks with piece-wise linear and transcendental activation functions. An experimental analysis is conducted using neural networks trained on a real-world predictive maintenance dataset. This study contributes to the research on enhancing the safety and reliability of neural networks through formal verification, enabling their deployment in safety-critical domains. [ABSTRACT FROM AUTHOR]

In recent years, formal verification technology has received more and more attention, and it plays an important role in ensuring the safety and correctness of systems in safety-critical areas. As a branch of formal verification with a high degree of automation, model checking has a very broad development prospect. This study analyzes and proposes a new model checking technique, which can effectively check transition systems, including bug-finding and safety proof. Different from existing model checking algorithms, the proposed method, Unsatisfiable Core (UC)-based Approximate Incremental Reachability (UAIR), mainly utilizes the UC to solve a series of candidate safety invariants until the final invariant is generated, so as to realize safety proof and bug-finding. In symbolic model checking based on the SAT solver, this study uses the UC obtained by the satisfiability solver to construct the candidate safety invariant, and if the transition system itself is safe, the obtained initial invariant is only an approximation of the safety invariant. Then, while checking the safety, the study incrementally improves the candidate safety invariant until it finds a true invariant that proves the system is safe; if the system is unsafe, the method can finally find a counterexample to prove the system is unsafe. The brand new method exploits UCs for safety model checking and achieves good results. It is known that there is no absolute best method in the field of model checking. Although the proposed method cannot surpass the current mature methods such as IC3 and complement Approximate Reachability (CAR), in terms of the number of solvable benchmarks, the method in this paper can solve three cases that other mature methods are unable to solve. It is believed that the method can be a valuable addition to the model checking toolset. [ABSTRACT FROM AUTHOR]

Model‐Based Systems Engineering (MBSE) has been utilized in practice to design and behavioral modeling cyber‐physical systems. The Vee model helps frame MBSE's lifecycle approach, with system verification a vital aspect of the qualification process. However, popular modeling language tools in MBSE, such as Systems Modeling Language (SysML), are incapable of formally verifying these systems. Model checking allows for the development of formal system models similar in abstraction to SysML models for automatically checking if these formal models satisfy formal specifications. We propose an approach to translate behavioral diagrams in SysML, such as state‐machine diagrams, to the popular symbolic model checker NuSMV for formal verification. As a case study, we apply this process to autonomous multi‐differential drive robots (DDR). Subsequently, the NuSMV model is verified against some formal operational specifications obtained from the requirements diagram of the DDR. This system verification approach can help System Engineers identify design flaws or incorrect modeling or specifications that could be missed during the design phase through the results of the model checking process. [ABSTRACT FROM AUTHOR]

Unmanned aerial vehicles (UAV) play a vital role in many fields, such as agricultural planting, security patrol, emergency rescue, and so on. The development and implementation of these devices have become vital in terms of reachability and usability. Unfortunately, as drones become more widely used in various fields, they become more and more vulnerable to attacks and security threats, including, but not limited to, eavesdropping, man-in-the-middle attacks, and known session key attacks. In order to deal with these attacks and security threats and meet the needs of lightweight UAV communication, a secure and efficient authentication scheme is essential. To meet the security and lightweight requirements of an identity authentication scheme in a UAV communication network, this paper proposes an identity authentication scheme sdronelig based on an elliptic curve cryptosystem. The scheme realizes the mutual authentication and session key agreement configuration between the UAV and the ground station, and the authentication and key agreement between the UAVs can be realized with the help of the control station. The sdronelig authentication scheme is based on the ECDH key exchange protocol in the elliptic curve cryptography algorithm and adopts the MAC message authentication code technology and the method of pre-calculating part of the process. Under the premise of ensuring the security of the UAV communication network, the authentication efficiency is improved, the communication overhead and communication times are reduced, and the lightweight requirement of the UAV authentication scheme is met. Additionally, a formal verification tool is used to verify the security of the sdronelig scheme under the Dolev-Yao threat model, which is suitable for UAV networks. Finally, a detailed comparative study was conducted on security features, communication overhead, the number of communications, and computational overhead. The results show that the proposed sdronelig authentication scheme not only provides superior security features but also has better or comparable overhead compared to other existing authentication schemes. [ABSTRACT FROM AUTHOR]

Verification of chatbot conversational flows is paramount to capturing and understanding chatbot behavior and predicting problems that would cause the entire flow to be restructured from scratch. The literature on chatbot testing is scarce, and the few works that approach this subject do not focus on verifying the communication sequences in tandem with the functional requirements of the conversational flow itself. However, covering all possible conversational flows of context-oriented chatbots through testing is not feasible in practice given the many ramifications that should be covered by test cases. Alternatively, model checking provides a model-based verification in a mathematically precise and unambiguous manner. Moreover, it can anticipate design flaws early in the software design phase that could lead to incompleteness, ambiguities, and inconsistencies. We postulate that finding design flaws in chatbot conversational flows via model checking early in the design phase may overcome quite a few verification gaps that are not feasible via current testing techniques for context-oriented chatbot conversational flows. Therefore, in this work, we propose a modeling strategy to design and verify chatbot conversational flows via the Uppaal model checking tool. Our strategy is materialized in the form of templates and a mapping of chatbot elements into Uppaal elements. To evaluate this strategy, we invited a few chatbot developers with different levels of expertise. The feedback from the participants revealed that the strategy is a great ally in the phases of conversational prototyping and design, as well as helping to refine requirements and revealing branching logic that can be reused in the implementation phase. [ABSTRACT FROM AUTHOR]

With the proliferation of the Internet of Things devices and cyber-physical systems, there is a growing demand for highly functional and high-quality software. To address this demand, it is crucial to employ effective software verification methods. The proposed method is based on the use of physical quantities defined by the International System of Units, which have specific physical dimensions. Additionally, a transformation of the physical value orientation introduced by Siano is utilized. To evaluate the effectiveness of this method, specialized software defect models have been developed. These models are based on the statistical characteristics of the open-source C/C++ code used in drone applications. The advantages of the proposed method include early detection of software defects during compile-time, reduced testing duration, cost savings by identifying a significant portion of latent defects, improved software quality by enhancing reliability, robustness, and performance, as well as complementing existing verification techniques by focusing on latent defects based on software characteristics. By implementing this method, significant reductions in testing time and improvements in both reliability and software quality can be achieved. The method aims to detect 90% of incorrect uses of software variables and over 50% of incorrect uses of operations at both compile-time and run-time. [ABSTRACT FROM AUTHOR]

The Medical Internet-of-Things (MIoT) has developed revolutionary ways of delivering medical care to patients. An example system, showing increasing demand, is the artificial pancreas system that offers convenience and reliable support care to patients with Type 1 Diabetes. Despite the apparent benefits, the system cannot escape potential cyber threats that may worsen a patient's condition. The security risks need immediate attention to ensure the privacy of the patient and preserve safe functionality. Motivated by this, we proposed a security protocol for the APS environment wherein support to essential security requirements is guaranteed, the security context negotiation is resource-friendly, and the protocol is resilient to emergencies. Accordingly, the security requirements and correctness of the design protocol were formally verified using BAN logic and AVISPA, and proved its feasibility through the emulation of APS in a controlled environment using commercial off-the-shelf devices. Moreover, the results of our performance analysis indicate that the proposed protocol is more efficient than the other existing works and standards. [ABSTRACT FROM AUTHOR]

In this article, we present a derivative-based, functional recognizer and parser generator for visibly pushdown grammars. The generated parser accepts ambiguous grammars and produces a parse forest containing all valid parse trees for an input string in linear time. Each parse tree in the forest can then be extracted also in linear time. Besides the parser generator, to allow more flexible forms of the visibly pushdown grammars, we also present a translator that converts a tagged CFG to a visibly pushdown grammar in a sound way, and the parse trees of the tagged CFG are further produced by running the semantic actions embedded in the parse trees of the translated visibly pushdown grammar. The performance of the parser is compared with popular parsing tools, including ANTLR, GNU Bison, and other popular hand-crafted parsers. The correctness and the time complexity of the core parsing algorithm are formally verified in the proof assistant Coq. [ABSTRACT FROM AUTHOR]

This paper presents a summary and meta-analysis of the first three iterations of the annual International Verification of Neural Networks Competition (VNN-COMP), held in 2020, 2021, and 2022. In the VNN-COMP, participants submit software tools that analyze whether given neural networks satisfy specifications describing their input-output behavior. These neural networks and specifications cover a variety of problem classes and tasks, corresponding to safety and robustness properties in image classification, neural control, reinforcement learning, and autonomous systems. We summarize the key processes, rules, and results, present trends observed over the last three years, and provide an outlook into possible future developments. [ABSTRACT FROM AUTHOR]

The Internet of Things (IoT) generates vast amounts of data from numerous applications. However, since wireless channels are the primary means of communication, IoT networks are vulnerable to several security threats, which can compromise their security and privacy. To address these issues, various user authentication protocols have been proposed. Thus, it is still a challenge to provide multi-granularity verifications for different authentications of the IoT. In this paper, we propose a multi-granularity formal framework of user authentication for the IoT (MFF-IoT). Our framework builds different formal models (specification language HLPSL models, process algebra CSP models, Timed CSP models, and timed automata) to complete multi-granularity formal verification. By using both coarse-grained and fine-grained modeling, we can balance the tradeoff between model complexity and verification accuracy. Specifically, our fine-grained models provide a more detailed representation of the framework's behavior and enable us to perform timing-related probability analysis. As these formal models can be implemented by model-checking tools (AVISPA, PAT with C#, and UPPAAL), important properties and features can be analyzed and verified. We also propose several algorithms for better formal model building and evaluate our framework with a case study to show its practicality and effectiveness. [ABSTRACT FROM AUTHOR]

The universality check of Büchi automata is a foundational problem in automata-based formal verification, closely related to the complementation problem, and is known to be computationally difficult, more concretely: PSPACE-complete. This article introduces a novel approach for creating labelled datasets of Büchi automata concerning their universality. We start with small automata, where the universality check can still be algorithmically performed within a reasonable timeframe, and then apply transformations that provably preserve (non-)universality while increasing their size. This approach enables the generation of large datasets of labelled Büchi automata without the need for an explicit and computationally intensive universality check. We subsequently employ these generated datasets to train Graph Neural Networks (GNNs) for the purpose of classifying automata with respect to their universality resp. non-universality. The classification results presented in this article indicate that such a network can learn patterns related to the behaviour of Büchi automata that facilitate the recognition of universality. Additionally, our results on randomly generated automata, which were not constructed using the aforementioned transformation techniques and classified algorithmically, demonstrate the network’s potential in classifying Büchi automata with respect to universality, extending its applicability beyond cases generated using a specific technique.

Autonomous vehicle systems have been significantly increasing in design complexity, including precise control, reliable communications, and data security. This paper presents a Model-Based Design (MBD) framework on MATLAB/Simulink to integrate the vehicle model, Vehicle-to-Vehicle (V2V) communication model, and autonomous driving scenario model. A vehicle-following control model is demonstrated to maneuver a follower vehicle using locations and velocities of the leader vehicle sent via V2V. The vehicle model consists of Time to Collision (TTC), velocity decision control, path-following control, and vehicle dynamics. The follower vehicle decision is modeled by MathWorks Stateflow considering the important factors including velocities, positions, lanes, obstacles, and buildings that effect V2V communication efficiency. Simulink Design Verifier which is a formal verification tool was then used to verify the TTC, velocity decision, and path following control. The test coverage analysis and test harness were repeated to generate test patterns with 100% coverage results. The experiments were done under the following communications and environmental conditions: single-input-single-output (SISO) without buildings, SISO with buildings, and single-input-multiple-output (SIMO) with buildings. The resulting communication packet delivery ratios were 100%, 95.32%, and 99.91%, respectively. This reveals that the proposed method can effectively model the vehicle following control and autonomous driving scenario including the effects of V2V communications efficiencies.

Digital circuits for space applications can suffer from operation failures due to radiation effects. Error detection and mitigation techniques are widely accepted solutions to improve dependability of digital circuits under Single Event Upsets (SEUs) and Single Event Transients (SETs). These solutions imply design modifications that must be validated. This paper presents a formal verification method to prove that the applied fault tolerance techniques do actually prevent fault propagation as well as that the fault-tolerant circuit is functionally equivalent to the original version. The method has been implemented in an in-house software tool, VeriHard. It has been successfully applied to verify a wide variety of fault tolerance techniques, such as Triple Modular Redundancy (TMR), Duplication with Comparison (DwC), Safe Finite State Machines and Hamming encoding. Experimental results with benchmarks and industrial cases illustrates the capabilities of the method and its high performance.

The use of Underwater Sensor Networks (UWSN) for underwater ocean applications such as seismic event detection, target detection, marine resource monitoring, and oil bed monitoring is growing. In contrast to conventional WSNs, these networks communicate via acoustic channels. Many communication protocols for UWSN have been proposed, including MAC layer protocols, time synchronization protocols, and routing protocols. Formal verification of these protocols is rarely investigated. In this paper, we propose two abstraction methods for UWSN that capture multi-channel models and variable propagation delay. These abstraction methods are used to create a validation model of the Time Delay Allocation MAC (TDA-MAC) protocol, which is used in UWSN. Formal verification of TDA-MAC is accomplished by performing a reachability analysis and the occurrence of design faults on certain marked states in the model. The verification results detect non-progress cycles of marked states in the event of a PING message loss. A modification to the existing protocol specification of TDA-MAC protocol is proposed. Formal verification on the refined validation model shows that the protocol is free from non-progress cycles and unreachable states. The proposed abstraction methods can be used to create formal models and perform formal verification of existing and emerging protocols used in UWSN.

Automation systems within nuclear laboratories are intended to work under harsh operating conditions. Selective Production of Exotic Species (SPES) is a nuclear research facility currently under construction by the Istituto Nazionale di Fisica Nucleare, dedicated to the production and study of radioactive ion beams. Isotopes are produced within the target ion source unit, a vacuum vessel that must be replaced on a regular basis. The highly radioactive environment necessitates the deployment of a set of automated systems dedicated to the unit's remote management. To meet high-level security standards, the design of such instrumentation and control systems must include extensive verification. Based on specific safety requirements, model checking can be used to assess the systems' correctness. This article describes how to employ an integrated toolchain to design, simulate, formally verify, and deploy the control software for the Horizontal Handling Machine, a safety-critical remote handling system in operation at SPES. The IEC 61499 standard's adoption led to a redesign of the control logic. Following a preliminary online simulation, the closed-loop system has been formally verified using the NuSMV symbolic model checker, with the help of the FB2SMV converter. In addition, the Function Blocks Modeling Environment tool was used for automating verification and analyzing counterexamples.

In an article published in IEEE Access in 2020, researchers present an approach to using TLA+ for the formal verification of whether a network of SDN (Software-Defined Networking) switches implements the filtering rules of a given monolithic firewall. The distributed as well as monolithic firewalls are specified with TLA+. It is shown that the correctness of the former with respect to the latter can be verified automatically by using the TLC model checker. The main contributions of this paper are the following improvements of that approach. Firstly, by specifying switches without using any variables, the time needed for the model checking is reduced significantly. For example, the verification of the same networks takes a few seconds with the new approach and does not end after several hours with the previous one. Secondly, the following problem is solved. With the latter, if a monolithic firewall allows a packet to pass through, all the paths in the distributed firewall which the packet is routed on must allow the same. Otherwise, the model checker proclaims the distributed firewall to be in error. We present an additional approach to the verification, which gives a positive answer if at least one of the paths allows the packet to pass through.

Inductive approaches to deductive verification has gained widespread adoption in the control and verification of safety-critical dynamical systems. The practical success of barrier certificates attests to their effectiveness and ongoing theoretical and practical refinement. However, when verification conditions are non-inductive, various strategies are employed to address this issue. One strategy is to strengthen the property until they arrive at an inductive proof. However, it is not always obvious how one must strengthen a property. Notions of strenghtening are particularly non-obvious when the properties of interest are more expressive than safety or reachability. An alternative technique is to instead consider structural changes. These structural changes may either be to consider novel notions of induction such as $k$-induction, or to encode additional information similar to dimension lifting. We posit that reformulating or restructuring of the system is fundamental to inductive approaches. This position article provides an overview of barrier certificate based verification approaches and their connection to system restructuring. We discuss the opportunities, challenges, and open problems in this emerging field, paving the way for future research in the verification of safety-critical dynamical systems. The framework of restructuring of a system holds promise for advancing deductive verification, enhancing system safety, and promoting design insights.

Process isolation is a key component of the security architecture in any hardware/software system. However, even when implemented correctly and comprehensively at the software (SW) level, process isolation may be compromised by weaknesses of the hardware (HW). Therefore, at the HW level, an exhaustive verification is desirable which provides the needed formal guarantees ensuring the confidentiality and integrity of the microarchitecture. The situation is further exacerbated if the attacker is able to inject faults, a threat requiring additional attention in formal security analysis. In this paper, we consider a threat model where the attacker is able to inject faults and, at the same time, execute user-level programs. We show that this poses a severe security threat even in systems which have been hardened against fault attacks for specific, security-critical system software. For protection against this threat, we present an exhaustive formal verification methodology that provides security guarantees for access control in processors, and demonstrate how such guarantees are sustained in the presence of fault injection. Guaranteeing correct and robust access control is crucial since it is the basis for process isolation in hardware. The proposed approach implicitly models all possible single and multiple bit flips as well as all stuck-at faults. We leverage the results of our formal analysis to augment the system with protection mechanisms that guarantee security w.r.t. the considered threat model. At the example of several open source RISC-V processors, we demonstrate both the scalability of our formal analysis and the efficiency of the generated defenses.

Energy consumption has become an essential factor in designing modern computer system architecture. Because of physical limits, the termination of Moore’s law and Dennard’s scaling has forced the computer design community to investigate new approaches to meet the requirements for computing resources. Approximate computing has emerged as a promising method for reducing energy consumption while trading a controllable quality loss. This paper asserts that an approximated cache coherence protocol preserves overall energy for computation. We can approximate the cache coherence protocol by adding approximated cache lines to a certain level without hindering the output. This paper introduces an enhanced approximated version of the MSI (Modified Shared Invalid) cache coherence protocol MSI-A (Modified Shared Invalid-Approx). We have verified MSI-A and MSI by employing LTL specifications in the NuSMV model checker. To illustrate the benefits of MSI-A, we have added DTMC (Discrete-Time Markov Chain) with PCTL (Probabilistic Computational Tree Logic). Although the PCTL proves the theory of approximation, we have also simulated the MSI-A in the TEJAS hardware simulator on PARSEC 3.0 to investigate the energy gains and cycle gains of MSI-A in varied applications. The cache lines considered to be approx are between 10 and 30 percent. Each application benefited from approximation according to its nature, and VIPS has indicated a total energy gain of 30.18 percent.

Cloud architecture blueprints or reference architectures allow the reuse of existing knowledge and best practices when creating new cloud native solutions. Therefore, debugging of reference architecture candidates (or their new versions) is an extremely crucial but tedious and time-consuming task due to the deployment of complex services in typical multi-tenant and non-deterministic environments. During the debugging/testing/maintenance scenarios, we might be able to achieve greater levels of test coverage (and eventually improved reliability) by modelling and verifying at least their most fundamental building blocks and their interconnections. The main objective of our work is to integrate stochastic modelling and verification techniques based on deep learning methods into the debugging cycle in order to handle large state spaces more efficiently, i.e. by steering the process of traversing state space towards suspicious situations that may result in potential bugs in the actual system with smart steering during the traversal. For this purpose, our presented and illustrated approach combines (among others) Continuous Time Markov Chain modelling (CTMC) techniques with deep learning methods including autoencoder, Long Short-Term Memory (LSTM) and Graph Neural Network (GNN) models. Our experiences are summarized with widespread cloud design patterns including load balancing and service mesh topologies. According to the results, the debugging cycle can be partly automated through the application of deep learning methods. The autoencoders are able to detect erroneous load balancer behaviors (anomalies) in complex configurations; the LSTMs demonstrate implicitly some random nature of the inspected processes, and GNNs exploit the additional topology-related information in service meshes.