804 results on '"Eduard Ayguadé"'
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202. AMC: Advanced Multi-accelerator Controller.
203. DaSH: A benchmark suite for hybrid dataflow and shared memory programming models.
204. An Intelligent Iris Based Chronic Kidney Identification System.
205. Atomic quake: using transactional memory in an interactive multiplayer game server.
206. The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors.
207. OpenMP extensions for FPGA accelerators.
208. A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures.
209. Exploiting memory customization in FPGA for 3D stencil computations.
210. An Extension of the StarSs Programming Model for Platforms with Multiple GPUs.
211. Batch Job Profiling and Adaptive Profile Enforcement for Virtualized Environments.
212. Impact of the Memory Hierarchy on Shared Memory Architectures in Multicore Programming Models.
213. Mapping stream programs onto heterogeneous multiprocessor systems.
214. Achieving high memory performance from heterogeneous architectures with the SARC programming model.
215. Speeding Up Distributed MapReduce Applications Using Hardware Accelerators.
216. Barcelona OpenMP Tasks Suite: A Set of Benchmarks Targeting the Exploitation of Task Parallelism in OpenMP.
217. OpenMP tasking analysis for programmers.
218. Unrolling Loops Containing Task Parallelism.
219. Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories.
220. CellMT: A cooperative multithreading library for the Cell/B.E.
221. QuakeTM: parallelizing a complex sequential application using transactional memory.
222. Understanding tuning complexity in multithreaded and hybrid web servers.
223. Evaluation of OpenMP Task Scheduling Strategies.
224. Extending the OpenMP Tasking Model to Allow Dependent Tasks.
225. WormBench: a configurable workload for evaluating transactional memory systems.
226. Evaluation of memory performance on the cell BE with the SARC programming model.
227. Hybrid access-specific software cache techniques for the cell BE architecture.
228. Utility-based placement of dynamic Web applications with fairness goals.
229. Automatic Pre-Fetch and Modulo Scheduling Transformations for the Cell BE Architecture.
230. Improving Web Server Performance Through Main Memory Compression.
231. Enabling Resource Sharing between Transactional and Batch Workloads Using Dynamic Application Placement.
232. A Streaming Machine Description and Programming Model.
233. A Proposal for Task Parallelism in OpenMP.
234. Transactional Memory and OpenMP.
235. Improving disk bandwidth-bound applications through main memory compression.
236. Multithreaded software transactional memory and OpenMP.
237. Support for OpenMP tasks in Nanos v4.
238. An Experimental Evaluation of the New OpenMP Tasking Model.
239. A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor.
240. A Proposal for Error Handling in OpenMP.
241. Runtime Address Space Computation for SDSM Systems.
242. Experiences Parallelizing a Web Server with OpenMP.
243. A Hybrid Web Server Architecture for Secure e-Business Web Applications.
244. Tuning Dynamic Web Applications using Fine-Grain Analysis.
245. WAS Control Center: An Autonomic Performance-Triggered Tracing Environment for WebSphere.
246. Session-Based Adaptive Overload Control for Secure Dynamic Web Applications.
247. A Hybrid Web Server Architecture for e-Commerce Applications.
248. Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units.
249. Evaluating the Scalability of Java Event-Driven Web Servers.
250. Runtime-Aware Architectures: A First Approach.
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