593 results on '"Catania V."'
Search Results
202. Design space exploration methodologies for IP-based system-on-a-chip
203. Multi-objective optimization of a parameterized VLIW architecture
204. Parameterised system design based on genetic algorithms
205. An efficient hardware architecture to support complex fuzzy reasoning
206. Hyperblock Formation: A Power/Energy Perspective for High Performance VLIW Architectures
207. A fuzzy expert system for usage parameter control in ATM networks
208. An assessment of resource exploitation using artificial intelligence based traffic control strategies
209. Design of a VLSI parallel processor for fuzzy computing
210. A soft computing approach to hardware software codesign
211. An Evolutionary Approach to Network-on-Chip Mapping Problem
212. Extension of LANs interconnection service in metropolitan area
213. Design of basic hardware gates for efficient fuzzy computing
214. Performance evaluation of a fuzzy policer for MPEG video traffic control
215. Analog gates for a VLSI fuzzy processor
216. Availability and performability assessment in LAN interconnection
217. Design issues of an asynchronous parallel fuzzy processor
218. A fuzzy decision maker for source traffic control in high speed networks
219. A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems
220. Exploitation of redundancy for throughput increase in a high speed LAN
221. A framework for a parallel architecture dedicated to soft computing
222. A fuzzy buffer management scheme for ATM and IP networks
223. A general purpose processor oriented to fuzzy reasoning
224. An efficient buffer management policy based on an integrated fuzzy-GA approach
225. A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design
226. A pipeline parallel architecture for a fuzzy inference processor
227. A dedicated parallel processor for fuzzy computation
228. Design of a VLSI hardware PET decoder
229. A framework for design space exploration of parameterized VLSI systems
230. Prolactin increases the hepatic content of mu-class subunits of glutathione S-transferase in the rat.
231. Hyperblock formation: a power/energy perspective for high performance VLIW architectures.
232. An evolutionary approach to network-on-chip mapping problem.
233. An evolutionary approach for reducing the switching activity in address buses.
234. Design space exploration methodologies for IP-based system-on-a-chip.
235. An efficient buffer management policy based on an integrated fuzzy-GA approach.
236. A fuzzy buffer management scheme for ATM and IP networks.
237. A pipeline parallel architecture for a fuzzy inference processor.
238. Tuning Hopfield neural network by a fuzzy approach.
239. Performance evaluation of a fuzzy policer for MPEG video traffic control.
240. A fuzzy expert system for usage parameter control in ATM networks.
241. A dedicated parallel processor for fuzzy computation.
242. Design issues of an asynchronous parallel fuzzy processor.
243. A routing strategy for MAN interconnection.
244. Performance-reliability improvement in a distributed system.
245. A fault management module for IEEE LANs.
246. A reconfigurable knockout switch for high performance packet switching.
247. Availability and performability assessment in LAN interconnection.
248. A DQDB MAN switching system supporting a high speed connectionless data service.
249. Throughput analysis of DQDB in overload condition.
250. Monitoring performance in distributed systems
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