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With this book, Greenberg indeed fulfils his promise to study the "disruptive and constructive power of narratives" (p. 7), but the warfare concept is strongly overstretched. What Greenberg is actually doing in his book is to reconstruct divergent and conflictive narratives on different phenomena in Egypt and Tunisia before, during, and after the Arab Spring and to embed this in a broader discussion on underlying ideologies and interests. In the first chapter, Greenberg explains his definition of "information warfare 2.0" ignoring most of the literature on media production logic and on affordances of digital and social media. [Extracted from the article]

The focus of this work is first-order model checking, by which we refer to the problem of deciding whether or not a given first-order sentence is satisfied by a given finite structure. In particular, we aim to understand on which sets of sentences this problem is tractable, in the sense of parameterized complexity theory. To this end, we define the notion of a graph-like sentence set; the definition is inspired by previous work on first-order model checking wherein the permitted connectives and quantifiers were restricted. Our main theorem is the complete tractability classification of such graph-like sentence sets, which is (to our knowledge) the first complexity classification theorem concerning a class of sentences that has no restriction on the connectives and quantifiers. To present and prove our classification, we introduce and develop a novel complexity-theoretic framework that is built on parameterized complexity and includes new notions of reduction. [ABSTRACT FROM AUTHOR]

Recently, the non-covalently activated supramolecular scaffold method has become a prominent research area in the field of intelligent materials. Here, the inorganic clay (LP) promoted the AIE properties of 4,4′,4″,4‴-(ethene-1,1,2,2-tetrayltetrakis(benzene-4,1-diyl))tetrakis(1-ethylpyridin-1-ium) (P-TPE), showing an astonishing 42-fold enhancement of the emission intensity of the yellow-green luminescence and a 34-fold increase of the quantum yield via organic-inorganic supramolecular strategy as well as the efficient light-harvesting properties (energy transfer efficiency up to 33 %) after doping with the dye receptor Rhodamine B. Furthermore, the full-color spectral regulation, including white light, was achieved by adjusting the ratio of the donor to the acceptor component and co-assembling with the carbon dots (CD). Interestingly, this TPE-based non-covalently activated full-color supramolecular light-harvesting system (LHS) could be achieved not only in aqueous media but also in the hydrogel and the solid state. More importantly, this panchromatic tunable supramolecular LHS exhibited the multi-mode and quadruple digital logic encryption property as well as the specific detection ability towards the perfluorobutyric acid and the perfluorobutanesulfonic acid, which are harmful to human health in drinking water. This result develops a simple, convenient and effective approach for the intelligent anti-counterfeiting and the pollutant sensing. • Here, we developed a novel LP-activated LHS assembly for the anti-counterfeiting and detecting the perfluorinated pollutants.[Not Available in CrossRef]. [ABSTRACT FROM AUTHOR]

The integration of robotics into everyday life is increasing and these complex systems are exposed to complex faults that require rapid identification for seamless repair and continuous operation. These faults have a complex impact on cognitive aspects such as perception, decision-making and behavioral execution in robots. Robotic fault detection and diagnosis research (FDD) focuses primarily on individual robot scenarios, which lack a comprehensive investigation in multi-robot systems (MRSs). Our paper introduces a robotic control method to control operations in a wide range of production systems. The control system architecture developed by multiple robots provides a local and global cognitive system that is shared between them. Internal dynamics, represented by finite state machines, represent different operating scenarios. The rigorous formal methodology such as Petri Nets and Computer Tree Logic (CTL) validates the accuracy of control architectures and fault management strategies. Building a model of trust based on the historical interactions between intelligent robots facilitates the creation of a global cognitive system that enables adaptation in the management of errors. Our research is launching a trust estimation model, especially the collaboration between reliable robots, and increasing the fault flexibility of multirobot control systems. The contributions include the design of multi-robot control architectures, the management of failures of control robots, and the formulation of trust models. [ABSTRACT FROM AUTHOR]

The Si-CMOS based technology has been dominating the digital design for more than 40 years. However. nuinerous device non-idealities that cause critical reliability issues in Si-CMOS designs are introduced at 32nm technology nodes and beyond. Continued scaling gives rise to short channel effects that diminish the controllability of the gate. Other factors like significantly increased leakage power dissipation, larger process variation and other technological and economical challenges arise with continued Si-CMOS scaling. Therefore, traditional Si-CMOS technology has reached a point where further advancement in terms of speed and size is becoming extremely challenging as devices scale down into the deep submicron region. Graphene Nano Ribbon Field Effect Transistor (GNRFET) is an einerging technology that has received a lot of attention in recent years due to its high carrier mobility for ballistic transpoit, compatibility with high k dielectrics, high carrier velocity to have abrupt switching, and good thermal conductivity. In this work, various GNRFET-based conventional two-input digital logic gates are implemented. The different gate designs are analyzed in terms of speed of operation, leakage power dissipation. and energy consumption using HSPICE. The results are then compared to the Si-CMOS implementations of these gates at the saine future size and nominal voltage. Simulation results demonstrate that GNRFET could be potential emerging energy efficient electronic device at semiconductor industry for future digital systems design. [ABSTRACT FROM AUTHOR]

In the era of digital capitalism, machines and technology have gradually become the main body that dominates workers. Information technology is actually the digital embodiment of mass machine production. It is with the help of ICT and digital technology that digital capitalism realizes the digital transformation of the way capitalism exists and the proliferation of digital capital. The purpose of this paper is to study the generative logic of digital capitalism based on artificial intelligence technology. Compare the production, circulation, consumption of traditional commodities, and the production of digital capital, explore the nature of digital capitalism and the differentiation of digital capitalism in the era of artificial intelligence, analyze the impact of artificial intelligence on labor polarization, and the results show the high-skilled labor force in the eastern region. The ratio to the medium-skilled labor force is 0.086. Take the M enterprise in capitalism as an example, and study the application of artificial intelligence to the energy and power industry to provide value to customers through new products. The new changes in contemporary artificial intelligence capitalism solve the problems in the operation of the original business model, benefiting both customers and enterprises. [ABSTRACT FROM AUTHOR]

In Schwichtenberg (Studies in logic and the foundations of mathematics, vol 90, Elsevier, pp 867–895, 1977), Schwichtenberg fine-tuned Tait's technique (Tait in The syntax and semantics of infinitary languages, Springer, pp 204–236, 1968) so as to provide a simplified version of Gentzen's original cut-elimination procedure for first-order classical logic (Gallier in Logic for computer science: foundations of automatic theorem proving, Courier Dover Publications, London, 2015). In this note we show that, limited to the case of classical propositional logic, the Tait–Schwichtenberg algorithm allows for a further simplification. The procedure offered here is implemented on Kleene's sequent system G4 (Kleene in Mathematical logic, Wiley, New York, 1967; Smullyan in First-order logic, Courier corporation, London, 1995). The specific formulation of the logical rules for G4 allows us to provide bounds on the height of cut-free proofs just in terms of the logical complexity of their end-sequent. [ABSTRACT FROM AUTHOR]

The conventional CMOS scaling trend faces device scaling limitations, interconnect bottleneck, and signal integrity issues due to crosstalk, which is the unwanted interference of signals between neighboring metal lines. Traditional computing circuits always try to reduce the crosstalk noise by applying various circuit and layout techniques. In contrast, Crosstalk computing is a new computing framework that can leverage this detrimental effect and convert it astutely to a useful feature. The Crosstalk is engineered into a logic computation principle by leveraging deterministic signal interference for innovative circuit implementation. In this paper, we present a comprehensive circuit framework for Crosstalk Computing and derives all the key circuit elements that can enable this computing model for large-scale design. It also performs a comparison study between Crosstalk circuits and existing CMOS-based approaches. The ability to design a wide range of logic circuits (basic and complex logics) and programmable gates compact in design and minimal in transistor count is unique to Crosstalk Computing, which leads to benefits in the circuit density, power, and performance. The circuit simulation results designed at 7 nm show 3.4x improvement density, 62% reduction in Energy-Delay-Product (EDP), and 34.5% improvement in performance compared to counterpart implementation in CMOS circuit style. • Interference based radically new concept to compute logic for digital Integrated Circuits. • Fabricated a proof-of-concept prototype Chip for Crosstalk Computing at TSMC 65 nm technology. • A detailed methodology for large scale circuit implementation and discussed signal integrity aspects of Crosstalk Computing. • Presented a host of circuit styles for quick adaptation of Crosstalk Computing. • A unique hardware-level programmability feature allowing run-time reconfiguration and enabling security, and fault resilience. [ABSTRACT FROM AUTHOR]

The COVID-19 pandemic has a high impact on education at many different levels. In this study, the focus is set on the impact of digital teaching and learning at universities in the field of Earth observation during the COVID-19 pandemic situation. In particular, the use of different digital elements and interaction forms for specific course types is investigated, and their acceptance by both lecturers and students is evaluated. Based on two distinct student and lecturer surveys, the use of specific digital elements and interaction forms is suggested for the different course types, e.g., academic courses could be either performed asynchronously using screencast or synchronously using web meetings, whereas practical tutorials should be performed synchronously with active participation of the students facilitated via web meeting, in order to better assess the student's progress and difficulties. Additionally, we discuss how further digital elements, such as quizzes, live pools, and chat functions, could be integrated in future hybrid educational designs, mixing face-to-face and online education in order to foster interaction and enhance the educational experience. [ABSTRACT FROM AUTHOR]

This paper describes the fabrication of digital logic circuits comprising resistors and diodes made from protein complexes and wired together using printed liquid metal electrodes. These resistors and diodes exhibit temperature-independent charge-transport over a distance of approximately 10 nm and require no encapsulation or special handling. The function of the protein complexes is determined entirely by self-assembly. When induced to self-assembly into anisotropic monolayers, the collective action of the aligned dipole moments increases the electrical conductivity of the ensemble in one direction and decreases it in the other. When induced to self-assemble into isotropic monolayers, the dipole moments are randomized and the electrical conductivity is approximately equal in both directions. We demonstrate the robustness and utility of these all-protein logic circuits by constructing pulse modulators based on AND and OR logic gates that function nearly identically to simulated circuits. These results show that digital circuits with useful functionality can be derived from readily obtainable biomolecules using simple, straightforward fabrication techniques that exploit molecular self-assembly, realizing one of the primary goals of molecular electronics. Proteins are promising molecular materials for next-generation electronic devices. Here, the authors fabricated printable digital logic circuits comprising resistors and diodes from self-assembled photosystem I complexes that enable pulse modulation. [ABSTRACT FROM AUTHOR]

In the field of low power VLSI, the charge recovery property of adiabatic logic has been liked by the VLSI researchers. And this stimulates the research of various charge recovery techniques for low power computation. The applications of adiabatic logic in digital circuits are well understood, whereas mixed signals and analog circuits are yet to be explored. In this work, the author presents a wave shaping diode-based adiabatic logic (WSDAL) driven strong ARM comparator. The proposed ARM comparator consumes a power of 0.46 µW as compared to 14.41 µW and 8.77 µW as that of traditional strong ARM and adiabatic driven strong ARM, respectively. The reduction in power dissipation is achieved by three ways, (1) the proposed design consists of WSDAL based invertor for SR latch inputs that reduces the power dissipation up to a great extent by charge recycling through PCb (power clock bar). (2) The magnitude of PCb is half as that of PC (power clock), which reduces the node voltage difference and ultimately reduces the power dissipation, (3) the leakage and short circuit components of current get reduced utilizing PC as a sinusoidal supply. The proposed design also shows better thermal stability with varying temperature conditions. [ABSTRACT FROM AUTHOR]

In order to achieve higher frequency measurement accuracy, this paper proposed a characteristic pulse detection method of fuzzy area based on the quantized phase processing method of different frequency groups. First, the fuzzy area of the group phase coincidence points continuously moved on the time axis after passing through delay elements. The moving distance, that is, the number of the delay elements was determined by the main clock cycle of the D flip-flop. After that, three groups of phase coincidence detection fuzzy areas in different positions were sent to the digital logic module to extract the edge pulses of the phase coincidence detection fuzzy area. The pulse width is determined by the difference between the clock cycles of the delay elements. The clock cycles of different delay units were adjusted to obtain nanosecond or even picosecond circuit detection resolution. Finally, the pulses generated at the edge of the phase coincidence fuzzy area are taken as the switching signal of the frequency signal counter, so the stability of the gate signal and the accuracy of the gate time measurement are improved. The experimental results show that frequency stability can reach the order of E-13/s. In addition, compared with the traditional measurement method, it is characterized by simple structure, low cost, low noises, and high measurement resolution. [ABSTRACT FROM AUTHOR]

In the modern Block-chain and Artificial Intelligence era, energy efficiency has become one of the most important design concerns. Approximate computing is a new and an evolving field promising to provide energy-accuracy trade-off. Several applications are tolerant to small degradation in results, and hence tasks like image and video processing are candidates to benefit from Approximate Computing. In this paper, we propose a new design approach for designing approximate adders and further optimize the accuracy and cost metrics. Our approach is based on minimizing the errors while cascading more than one 1-bit adder. We insert | error | = 1 on specific locations to achieve a reasonable circuit minimization and reduce the error × count gate cost. We compare our design with exact adder and relevant state-of-the-art approximate adders. Through analysis and simulations, we show that our approach provides higher accuracy and far better performance compared with other designs. The proposed double bit approximate adder provides more than 25% savings in gate count compared with the exact adder, has a mean absolute error of 0.25 which is lowest among all the reference approximate adders and reduces the power-delay product by more than 60% compared to the exact adder. When employed for image filtering, the proposed design provides a PSNR avg of 96%, a SNR avg of 95% and a SSIM avg of 91% relative to the actual results, while the second best approximate adder only achieves 64%, 54% and 71% of these image quality metrics, respectively. [ABSTRACT FROM AUTHOR]

Memristor has been widely explored in digital logic circuits where most of the works are focused on basic gate circuits, such as OR and AND logic gates or full adders while few involve flip‐flops. In fact, flip‐flops are also basic logic units with memory function for various digital systems. In this paper, we present circuit designs for Delay (D) and Jump‐Key (JK) flip‐flops based on memristor ratioed logic (MRL). The proposed circuit for D flip‐flop only needs five memristors and one NMOS transistor, and circuit for JK flip‐flop needs seven memristors and two NMOS transistors. Furthermore, the proposed circuits have been mapped into a hybrid memristor‐CMOS crossbar array. Compared with previous approaches, the quantity of MOSFET for each proposed circuit has been greatly reduced. Thus, the proposed designs have achieved simpler structure, smaller area, and lower power consumption benefiting from the memristor's nanoscale size and low power consumption. The circuit verification based on PSpice simulation is also provided. [ABSTRACT FROM AUTHOR]

Media scholarship has long argued that public discourse is a function of the architecture of the media by which it is carried. Media architecture is, as political economists have argued, in turn shaped by the capitalist regime of accumulation within which the media operate. This paper draws together these two strands of literature to ask: as the accumulation of data is coming to define contemporary capitalism, what cultural logic does this produce? The paper argues that, as media are shaped around the extracting user data, they become organized around personhood and the extension of commodification deeper into our sense of self. The lifestyle fragmentation and segmentation engendered by new media technologies carry over into public discourse, shaping a public, and political life defined by identity and difference. If, as Neil Postman suggested, a society's way of knowing reflects its media technology, the emerging epistemology of the social media society is truth as identity, as our very ways of knowing are reduced to expressions of who we are. [ABSTRACT FROM AUTHOR]

The article reviews the stick.t.me (2020) curated by Zentrum für Netzkunst – an association dedicated to the inquiry and presentation of net culture.

The need for high-availability, efficient, training solutions for industrial automation technology is driving the adoption of new tools, software and services supporting the Industry 4.0 paradigm. Specific requirements include vendor agnostic and standards-based programming languages and availability of both physical input–output and industrial communication, while providing a rich and immersive experience through suitable human–machine interface components. The PROSIM platform represents an integrated embedded hardware-software system for programmable logic controller automation training which provides examples in increasing order of complexity, ranging from basic digital logic up to complex manufacturing simulations and process control. A fully software-based solution has been developed in order to complement the laboratory-based system as a training digital twin. We describe the design, implementation and evaluation of the platform as ported onto the HUBCAP collaborative sandboxing environment for virtualized operation. Integration of dedicated communication libraries for Open Platform Communications, Unified Architecture, with simulated programmable logic controllers such as PLCSIM and ARSim is also discussed for fully leveraging new features emerging from increased information and operational technology convergence witnessed in realistic, plant-level, environments. Qualitative and quantitative evaluation in comparison to the physical system while leveraging the resources provided by the cloud environment is carried out. [ABSTRACT FROM AUTHOR]

Amazon's Internationalization in Germany Founded by Jeff Bezos in 1994, Amazon's internationalization began in the late 1990s, with Germany being one of the first target regions (Kenney and Zysman, [36]). With its growth path from a bookseller to an international all-around retailer, Amazon was able to achieve a predominant winner-take-all position in North America as well as some European countries such as Great Britain and Germany (Kenney and Zysman, [36]); Amazon could be considered the "one platform to rule them all" (Birch, [4]). The interviewees explain that these conflict-prone labour relations are the result of Amazon coming from a different work-culture context, and that Amazon has encountered a specific labour market situation in Germany to which it is unaccustomed. Keywords: Big Tech; labour relations; human-technology configuration; Amazon; regulation EN Big Tech labour relations human-technology configuration Amazon regulation 29 43 15 03/10/22 20220301 NES 220301 Introduction Microsoft, Apple, Amazon, Alphabet/Google, Facebook, Alibaba and Tencent are some of the largest companies in the world, alongside the Saudi-Arabian Oil Company (by market value only, Statista, [49]). [Extracted from the article]

We investigate the circuit performance of the junctionless nanowire transistor. We have demonstrated pass transistor-based logic gates using the junctionless transistor. Pass transistor-based basic logic gates: AND, OR, XOR are designed using only the n-type junctionless nanowire transistor with HfO2 gate dielectric. Simulations of these circuits have been studied and analyzed under a mixed-mode environment. Outcomes of the analysis show that 3D dual gate junctionless nanowire transistor with 20 nm gate length well performed for pass transistor logic. In addition, a junctionless nanowire transistor-made multiplexer has also been studied and found to perform well. A high-k gate dielectric was used for all junctionless transistors as the higher k value improves the device characteristics and circuit performances. Our study also shows that the junctionless nanowire transistor-based pass transistor logics for digital circuit perform well. [ABSTRACT FROM AUTHOR]

Copyright of Global Media Journal: Turkish Edition is the property of Global Media Journal, Turkish Edition and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

Latin American labor markets are remarked on for their structural heterogeneity, which, over the years, has been the result of a growing labor surplus. Thus, the digital labor platforms in delivery services that have emerged are breaking into a complex labor landscape, imposing new challenges. We intend to describe what forms the workers' collective actions take and how these collective actions and their forms are linked with the labor institutions' settings. We use three case studies with a comparative perspective of both national labor institutions and the history of collective action, particularly in the urban labor context. We collected secondary information from news media and academic bibliographies and primary information through interviews with collectives' representatives. Our results show how the logic of digital platforms challenges collective action, and how the history of labor institutions might contribute to the rise of new forms of organization. [ABSTRACT FROM AUTHOR]

Quantum dot-cellular automata (QCA) technology has recently emerged as a potential candidate for the design of nanometer-scale computational circuits. In digital logic circuits, the comparator is the basic building block for comparing two binary values. This paper presents and implements two 1-bit QCA-based comparator designs. The proposed QCA implementations are compact, require only a single layer and are less complex compared to recently reported designs. The QCADesigner tool has been used to confirm the functional validity of the proposed QCA structures. The simulation results of the proposed comparators have shown considerable improvements compared to their existing counterparts in terms of the number of QCA cells and occupational area requirements in addition to cost and efficient complexity values. Furthermore, all of the proposed structures are dissipating extremely low energy values. Thus, the proposed QCA-based comparators can be viewed as viable options for low power digital applications. [ABSTRACT FROM AUTHOR]

The paper discusses design methodology, constructional alternatives and calibration procedure of current sensor suited for high-power semiconductor systems operated at medium switching frequencies (industrial contact and contactless power chargers). Even there are several types of the sensor on the market, for medium frequency operation they usually exhibit problems with measured signal and its postprocessing. Proposed sensor is designed for a current up to 200 A and 120 kHz and is based on current transformer principle. Design procedure is focused on winding analyses and its impact on operational characteristics. In order to verify proper choice of magnetic core and windings distribution, finite element analysis have been provided to verify magnetization and saturation of sensor core. Consequently, the internal structure of the sensor and its construction is being described, while it is considered that the sensor is equipped with an electronic unit in a common housing. The electronic transducer evaluates the measured data and produces the digital output signals, which are easy to transfer even to a long distance. Prototype of constructed sensor has been undertaken to experimental measurements for given frequency range in order to evaluate quality factors and accuracy. At the end of the paper, the required process of calibration was provided through the evaluation of the algorithm required by digital logic of the sensor. [ABSTRACT FROM AUTHOR]

This article presents a low-power, low-distortion, and compact mixed-signal sinusoidal current generator (CG) IC for bio-impedance (Bio-Z) sensing applications. By utilizing the digital $\Delta \Sigma $ modulation to bridge the digitally synthesized sinewave data and the analog-domain voltage output, implementation of a low-distortion sinewave lookup table (LUT) is significantly simplified. Not only does this approach lead to the reduced number of routing wires, pin allocation, and output registers after logic synthesis but also, it allows the use of dynamic element matching (DEM) with a low-cost, before interfacing with the digital-to-analog converter (DAC). In addition, 0.5 V of low-supply voltage exploits a highly power-efficient operation for both synthesized digital logic and its subsequent analog circuit chain. To suppress the noise-floor increase that is induced from the reset signal of capacitor-DAC, a half-period reset scheme is introduced. The prototype chip is fabricated in 65-nm CMOS technology and it outputs $2~\mu \text{A}_{\text {PP}}$ of amplitude with 20 kHz of sinusoidal frequency. It records the first sinusoidal CG IC that achieves sub- $10~\mu \text{W}$ ($6.2~\mu \text{W}$) of power consumption and sub-0.1% (0.088%) of total harmonic distortion (THD) at the same time which has not been demonstrated ever in the prior arts. Furthermore, 0.059 mm2 of its compact area facilitates the low-cost production of Bio-Z sensor systems. [ABSTRACT FROM AUTHOR]

This essay reviews the ontological status of digital material in industrial operations and conditions it provides for innovation. It recognises the semiotic quality of digital material and the critical role of von Neumann architecture as to show that digital innovation advances through a three pronged, largely orthogonal process of embedding- a process of interlacing elements of one innovation domain to that of another. Three types of embedding define digital innovation: operational embedding (code-computer), virtual embedding (real-world phenomena-code) and contextual embedding (performing code-social setting). Each constitutes a 'leverage point' for further expanding digital innovation and they interact dynamically while industrial innovation is defined by a static virtual and contextual embedding. The processes that underlie innovation in the two regimes follow differential logics. In industrial regime (1) discover-synthesise and (2) manufacture-distribute activities combine to form the leverage points for innovation. In digital regime 1) discover product or behaviour (ideation); 2) abstract to digital material (virtualise); 3) Implement and replicate digital material (variations in operational/contextual embedding); and 4) Deliver product and/or behaviour (perform digital material) activities form the leverage points for innovation enabling wider, open, and faster innovation with a distinct value logic. [ABSTRACT FROM AUTHOR]

The incessant downscaling of building blocks for memory and logic in computer chips requires energy-efficient devices. Thermoelectric-based temperature sensing, cooling as well as energy harvesting could be useful methods to reach reliable device performance with stable operating temperatures. For these applications, complementary metal–oxide–semiconductor (CMOS)-compatible and application ready thin films are needed and have to be optimized. In this work, we investigate the power factor of different phosphorous-doped silicon germanium (SiGe) films fabricated in a 300 mm CMOS-compatible cleanroom. For the thermoelectric characterization, we used a custom-built setup to determine the Seebeck coefficient and sheet resistance. For sample preparation, we used low pressure chemical vapor deposition with in situ doping and subsequent rapid thermal annealing on 300 mm wafers. Thin film properties, such as film thickness (12–250 nm), elemental composition, crystallinity, and microstructure, are studied via spectroscopic ellipsometry, x-ray photoelectron spectroscopy, x-ray diffraction, atomic force microscopy, and TEM. The SiGe-based thin films vary in the ratio of Si to Ge to P and doping concentrations. A power factor of 0.52 mW/m K2 could be reached by doping variation. Our results show that SiGe is a very attractive CMOS-compatible material on the 300 mm wafer level and is immediately ready for production of thermoelectric embedded applications. [ABSTRACT FROM AUTHOR]

Technological transformations and, especially, the accelerated process of digitalization have changed the profiles and production routines of the media. At the same time, universities have had to adapt their journalism curricula to new training needs. This paper analyzes the evolution of the technical-digital training of the journalism degree in Spain over the last two decades through a comparative study of three stages: before, during, and after the adaptation to the EHEA (2000-2010-2020). The research brings together, as valuable reference material, the curricular offerings of 112 programs and 242 subjects that show the educational evolution of the digital environment over the last 20 years, with a longitudinal and epistemological approach. The trends identified by this diagnostic work confirm, among other aspects, how the design of journalism curricula has evolved at a slow and asynchronous pace in digital training until the last decade and with disparate speeds between universities. Added to this is the conformation of a highly varied epistemological heritage that, beyond the specific names of the subjects, denotes a progressive commitment to digital and multimedia teaching, combining generic hybrid knowledge with more specialized training in terms of languages and formats. [ABSTRACT FROM AUTHOR]

Timing complicates all dimensions of post conflict redress. Moving too fast suggests prejudice. Going too slow delays accountability and closure. This paper challenges the temporal logic of international justice. The prosecution of aged defendants created aesthetical dilemmas for war crimes operations in post-World War II Asia. The unsettling optical allusions of frail perpetrators in court — shadows of their former selves — left many observers conflicted: it looked indecent, it felt unjust and underwhelming. The unseemly punishment of weak defendants undercut prosecution attempts to brand perpetrators as monsters. Disappointed reporters and trial authorities fixated on the shabby dress, waning physique, and benign senescence of once-sinister villains. Few questioned the accused's guilt. Many felt unnerved by the optics. Ultimately, this paper shows how the staging and performance of justice impacts a court's effectiveness. Unrelenting accountability, bringing all war criminals to justice, feels right. Yet, the aesthetic complications of prosecuting aged accused may not be worth it. [ABSTRACT FROM AUTHOR]

The present as a philosophical category, expresses a behavioral character, which is assumed as an attitude (ethos) towards a digital world. This "ethos" configures a relationship between the human and the machine, builds bridges of opening (apertûs) that consolidates units of existential possibility through practices that manifest, not a digitization, but a digitiza-tion, that is, a praxis particular and unique that, in the digital framework, intends to intentionally understand the existential field of the human being in digital logics. This digitaliza-tion as a practice configures "the present" that in the digital framework constitutes a rationality, a kind of capacity that human beings have to analyze through a mental exercise the existential reality of themselves and of your environment. [ABSTRACT FROM AUTHOR]

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A systematic theory of structural limits for finite models has been developed by Nešetřil and Ossona de Mendez. It is based on the insight that the collection of finite structures can be embedded, via a map they call the Stone pairing, in a space of measures, where the desired limits can be computed. We show that a closely related but finer grained space of (finitely additive) measures arises -- via Stone-Priestley duality and the notion of types from model theory -- by enriching the expressive power of first-order logic with certain "probabilistic operators". We provide a sound and complete calculus for this extended logic and expose the functorial nature of this construction. The consequences are two-fold. On the one hand, we identify the logical gist of the theory of structural limits. On the other hand, our construction shows that the duality theoretic variant of the Stone pairing captures the adding of a layer of quantifiers, thus making a strong link to recent work on semiring quantifiers in logic on words. In the process, we identify the model theoretic notion of types as the unifying concept behind this link. These results contribute to bridging the strands of logic in computer science which focus on semantics and on more algorithmic and complexity related areas, respectively. [ABSTRACT FROM AUTHOR]

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The paper explores the potentials of shape memory alloys (SMAs) for the design of autoreactive façade systems without using additional external energy. The exploration is conducted and assessed through the design of a façade concept for the city of Athens in Greece, aiming to improve both the indoor and outdoor environment by means of a kinetic autoreactive system featuring a dual-seasonal function, with a focus on the building's direct and indirect impact on the urban heat island (UHI) effect. The paper covers a demonstration of the methodology followed, using a feedback-loop logic informed by environmental and energy performance evaluation studies in Grasshopper to optimize the geometry and movement of the shading component. During the façade design process, a comprehensive and systematic computational toolset is being developed, targeted on the abovementioned performance evaluation studies. Through the development and assessment of the façade concept, the objective is to explore the potentials and limitations for the application of autoreactive envelopes in the façade design. At the same time, the aim is to exploit the possibilities and optimization potentials offered through the developed iterative computational workflows, by showcasing the methodology and interoperability logic of the digital tools used for the data interchange. [ABSTRACT FROM AUTHOR]

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This paper presents a general modeling method for threshold-type multivalued memristors. Through this memristor modeling method, it is very simple to establish threshold-type memristor behavior models with different numbers of memristance elements, and these models are verified by numerical MATLAB simulations. A corresponding circuit-level SPICE model of the ternary memristor behavior model is developed and simulated in LTspice, shown to be consistent with the MATLAB results. Finally, the SPICE model is used to design the AND gate, OR gate, and three NOT gates of ternary state-based logic, and the effectiveness of the circuit is proved by LTSpice simulation. [ABSTRACT FROM AUTHOR]

What distinguishes the approach sketched out by Campe, however, is its attunement to the epistemological paradoxes that arise from combining the divergent approaches to "writing" offered by various methodological orientations and theoretical impulses. In the three decades since the publication of Rüdiger Campe's essay "Die Schreibszene, Schreiben" (1991; "Writing; The Scene of Writing"), the concept of the I Schreibszene i or "scene of writing" has established itself as part of the vernacular of contemporary German literary studies. As discussed above, this means bringing existing research on the scene of writing into conversation with adjacent approaches and theoretical developments in the humanities that have taken place since the essay's publication thirty years ago. [Extracted from the article]