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A generalised approach for the implementation of memristive two-terminal circuits with piecewise-smooth characteristics is proposed on an example of a multifunctional circuit based on a transistor switch. Two versions of the circuit are taken into consideration: an experimental model of the piecewise-smooth memristor (Chua's memristor) and a piecewise-smooth memristive capacitor. Physical experiments are combined with numerical modelling of the discussed circuit models. Thus, it is demonstrated that the considered circuit is a flexible solution for synthesis of a wide range of memristive systems with tunable characteristics. [ABSTRACT FROM AUTHOR]

It is critical to accurately detect IGBT (Insulated Gate Bipolar Transistor) switch faults in order to ensure the reliability and robustness of three-phase inverters. In this work, a new approach for the enhancement of the IGBTs open-circuit faults of a three-phase diagnosis inverter is proposed. This approach is based on an Enhanced version of the Variational Mode Decomposition algorithm (EVMD) combined with wavelet packet analysis (WPA) and scalar indicators such as the average and variance value. Firstly, the three-phase current signals are denoised using an improved version of the denoising technique based on a WPA. Secondly, the denoised current signals are decomposed by EVMD algorithm into Band Limited Intrinsic Mode Functions (BLIMFs). Thirdly, BLIMFs that have the highest correlation coefficients with current signals are selected as useful modes. Fourthly, the variance of the BLIMFs that have the highest correlation coefficient among those selected is calculated in order to detect the faulty phase and, consequently, the faulty arm. Finally, the average of the BLIMF that has the lowest correlation coefficient among those selected for the faulty phase is calculated to localize the fault position in either the upper or the lower IGBTs of the faulty arm. The proposed approach is applied to experimental signals and the results obtained show well the efficiency of the performance of the proposed approach in the diagnosis of open-circuit faults. [ABSTRACT FROM AUTHOR]

In this article, an electrothermal model of a diode–insulated gate bipolar transistor switch for modeling dc–dc converters is proposed. The formulated model has the form of a subcircuit for the simulation program with integrated circuits emphasis (SPICE) program and enables computations of both electrical characteristics of the converter and junction temperatures of the semiconductor devices. The equations used in the formulated model allow modeling the operation of the converter in both continuous conduction mode and discontinuous conduction mode. The correctness of the formulated model is experimentally verified for the boost converter. Good accuracy of modeling the characteristics of the converter is obtained. A.cir file based on the formulated model for an analysis in the SPICE program is attached to the article as the active content. [ABSTRACT FROM AUTHOR]

Based on a resonance structure with switching capacitor, a simple power circuit of high frequency controllable electronic supply line transformer having improved mass-size parameters and overvoltage protection of its transistor switches is considered. Analysis of its operation, formulae for calculation of power elements, regulating and load characteristics are presented. [ABSTRACT FROM AUTHOR]

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We demonstrate the design and analysis of Ka-band miniature four-way Wilkinson power dividers (with CRC or RC isolation network) and variable-gain low-noise amplifier (VGLNA) for 5G systems. The four-way Wilkinson power divider with CRC (or RC) isolation network constitutes three two-way Wilkinson power dividers with CRC (or RC) isolation network. For the two-way power divider, a parallel capacitor is included at the input to compensate the imaginary part of the input admittance for input matching. Dual spiral structure with transmission line length of about λ/14 and symmetrical layout is adopted to achieve miniature chip area and small amplitude imbalance (AI) and phase difference (PD). Remarkable results are achieved. For instance, at 28 GHz, the two-way power divider (with CRC isolation network) achieves prominent S11 of − 12.1 dB, S22 and S33 of − 27 dB, S32 of − 17.4 dB, S21 of − 3.989 dB, S31 of − 3.964 dB, AI of − 0.025 dB, and PD of 0.171°. The normalized chip area is 9.8×10−5λ02. This is one of the smallest normalized chip areas ever reported for millimeter-wave power dividers. Moreover, the VGLNA constitutes a cascode input stage followed by a cascode output stage. To tune the power gain of the VGLNA, a current-steering transistor switch in parallel with the input transistor of the cascode output stage is adopted. A large gain tuning range of 14.9 dB is achieved. [ABSTRACT FROM AUTHOR]

A time-domain duplexing radio frequency (RF) front-end with integrated antenna switch, power amplifier (PA), and low noise amplifier (LNA) was developed aiming for fifth-generation communication (5G) applications covering 24–28 GHz frequency range. Antenna switch utilizes pre-existing LNA input matching network together embedded with grounded shunt transistor switch to provide sufficient isolation of receive side from PA. Respectively, high impedance of off-state PA is assumed to achieve acceptable receive performance. Resulting output power is 13.6 dBm with 15 dB of peak small-signal gain at 28 GHz. Maximum average channel power was 4.8 dBm with 100 MHz 64-QAM OFDM signal within 5G adjacent channel power ratio and error vector magnitude specifications. Receive (RX) front-end achieves 5 dB noise figure at 24 GHz and 7 dB of peak gain. Performances of amplifiers degraded only by 2 dB from switch integration. The front-end dissipates 183 and 4.6 mW of power in transmit and receive mode, respectively. The simplistic design method minimizes cost both in circuit area (only 0.19 mm2) and design time making this front-end an attractive alternative in massive phased array applications using 22 nm complementary metal oxide semiconductor (CMOS) fully depleted silicon on insulator process. [ABSTRACT FROM AUTHOR]

This paper presents that actuation of a 4H-SiC electrostatic microactuator was controlled by an optical signal. The microactuator was monolithically integrated with a transistor switch on the 4H-SiC substrate. DC voltage bias on the transistor produced an electrostatic force on the microactuator, which bended down the cantilever beam and caused a shift in the resonant frequency to a lower value. The transistor switched on when activated by UV illumination, and photogenerated current in the transistor reduced bias voltage on the microactuator, which relaxed the electrostatic force and consequently increased the resonant frequency. [ABSTRACT FROM AUTHOR]

Due to the low impedance of DC (Direct Current) power transmission line, short‐circuit current has a very high increment speed, which causes problems as difficulty in current limitation method. This paper proposes a new method to realize the current‐limiting control of short‐circuit current by using active control of power electronic transformer. The method improves the topology of dual active bridge modules that contribute the DC transformer, and installs an IGBT (Insulated Gate Bipolar Transistor) switch in reverse direction on supporting capacitor branch of each module to control the capacitor on or off, which can guarantee the storage energy within the capacitor will not release in initial stage in case of DC short circuit fault happen. Therefore, there is no large inrush current flow out. Furthermore, combined with the requirements of current tracking control during low‐voltage ride‐through, the transformer output current under short‐circuit condition is actively controlled in order to meet the needs of renewable energy power generation equipment. Finally, the simulation and hardware‐in‐the‐loop experiments verify the correctness of this method. [ABSTRACT FROM AUTHOR]

A solid-state suppress grid power supply (SGPS) is developed to be applied to the 5 MW level neutral beam injection (NBI) on HL-2M Tokamak. The power supply consists of ten modules in series, with an index of 560 V/40 A. Each of the modules is composed of an isolated transformer, rectifier, filter tank, insulated gate bipolar transistor switch, gate-drive circuit, free-wheeling diode, and so forth. An embedded system STM32F103 is used for controlling and protecting the SGPS. Meanwhile, the transient output capacity of the SGPS is tested. The effect of the output voltage of the SGPS on the extracted beam current is studied. The experimental results show that there is a turning point in the relationship between the suppress voltage and the extracted beam current. When the rate of the absolute value of the suppress voltage and the gradient voltage is more than 2.5%, the efficiency of the extracted beam of the ion source can be improved. Compared with the previous types of equipment of the NBI system, the extracted beam success rate of the new SGPS increased by more than 20%. The SGPS meets the requirements of the NBI system. [ABSTRACT FROM AUTHOR]

Non-thermal irreversible electroporation (NTIRE) to avoid thermal damage to cells during intense DC ns pulsed electric fields (nsPEFs) is a recent modality for medical applications. This mechanism, related to bioelectrical dynamics of the cell, is linked to the effect of a DC electric field and a threshold effect with an electrically stimulated membrane for the charge distribution in the cell. To create the NTIRE condition, the pulse width of the nsPEF should be shorter than the charging time constant of the membrane related to the cell radius, membrane capacitance, cytoplasm resistivity, and medium resistivity. It is necessary to design and fabricate a very intense nanosecond DC electric field pulser that is capable of producing voltages up to the level of 100 kV/cm with an artificial pulse width (~ns) with controllable repetition rates. Many devices to generate intense DC nsPEF using various pulse-forming line technologies have been introduced thus far. However, the previous Blumlein pulse-generating devices are clearly inefficient due to the energy loss between the input voltage and the output voltage. An improved two-stage stacked Blumlein pulse-forming line can overcome this limitation and decrease the energy loss from a DC power supply. A metal oxide silicon field-effect transistor switch with a fast rise and fall time would enable a high repetition rate (max. 100 kHz) and good endurance against very high voltages (DC ~ 30 kV). The load is designed to match the sample for exposure to cell suspensions consisting of a 200 Ω resistor matched with a Blumlein circuit and two electrodes without the characteristic RC time effect of the circuit (capacitance = 0.174 pF). [ABSTRACT FROM AUTHOR]

In tunnel field-effect transistors (tFETs), the preferred mechanism for switching occurs by alignment (on) or misalignment (off) of two energy levels or band edges. Unfortunately, energy levels are never perfectly sharp. When a quantum dot interacts with a wire, its energy is broadened. Its actual spectral shape controls the current/voltage response of such transistor switches, from on (aligned) to off (misaligned). The most common model of spectral line shape is the Lorentzian, which falls off as reciprocal energy offset squared. Unfortunately, this is too slow a turnoff, algebraically, to be useful as a transistor switch. Electronic switches generally demand an on/off ratio of at least a million. Steep exponentially falling spectral tails would be needed for rapid off-state switching. This requires a new electronic feature, not previously recognized: narrowband, heavy-effective mass, quantum wire electrical contacts, to the tunneling quantum states. These are a necessity for spectrally sharp switching. [ABSTRACT FROM AUTHOR]

By utilizing the radio-frequency metal-oxide-semiconductor field-effect transistor switch, the multi-stage stacked printed circuit board Blumlein lines, and the induction voltage adder, a voltage generator with MHz repetition rates and nanosecond duration was designed and fabricated. The shunting current of the multi-stage stacked Blumlein lines, which consists of the coupling current at the load ends and the leakage current at the switch ends, is clarified. The circuit simulation and experiment of the three-stage stacked Blumlein lines are carried out; the result shows that the experiment and simulation agree well. The five-stage IVA prototype is designed for generating voltage pulses of ∼10 kV in amplitude and 8–11 ns in duration with MHz burst repetition rates. The voltage generator with MHz repetition rates and nanosecond duration demonstrated an important application prospect to reduce the electron beam initial emittance of the high energy accelerator. [ABSTRACT FROM AUTHOR]

In this paper, a design method using a neural network of a zero-voltage-switching buck quasi-resonant DC–DC converter is presented. The use of this innovative approach is justified because the design of quasi-resonant DC–DC converters is more complex compared to that of classical DC–DC converters. The converter is a piecewise linear system mathematically described by Kirchhoff's laws and represented through switching functions. In this way, a mathematical model is used to generate data on the behavior of the state variables obtained under various design parameters. The obtained data are appropriately normalized, and a neural network is trained with them, which in practice serves as the inverse model of the device. An example is considered to demonstrate how this network can be used to design the converter. The key advantages of the proposed methodology include reducing the development time, improving energy efficiency, and the ability to automatically adapt to different loads and input conditions. This approach offers new opportunities for the design of advanced DC–DC converters in industries with high efficiency and performance requirements, such as the automotive industry and renewable energy sources. [ABSTRACT FROM AUTHOR]

This paper models and analyzes the Complementary Metal Oxide Semiconductor (CMOS) cross-coupled differential-drive (CCDD) rectifier for Ultra-Low-Power ambient radio-frequency energy harvesters (RFEHs) working in the subthreshold region. In this paper, two closed-form equations of CCDD rectifier output voltage and input resistance in the subthreshold region were derived based on BSIM4 models of NMOS and PMOS. The model give insight to specify circuit parameters according to different inputs, transistor sizes, threshold voltages, numbers of stages, load conditions and compensation voltages, which can be used to optimize the rectifier circuit. There is a good agreement between the simulation results and these models, and these models have a maximum deviation of 10% in comparison with the simulation results in the subthreshold region. The measurement results of a single-stage CCDD rectifier reported in a previous paper were adopted to verify the model. The output voltage and input resistance predicted by these models provide excellent consistency with corresponding measurement results. The model can be employed to optimize the CCDD rectifier without expensive calculation in the design stage. [ABSTRACT FROM AUTHOR]

In non-Hermitian open quantum systems, such as polariton condensates, the local tailoring of gains and losses opens up an interesting possibility to realize functional optical elements. Here, we demonstrate that deliberately introducing losses via a photonic defect, realized by reducing the quality factor of a DBR mirror locally within an ultrahigh-quality microcavity, may be utilized to create directed polariton currents towards the defect. We discuss the role of polariton–polariton interactions in the process and how to tailor the effective decay time of a polariton condensate by coupling it to the defect. Our results highlight the far-reaching potential of non-Hermitian physics in polaritonics. [ABSTRACT FROM AUTHOR]

This review article presents insights into acoustic interactions with semiconductors, exploring a continuum from electron dynamics to exciton behavior while highlighting recent developments in organic material systems. Various aspects of acoustic interactions, encompassing the manipulation of electrons and their transport mechanisms for applications in the fields of acoustoelectric and acousto-optics, explored by studying surface acoustic wave (SAW) devices integrated with inorganic and organic semiconductors, are presented here. SAWs are guided waves propagating along a piezoelectric material surface, inducing acoustic strain and piezoelectric fields within a semiconductor upon contact. These fields create a dragging force, transferring energy and momentum into the semiconductor, which manipulate and transport charge carriers, thereby generating an acoustoelectric current. Furthermore, SAW can influence exciton dynamics via type-II as well as type-I band-edge modulations, leading to alterations in their spatial distribution, causing transport of electron–hole pairs as distinct charge carrier packets and as bound pairs, respectively, along the SAW path. This paper explores advancements in these phenomena, shedding light on innovative applications and, especially, novel insights into the dynamic interplay between acoustics and organic semiconductor physics. The review concludes by outlining challenges and prospects in the field of SAW and semiconductor interactions, providing a roadmap for future research endeavors. [ABSTRACT FROM AUTHOR]

This research introduces a novel damped alternating current (DAC) testing methodology, which integrates an enhanced DAC generator with a pulse‐based distributed partial discharge (PD) detection technique. The advanced DAC generator is designed without the need for high voltage (HV) solid‐state switches, thereby offering a cost‐effective solution for field‐testing voltage generation through a direct current–alternating current conversion approach. To meet the demand for high instantaneous power, a capacitor bank is employed as the power supply. Furthermore, the implementation of a distributed PD detection technique enhances sensitivity and eliminates limitations associated with cable length. To minimize the construction costs of the distributed PD‐detection system, a pulse synchronization technique has been employed. Efforts to reduce the system's weight were informed by simulations, resulting in the design and development of a prototype weighing 850 kg for a 64/110 kV power cable. The reduction in the number of HV solid‐state switches contributes to significant cost savings, amounting to tens of thousands of dollars, when compared to conventional DAC generators. Laboratory and field tests validated the effectiveness of the cost‐efficient DAC testing methodology. [ABSTRACT FROM AUTHOR]

In this work, a nine level (9-L) asymmetrical switched-capacitor multilevel inverter (ASCMLI) based induction heated (IH) autoclave for sterilization in medical applications is proposed. Due to the several benefits of multilevel inverter such as controlling of voltage magnitude and hence uniformity of heat is maintained at the load side as compared to conventional heating of autoclave. It has two common ground-connected dc voltage sources, which makes it ideal for usage in medical applications. Moreover, the development of a compact autoclave is carried out in this work that has a much reduced running time without sacrificing the quality of its sterilization. Further, the sterilization schedule for conventional and IH autoclave is presented in different temperature and pressure condition. The distributions of magnetic flux density and induced eddy current density in the multilevel inverter based IH autoclave were also exhibited. Finally, the performance of the proposed system are validated by simulation and experimental results obtained from a laboratory prototype setup. [ABSTRACT FROM AUTHOR]

The lifetime of power electronic systems is the focus of both the academic and industrial worlds. Today, compact systems present high switching frequency and power dissipation density, causing high junction temperatures and strong thermal fluctuations that affect their performance and lifetime. This paper is a review of the existing techniques for the electro-thermal modelling of Mosfet and IGBT devices regarding lifetime estimation. The advantages and disadvantages of the methodologies used to achieve lifetime prediction are discussed, and their benefits are highlighted. All the factors required to predict power electronic device lifetime, including Mosfet and IGBT electrical models, the computation of power losses, thermal models, temperature measurement and management, lifetime models, mission profiles, cycle counting, and damage accumulation, are described and compared. [ABSTRACT FROM AUTHOR]