556 results on '"Platzner, Marco"'
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152. On Robust Evolution of Digital Hardware
153. Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution
154. A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms
155. Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity
156. Common fate graph patterns in Monte Carlo Tree Search for computer go
157. Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores
158. FPGA Redundancy Configurations: An Automated Design Space Exploration
159. ReconOS: An Operating System Approach for Reconfigurable Computing
160. Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime
161. Microarchitectural optimization by means of reconfigurable and evolvable cache mappings.
162. Application-driven design of dynamically reconfigurable processors
163. Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes
164. On-The-Fly Computing: A novel paradigm for individualized IT services
165. Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers
166. Compensating Resource Fluctuations by Means of Evolvable Hardware
167. Comparison of Bayesian move prediction systems for Computer Go
168. Design and architectures for dependable embedded systems
169. Memory Virtualization for Multithreaded Reconfigurable Hardware
170. A self-adaptive heterogeneous multi-core architecture for embedded real-time video object tracking
171. Achieving hardware security for reconfigurable systems on chip by a proof-carrying code approach
172. Performance estimation framework for automated exploration of CPU-accelerator architectures
173. FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study
174. Reconfigurable nodes for future networks
175. Engineering self-coordinating software intensive systems
176. A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier
177. A novel hybrid evolutionary strategy and its periodization with multi-objective genetic optimizers
178. Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification
179. Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules
180. An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning
181. Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000
182. ReconOS
183. Program-driven fine-grained power management for the reconfigurable mesh
184. An accelerator for K-TH nearest neighbor thinning based on the IMORC infrastructure
185. Cooperative multithreading in dynamically reconfigurable systems
186. EvoCaches: Application-specific Adaptation of Cache Mappings
187. ARMLang: A language and compiler for programming reconfigurable mesh many-cores
188. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing
189. Advanced techniques for the creation and propagation of modules in cartesian genetic programming
190. Realizing reconfigurable mesh algorithms on softcore arrays
191. Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control
192. A portable abstraction layer for hardware threads
193. SPP1148 booth: Fine grain reconfigurable architectures
194. A Many-Core Implementation Based on the Reconfigurable Mesh Model
195. ReconOS: An RTOS Supporting Hard-and Software Threads
196. Optimal temporal partitioning based on slowdown and retiming
197. An EDF schedulability test for periodic tasks on reconfigurable hardware devices
198. Executing Hardware Tasks on Dynamically Reconfigurable Devices Under Real-Time Conditions
199. Reducing the limb position effect in pattern recognition based myoelectric control using a high density electrode array.
200. Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array.
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