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Image and particle sensors based on thin-film on CMOS technology are currently being developed at our laboratory. In this technology, amorphous silicon detectors are vertically integrated on top of dedicated CMOS chips. For both, vision and particle detection, this approach is expected to enhance the performances. In fact very high fill factors, increased sensitivity, and integration level, coupled with extremely low dark current density values can potentially be attained.A first optimization of the a-Si:H diodes (>1mm2) on glass substrates, with the primary focus on reducing dark current densities, gave Jdark values as low as 1 pA/cm2 (at -1 V for 1 m thick detectors). These detectors were then deposited on CMOS readout chips, but so far this step was unfortunately accompanied by an increase in Jdark to values over 10 nA/cm2.Here, the possible cause for such an increase in Jdark as well as possible “remedies” against this effect will be discussed; the principle cause is supposed to be the influence of chip topology. Possible solutions include surface treatments as well as the use of metal-i-p diode configuration. Results obtained so far with these methods are given.

Integrated imaging and particle sensors have been developed using thin-film on ASIC technology. For this purpose, hydrogenated amorphous silicon diodes, in various configurations, have been optimized for imaging and direct particle detection. These devices were first deposited on glass substrates and later on CMOS readout chips. With an optimization of the material properties and of the diode, a dark current of 1 pA/cm2 could be achieved on p-i-n structures at reverse bias voltage of 1 V. CMOS imagers, incorporating these optimized diodes were then fabricated and characterized. Very thick diodes (with thicknesses up to 50 μm) were also optimized and deposited on glass and on CMOS readout chips. Particle detectors in TFA technology with 12 and 30 μm a-Si:H n-i-p diodes have been fabricated and characterized using light pulse illumination. Direct detection of single low-energy beta particles has been demonstrated.

Recent developments and advances in micro-electro-mechanical systems for nanometer-scale applications such as scanning force microscopy are presented. The microfabrication of tools so small that they enable access to the nanoworid, such as tips, flexible cantilevers, integrated deflection sensors and nanoactuators will be described. Bulk and surface micromachining of mono or polycrystalline silicon, extended by aligned-wafer-bonding, etch-back and sacrificial-iayer-etching steps are major fabrication steps used. Experiments on prototypes show that these devices are promising for use as ultra-sensitive stand-alone local probe micro-instruments.

We report on the first successful operation of a scanning force microscope using microfabricated capacitive force sensors. The sensors, which are made from single crystal silicon on insulator wafers, consist of a cantilever spring with integrated tip at the free end and an electrically insulated counter electrode. Dynamic force gradient sensing is the preferred operating mode. Here, tip–sample interactions are detected by letting the sensor act as a resonator in a phase controlled oscillator setup and measuring corresponding shifts of the oscillation frequency. Experiments were performed in vacuum using a standard tunneling microscope. A Cr grating on a quartz substrate served as the test sample. Topographic images showing details on a 10 nm scale were obtained operating at a constant force gradient of the order of 0.01 N/m. In addition, critical design parameters are discussed based on an analysis of the electromechanical properties of the sensors.

Image and particle sensors based on thin film on CMOS (TFC) technology, where a-Si:H detectors are vertically integrated on top of a CMOS chip, basically provide high sensitivity and low dark current densities (Jdark). However, as shown in previous work and as confirmed by the actual measurements, Jdark values depend on the topology of the chip and on the detector structure used.The present paper describes a systematic study carried out, both with test structures on glass and also with a dedicated CMOS test chip designed by CERN. The increase in Jdark is shown to be related to border effects, and especially on the detailed structure of the pixel periphery. In all cases, lower Jdark are obtained when one uses metal-i-p instead of n-i-p configuration detectors. Transferring these results to the standard TFC sensors used by them, the authors have obtained values of Jdark as low as 20 pA/cm2 at -1 V reverse bias.

Diamond is the most suitable material for many experimental methods in nanoprobe microscopy and materials testing. The extreme hardness, the high Young’s modulus, the inert nature of the surface, and the electrical conductivity obtained through doping make this material particularly attractive. We have coated silicon atomic force microscope (AFM) levers with thin (100 nm) doped diamond layers by chemical vapor deposition (CVD). A continuous diamond coating was obtained, resulting in tips with 100–200 nm radii. Owing to their electrical conductivity, these tips were found to be adequate for conducting AFM and scanning tunneling microscope applications, some of which are briefly discussed and reviewed in this article. We have also demonstrated CVD diamond tips, microfabricated in a controlled fashion, that have a 20 nm apex radius. These tips are particularly promising for nanomechanics and general AFM use.

A measurement method is reported to distinguish the different mechanisms that lead to image lag in image sensors based on pinned photodiodes (PPDs). This new method can differentiate between the lag caused by a potential barrier or pocket and gate traps independently of charge spill-back. This is in contrast to usual lag characterization techniques, which only provide a quantitative measurement of the photocharge amount that is not transferred to the sense node in the frame of interest. The method reveals itself as useful to optimize pixels for high-speed and low-noise sensors based on PPDs.

More accurate sets of linear (first order) elastic temperature coefficients are presented for monocrystalline silicon of a low-doped p-type silicon (p = 4 cm) and high-doped n-type silicon (p = 0.05 cm).

International audience; By means of Peridynamic simulations [1], we investigate the breakage mechanics of particles under he action of external forces. The particles have an internal texture composed of a distribution of cleavages (micro-cracks), representing the natural inhomogeneity of the particles. Mechanical tests were performed on 2D disks under quasi-static diametral compression for different particle sizes and distributions of microcracks [2]. The evolution of yield stress with diameter and the probability of failure in terms of Weibull distributions are investigated. A floodfill algorithm capable of determining the fragment size distribution after failure allows us toanalyse the median fragment size as a function of the initial density of cleavage. We employ the same methodology to quantify the effect of the impact energy by varying either the mass or the velocity of an impactor.References[1] X. Frank, J.-Y. Delenne, S. Nezamabadi, F. Radjaï, Strength and fracture of porous, granular and cellular materials by peridynamic simulations, submitted.[2] N. Blanc, X. Frank, C. Mayer-Laigle, F. Radjaï and J.-Y. Delenne, Peridynamics simulation of the comminution of particles containing microcraks, EPJ Web of Conferences 140, 07018 (2017)

Ce document est un rapport d’étude qui présente les travaux effectués par l'équipe Assemblages Soudés (AS) du LMGC (Univ. Montpellier - CNRS, UMR 5508) dans le cadre du projet ANR Nemesis (Projet ANR-17-CE08-0036 du Programme AAPG 2017). Il s’agit d’une étude expérimentale réalisée principalement au cours du post-doctorat de Nicolas Blanc. Le but de cette étude est de pouvoir observer la solidification et le comportement du bain de soudage in-situ pour deux types d’alliages d’intérêt industriel : l’acier 316L et l’acier 22MnB5, intéressant de façon prioritaire respectivement EDF et Arcelor Mittal, partenaires du projet ANR. Les expériences doivent permettre d’obtenir des informations sur la taille et la forme du bain, sur les écoulements existants en son sein et sur le processus de solidification. Pour cela un dispositif similaire à celui utilisé par Alexis Chiocca [1] est utilisé. Le document est organisé autour de quatre chapitres. Le premier est dédié à un succinct état de l’art afin de rappeler le contexte scientifique général et l’utilité des observations réalisées dans la compréhension des phénomènes de solidifications pendant le soudage. Le deuxième chapitre est consacré à la présentation du dispositif expérimental spécifiquement conçu pour ce type de mesures et à la présentation des méthodologies d’étude. Les deux derniers chapitres sont consacrés à la présentation des résultats obtenus respectivement pour l’acier inoxydable 316L et les alliages 22MnB5.

A prototype of a high density microelectrode array (MEA) for in-vitro recording of the electrophysiological activity of neuronal cell cultures has been developed. Based on standard CMOS technologies and dedicated post processing steps, it integrates 64/spl times/64 gold electrodes of 20/spl times/20 /spl mu/m/sup 2/, organized in a pixel array on a surface of 2.56/spl times/2.56 mm/sup 2/. Each pixel has a dimension of 40/spl times/40 /spl mu/m/sup 2/, resulting in an electrode separation of 40 /spl mu/m. The on-chip integrated logic allows to randomly select each pixel individually, enabling the read out at high sampling rate of the whole active area or of limited zones of high neuronal activity. Additionally, each pixel integrates an amplifier circuit for local signal amplification with programmable gain and filtering. Simulation results and a first electrical characterisation in phosphate solution are presented in this paper.

Image sensors based on thin-film on CMOS technology (TFC) have been developed. In this approach, amorphous silicon (a-Si:H) detectors are vertically integrated on top of a CMOS readout chip so as to form monolithic image sensors. In order to reduce as far as possible the dark current density (Jdark) of the TFC sensors, we have focused on analyzing and understanding the behavior of Jdark in this type of detectors. Edge effects along the periphery and at the corners of the pixel, due to the non planar configuration of the vertically integrated photodiodes, are found to be responsible for an increase of the dark current. A new and adapted solution for the minimization of Jdark is proposed, which combines the use of a metal-i-p a-Si:H diode configuration with a deposition on top of an unpassivated CMOS chip. Values of Jdark as low as 12 pA/cm2 at a reverse polarization of V = -1 V are measured on such TFC sensors.