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153. CMOS class-AB current mirrors for precision current-mode analog-signal-processing elements

Author

Kawahito, Shoji and Tadokoro, Yoshiaki

Subjects
Amplifiers (Electronics) -- Design and construction, Circuit design -- Analysis, Circuit quality -- Analysis, Business, Computers and office automation industries, Electronics, Electronics and electrical industries
Abstract

CMOS class-AB current mirrors for high-precision current-mode analog-signal-processing elements are described. The class-AB configuration allows us to reduce the offset error caused by device mismatch, the nonlinearity distortion, and power consumption. The offset error due to the device mismatch is greatly reduced by the reduction of the bias current. The class-AB current-mirror has less sensitivity to the mismatch since the bias current relative to the signal current can be reduced. The excellent precision is confirmed by Monte Carlo simulation and SPICE based on 1 [[micro]meter] CMOS LSI parameters.

Published
1996

155. Label-Free Biomedical Imaging Using High-Speed Lock-In Pixel Sensor for Stimulated Raman Scattering

Author

Mars, Kamel, Lioe, De Xing, Kawahito, Shoji, Yasutomi, Keita, Kagawa, Keiichiro, Yamada, Takahiro, Hashimoto, Mamoru, Mars, Kamel, Lioe, De Xing, Kawahito, Shoji, Yasutomi, Keita, Kagawa, Keiichiro, Yamada, Takahiro, and Hashimoto, Mamoru

Abstract

Raman imaging eliminates the need for staining procedures, providing label-free imaging to study biological samples. Recent developments in stimulated Raman scattering (SRS) have achieved fast acquisition speed and hyperspectral imaging. However, there has been a problem of lack of detectors suitable for MHz modulation rate parallel detection, detecting multiple small SRS signals while eliminating extremely strong offset due to direct laser light. In this paper, we present a complementary metal-oxide semiconductor (CMOS) image sensor using high-speed lock-in pixels for stimulated Raman scattering that is capable of obtaining the difference of Stokes-on and Stokes-off signal at modulation frequency of 20 MHz in the pixel before reading out. The generated small SRS signal is extracted and amplified in a pixel using a high-speed and large area lateral electric field charge modulator (LEFM) employing two-step ion implantation and an in-pixel pair of low-pass filter, a sample and hold circuit and a switched capacitor integrator using a fully differential amplifier.A prototype chip is fabricated using 0.11 m CMOS image sensor technology process. SRS spectra and images of stearic acid and 3T3-L1 samples are successfully obtained. The outcomes suggest that hyperspectral and multi-focus SRS imaging at video rate is viable after slight modifications to the pixel architecture and the acquisition system.

Published
2017

156. Proton radiation hardness of x-ray SOI pixel detectors with pinned depleted diode structure

Author

Holland, Andrew D., Beletic, James, Hayashida, Mitsuki, Kohmura, Takayoshi, Hagino, Kouichi, Oono, Kenji, Negishi, Kousuke, Yarita, Keigo, Kitajima, Masatoshi, Tsuru, Takeshi G., Tanaka, Takaaki, Uchida, Hiroyuki, Kayama, Kazuho, Kodama, Ryota, Mori, Koji, Takeda, Ayaki, Nishioka, Yusuke, Hida, Takahiro, Yukumoto, Masataka, Arai, Yasuo, Kurachi, Ikuo, Hamano, Tsuyoshi, Kitamura, Hisashi, Kawahito, Shoji, and Yasutomi, Keita

Published
2020
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170. Improvement of Spectroscopic Performance using a Charge-sensitive Amplifier Circuit for an X-ray Astronomical SOI Pixel Detector

Author

Shresthaf, S., Takeda, Ayaki, Tsuru, Takeshi Go, Tanaka, Takaaki, Uchida, Hiroyuki, Matsumura, Hideaki, Arai, Yasuo, Mori, Koji, Nishioka, Yusuke, Takenaka, Ryota, Kohmura, Takayoshi, Nakashima, Shinya, Kawahito, Shoji, Kagawa, Keiichiro, Yasutomi, Keita, and Kamehama, Hiroki

Subjects
Physics, Pixel, business.industry, Physics::Instrumentation and Detectors, Amplifier, Silicon on insulator, FOS: Physical sciences, Charge (physics), X-ray detectors, Noise (electronics), Imaging spectroscopy, Full width at half maximum, Space instrumentation, X-ray detectors and telescopes, Parasitic capacitance, Optoelectronics, business, Astrophysics - Instrumentation and Methods for Astrophysics, Instrumentation, Instrumentation and Methods for Astrophysics (astro-ph.IM), Mathematical Physics, Energy (signal processing)
Abstract

著者人数: 16名, Accepted: 2015-03-18, 資料番号: SA1150186000

Published
2015

174. A review on high-resolution CMOS delay lines: towards sub-picosecond jitter performance

Author

Abdulrazzaq, Bilal Isam, Abdul Halin, Izhal, Kawahito, Shoji, Mohd Sidek, Roslina, Shafie, Suhaidi, Md Yunus, Nurul Amziah, Abdulrazzaq, Bilal Isam, Abdul Halin, Izhal, Kawahito, Shoji, Mohd Sidek, Roslina, Shafie, Suhaidi, and Md Yunus, Nurul Amziah

Abstract

A review on CMOS delay lines with a focus on the most frequently used techniques for high-resolution delay step is presented. The primary types, specifications, delay circuits, and operating principles are presented. The delay circuits reported in this paper are used for delaying digital inputs and clock signals. The most common analog and digitally-controlled delay elements topologies are presented, focusing on the main delay-tuning strategies. IC variables, namely, process, supply voltage, temperature, and noise sources that affect delay resolution through timing jitter are discussed. The design specifications of these delay elements are also discussed and compared for the common delay line circuits. As a result, the main findings of this paper are highlighting and discussing the followings: the most efficient high-resolution delay line techniques, the trade-off challenge found between CMOS delay lines designed using either analog or digitally-controlled delay elements, the trade-off challenge between delay resolution and delay range and the proposed solutions for this challenge, and how CMOS technology scaling can affect the performance of CMOS delay lines. Moreover, the current trends and efforts used in order to generate output delayed signal with low jitter in the sub-picosecond range are presented.

Published
2016

175. Pulse Excitation of Micro-Fluxgate Sensors

Author

Ripka, Pavel, On Choi, San, Tipek, Alois, Kawahito, Shoji, and Ishida, Makoto

Subjects
Magnetic flux -- Analysis, Magnetometer -- Evaluation, Business, Electronics, Electronics and electrical industries
Abstract

Miniature fluxgate sensors with symmetrical closed core elements on both sides of the planar coils were manufactured using standard microtechnology. The new sensors have shown substantial improvement over the standard single-sided microfluxgate sensors: for the same field range the sensor noise was reduced 10-times to 20 nT rms (20 mhz ... 10 Hz) and the perming suppressed below 5 [micro]T, for field shocks of 6 mT. The maximum sensitivity for sinewave excitation was 32 V/[micro]T for 1 MHz frequency and 200 mA p-p excitation current amplitude. Pulse shape of the excitation current allows use of high current peaks to suppress perming, while the rms value is low. Using a 20% duty factor squarewave excitation with 180 mA p-p amplitude, the sensitivity was twice that of the sinewave excitation, while the chip temperature dropped from 80 [degrees] C to 40 [degrees] C. Index Terms--Fluxgate, magnetic field sensors, magnetometers, microfluxgate.

Published
2001

195. Introduction to the Special Issue on Solid-State Sensors

Author

Theuwissen, Albert J. P., primary, Fossum, Eric R., additional, Fowler, Boyd, additional, Kawahito, Shoji, additional, Magnan, Pierre, additional, Nakamura, Junichi, additional, Solhusvik, Johannes, additional, Teranishi, Nobukazu, additional, and Tower, John, additional

Published
2016
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197. A digital calibration technique for cyclic ADCs using MOS capacitors

Author

Kawahito Shoji and Zhiheng Wei

Subjects
Engineering, Offset (computer science), Differential nonlinearity, Comparator, business.industry, Amplifier, Electrical engineering, Hardware_PERFORMANCEANDRELIABILITY, Capacitance, law.invention, Capacitor, Least significant bit, Integral nonlinearity, law, Hardware_INTEGRATEDCIRCUITS, Electronic engineering, business
Abstract

This paper presents a digital calibration technique for a cyclic analog-to-digital converter (cyclic ADC) using MOS capacitors (MOSCAPs) which has a large applied voltage dependency but a high capacitance per area. The cyclic ADC with MOSCAPs has a large integral nonlinearity (INL), while the differential nonlinearity (DNL) is very small. A digital calibration algorithm for reducing the INL is presented. A simplified algorithm for reduced hardware implementation still has sufficient small INL of +1.25/-0.25 LSB. The influence of other error sources including capacitor mismatch, amplifier finite gain and comparator offset is also discussed.

Published
2013

198. A Low-Noise X-ray Astronomical Silicon-On-Insulator Pixel Detector Using a Pinned Depleted Diode Structure.

Author

Kamehama, Hiroki, Kawahito, Shoji, Shrestha, Sumeet, Nakanishi, Syunta, Yasutomi, Keita, Takeda, Ayaki, Tsuru, Takeshi Go, and Arai, Yasuo

Subjects
*X-ray astronomy, *SILICON-on-insulator technology, *PIXELS, *DIODES, *CURRENT density (Electromagnetism), *GATE array circuits
Abstract

This paper presents a novel full-depletion Si X-ray detector based on silicon-on-insulator pixel (SOIPIX) technology using a pinned depleted diode structure, named the SOIPIX-PDD. The SOIPIX-PDD greatly reduces stray capacitance at the charge sensing node, the dark current of the detector, and capacitive coupling between the sensing node and SOI circuits. These features of the SOIPIX-PDD lead to low read noise, resulting high X-ray energy resolution and stable operation of the pixel. The back-gate surface pinning structure using neutralized p-well at the back-gate surface and depleted n-well underneath the p-well for all the pixel area other than the charge sensing node is also essential for preventing hole injection from the p-well by making the potential barrier to hole, reducing dark current from the Si-SiO2 interface and creating lateral drift field to gather signal electrons in the pixel area into the small charge sensing node. A prototype chip using 0.2 μm SOI technology shows very low readout noise of 11.0 e- rms, low dark current density of 56 pA/cm2 at -35 °C and the energy resolution of 200 eV(FWHM) at 5.9 keV and 280 eV (FWHM) at 13.95 keV. [ABSTRACT FROM AUTHOR]

Published
2018
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199. A 1.1- \mu \textm 33-Mpixel 240-fps 3-D-Stacked CMOS Image Sensor With Three-Stage Cyclic-Cyclic-SAR Analog-to-Digital Converters.

Author

Arai, Toshiki, Yasue, Toshio, Kitamura, Kazuya, Shimamoto, Hiroshi, Kosugi, Tomohiko, Sung-Wook Jun, Aoyama, Satoshi, Ming-Chieh Hsu, Yamashita, Yuichiro, Sumi, Hirofumi, and Kawahito, Shoji

Subjects
COMPLEMENTARY metal oxide semiconductors, ANALOG CMOS integrated circuits, ANALOG-to-digital converters, ANALOG electronic systems, ELECTRONIC systems
Abstract

In this paper, a 1.1-μm-pitch 33-Mpixel 240-fps backside-illuminated 3-D-stacked CMOS image sensor with three-stage cyclic-cyclic-successive-approximation-register (SAR) analog-to-digital converters (ADCs) is developed. The narrow-pitch interconnection technology that connects the pixels and arrayed ADCs inside the pixel area is described. The 3-D-stacked architecture, constructed using the interconnection technology, makes it possible to place a 1932 (H) × 4 (V) correlated-double-sampling/ADC array underneath the pixel area. Furthermore, the pipelined and parallel operation of the three-stage cyclic-cyclic-SAR ADC architecture effectively reduces the conversion time period and power consumption and achieves 12-b precision within one horizontal scan time of 0.92 μs. As a result, the interconnection technology and ADC architecture achieved a high frame rate of 240 fps in 33 Mpixels. Random noise of 3.6 e- and low power consumption of 3.0 W were attained at an extremely high pixel rate of 7.96 Gpixel/s. A good figure of merit is achieved compared with recently developed image sensors. [ABSTRACT FROM AUTHOR]

Published
2017
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