151. A 45nm low power bulk technology featuring carbon co-implantation and laser anneal on 45°-rotated substrate
- Author
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Ying Li, Sadanand V. Deshpande, J. Yuan, R. Divakaruni, Oleg Gluschenkov, Heon Lee, V. Sardesai, Victor Chan, Sunfei Fang, Y.T. Chow, T. Kebede, Carl J. Radens, N. Cave, C. Ryou, S.S. Naragad, Roger A. Booth, W. Wille, Manfred Eller, Helen Wang, JiYeon Ku, J.H. Yang, Nivo Rovedo, O.S. Kwon, H. Shang, V. Vidya, Narasimhulu Kanike, W. Clark, C.W. Lai, J. Yan, J. Liang, M.R. Visokay, J. Sudijono, H. Mo, Oh-Jung Kwon, and Y. Gao
- Subjects
Materials science ,business.industry ,Electrical engineering ,Hardware_PERFORMANCEANDRELIABILITY ,Ring oscillator ,PMOS logic ,Ion implantation ,Logic gate ,Low-power electronics ,Hardware_INTEGRATEDCIRCUITS ,Optoelectronics ,Wafer ,Static random-access memory ,business ,NMOS logic - Abstract
This paper presents a cost-effective low power 45 nm bulk technology platform, primarily designed to serve the wireless multimedia and consumer electronics need. This technology platform features carbon co-IIP in the nMOS halo, laser annealing scheme, stress liner on the 45°-rotated wafer ( ) for process simplicity to achieve high device performance and low leakage together. Drive current as high as 650/320 uA/um at Ioff of 0.5 nA/um with Vdd=1.1V has been achieved for both NMOS and PMOS respectively. Ring oscillator speed (FO=1) has been boosted up by 30% with the device optimization. SRAM Vt mismatch is also improved by 10% with carbon co-IIP with good SRAM characteristics and low leakage current in 0.299 um2 cell.
- Published
- 2008