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In an Frequency-Division Duplexing (FDD) transceiver, a high power transmitted signal can leak into the RX chain due to limited isolation of a duplexer. Such signal is known as TX leakage and can seriously affect the performance of the receiver. A transmitter leakage canceller structure is proposed in this paper in order to improve isolation between the transmitter and receiver. The simulations show the proposed structure increases the isolation of a Surface Acoustic Wave (SAW) duplexer by more than 25 dB in 20 MHz bandwidth

This paper presents a method for reducing the number of weights in a time series behavioral model for a power amplifier. The least-absolute shrinkage and selection operator (Lasso) algorithm is used to reduce the kernel size, preserving the important kernels, while eliminating the less important kernels. The algorithm is evaluated on a behavioral model for a class AB amplifier, the algorithm reduces the number of weights by greater than 70% without degrading model performance by a significant amount.

This paper presents a high precision wide band switched delay line with fine tuning capability and low insertion loss. The circuit is designed to operate in the frequency range from 1 GHz to 5 GHz and tuned using MEMS switches targeting a minimum delay step of 7 ps. The delay line uses a single layer of a high permittivity substrate ("r =10), and the MEMS devices are interconnected using conventional coplanar waveguide technology (CPW). The circuit was designed and simulated using CST Microwave Studio. The simulated group delay shows a small deviation from the linear phase of less than 1o over a wide bandwidth compared to the performance of SAW and ceramic filters [1]. The simulation results shows an insertion loss and a return loss of better than 1 dB and 20 dB respectively.

This work preliminarily introduces an up to date measurement-driven examination of the spatial characteristics of network resource usage. The data set used is from a large nationwide 3G cellular network comprised of several thousand base stations. Firstly, we discuss our data set and how it can be appropriately used. Next, we examine the spatial correlation between base stations in terms of radio resource usage. We find significant spatial correlation, particularly for proximate base stations. We also examine the causality structure in the network using Granger causality and explore a metric for the identification of key indicator base stations. These indicator base stations act as hubs in the wider network and provide additional information about the future states of their neighbors. Finally, we conclude with a brief discussion of how we wish to build on this work.

A novel low-rate identication method for high power ampliers with memory-effect is presented. It is demonstrated that the required bandwidth of the feedback signal is not required to be greater than twice the signal modulation bandwidth, but is instead determined by the number of feedback samples and the degree of freedom of coefcients in the behavioral model. As the experimental measurements and extracted power amplier model show, this method can achieve a much better NMSE accuracy of modeling power amplier with nonlinear memory-effects compared with previously published approaches

A modular testbed for use in developing software defined radio is documented in this paper. The testbed is focused on the 2.4 GHz ISM band but may be used at other frequencies. An RF transceiver with variable transmit/receive frequencies and bandwidths is provided. It provides the capability to support many modulation schemes and standards such as GSM, UMTS< IEEE 802.11b and parts of the IEEE802.16 standards. It performs the RF functions of the radio, with the other PHY and MAC layer functions such as equalisation and error-coding being performed by a host computer. It communicates with the host computer system through a USB2 interface allowing data rates of up-to 60Mbytes a second. An API is used for communications with the host computer system allowing for modulation/demodulation and coding/decoding in software on the host system and reconfiguration of the radio system

In this paper a new stable high order Digital Phase Lock Loop (DPLL) design technique is proposed. This technique uses linear theory to design the DPLL. The stability of the DPLL is guaranteed by placing a restriction on the system gain. This stability boundary is found by transforming the system transfer function to the Z-domain and plotting the root locus of the LPLL for values of gain where all the system poles lie inside the unit circle. The max value of gain where all the poles lie inside the unit circle is the stability boundary. It is shown that the stability boundary of the LPLL is comparable to the stability boundary of the DPLL. Finally where the above Bessel filter system produces slow lock, gear shifting of the DPLL components is considered. This allows the DPLL to start off with a wide loop bandwidth and switch to the narrow bandwidth once the system has locked.

This article presents a method for design of cross-coupled LC oscillators using open-loop technique and large signal scattering matrix parameters (S-parameters) in place of well known and established negative resistance approach. Thanks to the open-loop methodology, the main circuit parameters such as loaded quality factor, steady-state oscillation amplitude and signal frequency under large signal regime can be extracted without, often tedious and time consuming, transient simulations. The most important aspect of the proposed method is its ability to provide relatively simple and intuitive representation of a cross-coupled oscillator under changing bias conditions, with 10% accuracy in comparison to analysis in time domain. The presented methodology is not technology specific, however CMOS was chosen due to its availability, relative low cost and popularity of circuit implementation. The article shows two low power, sub-1 V voltage controlled oscillator prototypes, one operating in class-B, the other one in class-C, designed using the described method and operating under the reduced power supply requirements yet retaining a state of the art Figure of Merit (FoM) of various VCO reported in the literature.

Mobile phone networks were traditionally voice and SMS messaging networks which made them easy to quantify and model. More recently with the advent of broadband data connections and smart phones, mobile phone networks are being used for a wide range of purposes using ever more bandwidth. This paper utilises data provided by an Irish operator to provide an initial perspective on the current uses of mobile phone networks as a within Ireland. This work serves as a precursor to the development of a quantitative model of existing behaviour which in turn will help predict future requirements.

The paper presents a method for design of LC cross-coupled oscillators based on open-loop technique and its practical application leading to a high frequency CMOS oscillator prototype. Thanks to the proposed approach, main circuit parameters as loaded quality factor (responsible for phase noise performance of LC oscillator) and steady-state oscillation amplitude can be extracted, without the necessity of time consuming transient simulations. The presented method is not technology specific and allows fast calculations under changing bias conditions. The proposed 130 nm CMOS prototype operates 10 GHz from 0.5 V power supply achieving SSB phase noise of -113 dBc/Hz at 1 MHz offset from the carrier. Low power consumption of 1.09 mW RMS, has been obtained by biasing the oscillator devices to operate in class-B i.e. VGS =Vth.

This work utilises data from an Irish mobile phone network to provide a preliminary, but novel, analysis of the interurban communication network between twenty five of the largest cities and towns in Ireland. An intuitive technique is applied to a mobile phone operator’s call detail records to identify the actual subscriber population of different urban areas with various penetration rates. Weighted communication links are generated between the urban centres based on spatial and temporal metrics of distance, and are examined for different times of the day and for different days of the week. These communication links are compared to the output of a standard gravity model in order to ascertain the latter’s ability to accurately represent Ireland’s interurban communication network. The results obtained are presented and discussed within.

non-peer-reviewed The objective of this thesis is to explore theatrical space and the cultural relationship of materials as they are experienced by people in rural Ireland. The method involved the investigation of five handball alleys in Co.Mayo, the identification of materials and the location of the sources of those materials. The results found that one of these handball alleys was part of an urban arrangement of theatrical spaces. The alley was no longer in use, in a state of disrepair and the materiality experience was lost due to the ivy covering the walls. I propose for this project a reuse of the site as a theatre with poetry with an associated playwright hostel, using this to explore a nomenological approach to design through the relationship of old and new materials with reference to past and present culture. TOC: Introduction / Primer projects in Shannon and Hamburg / Chapter One - Theatrical Space / -Theatre in everyday life / -Three Theatre Experiences / Chapter Two - Material / -Physicality of materials / -Sense of Place / Chapter Three - Investigation / -Learning From Alleys / -Advanced Construction / Conclusion - Final Presentation / Bibliography

In this paper we present the design of a low power VCO with reduced variations in VCO gain (KVCO) and subband spacing resolution (fres). The proposed VCO is designed using a 90nm CMOS process to cover a tuning range of 23%. Variations in KVCO and fres are reduced by factors of 6 and 17 respectively over a conventional sub-banded VCO, designed using the same process, to meet the same tuning range. This makes the proposed VCO more suited to stable PLL operation with its reduced KVCO requirements resulting in an improvement in phase noise performance over the conventional VCO by 2 dB. Due to the reduced loading on the VCO tank achieved by the presented design, power consumption is kept extremely low at 850 μW from a 1 V supply

Mismatches within the charge pump (CP) deteriorate the spectral perfor- mance of the CP-PLL output signal resulting in a static phase offset. Classical analog approaches to reducing this offset consume large silicon area and increase gate leak- age mismatch. For ultra-deep-submicron (UDSM) technologies where gate leakage in- creases dramatically, reduction of static phase offset through digital calibration becomes more favorable. This paper presents a novel technique which digitally calibrates static phase offset down to < 10 ps for a PLL operating at 4.8 GHz, designed using a 1V 90nm CMOS process. Calibration is completed in only 2 steps, making the proposed technique suitable for systems requiring frequent switching such as frequency hopping systems commonly used in today’s wireless communication systems.

This work utilises data from a mobile phone network to observe the com- munication and movement patterns of the Irish population between specic locations. A novel technique is applied to mobile phone network billing data to estimate the distri- bution of the phone network population across the country at key times, namely home times and work times. From these population distributions, sets of weighted trans- portation and communications links between locations are generated. These networks are analysed using indicators commonly employed in network theory such as cluster- ing coecients and betweenness centrality. Furthermore, the ability to generate such weighted links when phone network data is unavailable is investigated.

This paper presents a DC-11GHz CMOS low noise amplifier (LNA) for software-defined radio (SDR). The broadband performance is extended to cover the spectrum from near DC to 11GHz by adopting extra inductors with modified resistive feedback, folded current reuse topology. Bandwidth extension is proposed by inserting pole splitting, interstage and LC ladder inductors. A source follower jointly acts as the buffer stage for broadband output matching and feed-forward path for gain enhancement as well as noise cancellation. Simulation shows power gain of 11 ±4dB and the NF ranging from 1.8 to 3dB in 0.4-11GHz band. The LNA achieves an average IIP3 of -10dBm while consumes only 5.3mW. The proposed broadband LNA is designed in 0.18-µm CMOS process from 1.5V supply.

An optimal resource control mechanism for a multiprocessor, multi-radio node architecture is proposed. To achieve our objective, a constrained semi-Markov decision problem is formulated, which not only provides optimal resource control but also meets quality of service demands imposed by application. For each sensed event, the desired energy efficiency and performance tradeoff is achieved by the optimal stochastic policy, which selects an appropriate set of processors and radios. The proposed solution is assessed using the reported energy consumption measurements for the existing platforms. Performance evaluation results point towards the importance of proper pairing of processor and radio in achieving the energy efficiency and performance tradeoff. The proposed solution can also be employed for hand held devices equipped with multiple processors and radios.