Search

In this invited article we present a comprehensive overview of 28 nm high-k-metal gate-based ferroelectric field effect transistor devices for synaptic applications. The devices under test were fabricated on 300 mm wafers at GlobalFoundries. The fabricated devices demonstrate 103WRITE-endurance cycles and 104seconds of data-retention capability at 85 °C. We have also assessed the FeFET-based crossbar array’s performance in system-level applications. The system performance was assessed by simulating the FeFET crossbar array for neuromorphic applications. For datasets from the National Institute of Standards and Technology (MNIST), the crossbar array achieved software-comparable inference accuracy of about 97% using multilayer perceptron (MLP) neural networks.

Content addressable memory (CAM) is widely used in associative search tasks due to its parallel pattern matching capability. As more complex and data‐intensive tasks emerge, it is becoming increasingly important to enhance CAM density for improved performance and better area efficiency. To reduce the area overheads, various nonvolatile memory (NVM) devices, such as ferroelectric field‐effect transistors (FeFETs), are used in CAM design. Herein, a novel ultracompact 1FeFET CAM design that enables parallel associative search and in‐memory hamming distance calculation is used, as well as a multibit CAM for exact search using the same CAM cell. The proposed CAM design leverages the 1FeFET1R structure, and compact device designs that integrate the series resistor current limiter into the intrinsic FeFET structure are demonstrated to turn the 1FeFET1R structure into an effective 1FeFET cell. A two‐step search operation of the proposed binary and multibit 1FeFET CAM array through both experiments and simulations is proposed, showing a sufficient sensing margin despite unoptimized FeFET device variation. In genome pattern matching applications, using the hyperdimensional computing paradigm, the design results in a 89.9× speedup and 66.5× improvement in energy efficiency over the state‐of‐the‐art alignment tools on GPU.

Harnessing multibit precision in nonvolatile memory (NVM)‐based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM‐based synaptic cores suffer from the trade‐off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high‐density synaptic core. Herein, 1) evaluation of novel differential mode ferroelectric field‐effect transistor (DM‐FeFET) bitcell on a crossbar array of 4 K devices; 2) validation of weighted sum operation on 28 nm DM‐FeFET crossbar array; 3) bit density of 223Mb mm−2, which is ≈2× improvement compared to conventional FeFET array; 4) 196 TOPS/W energy efficiency for VGG‐8 network; and 5) superior bit error rate (BER) resilience showing ≈94% training and 88% inference accuracy with 1% BER are demonstrated.

A multi-level cell (MLC) operation as a 1–3 bit/cell of the FeFET emerging memory is reported by utilizing optimized Si doped hafnium oxide (HSO) and hafnium zirconium oxide (HZO) based on ferroelectric laminates. An alumina interlayer was used to achieve the thickness independent of the HSO and HZO-based stack with optimal ferroelectric properties. Various split thicknesses of the HSO and HZO were explored with lamination to increase the FeFET maximum memory window (MW) for a practical MLC operation. A higher MW occurred as the ferroelectric stack thickness increased with lamination. The maximum MW (3.5 V) was obtained for the HZO-based laminate; the FeFETs demonstrated a switching speed (300 ns), 10 years MLC retention, and 104 MLC endurance. The transition from instant switching to increased MLC levels was realized by ferroelectric lamination. This indicated an increased film granularity and a reduced variability through the interruption of ferroelectric columnar grains. The 2–3 bit/cell MLC levels and maximum MW were studied in terms of the size-dependent variability to indicate the impact of the ferroelectric area scaling. The impact of an alumina interlayer on the ferroelectric phase is outlined for HSO in comparison to the HZO material. For the same ferroelectric stack thickness with lamination, a lower maximum MW, and a pronounced wakeup effect was observed in HSO laminate compared to the HZO laminate. Both wakeup effect and charge trapping were studied in the context of an MLC operation. The merits of ferroelectric stack lamination are considered for an optimal FeFET-based synaptic device operation. The impact of the pulsing scheme was studied to modulate the FeFET current to mimic the synaptic weight update in long-term synaptic potentiation/depression.

Novel devices based on ferroelectric hafnium oxide comply with the increasing demand for highly scalable embedded non-volatile memory devices, especially for in-memory computing applications. However, due to the polycrystalline nature of these hafnium oxide films, highly scaled devices face variability concerns. In order to enable smaller grains to circumvent the current limitations, the introduction of Al2O3 interlayers to interrupt the columnar grain growth is presented herein. Transmission Kikuchi diffraction is utilized to investigate influences of the Al2O3 layer on the microstructure of hafnium oxide. Moreover, electrical analysis indicates how the interlayer affects the wake-up phenomena as well as the electric field distribution within the stack. These results provide evidence on how to control grain size, electric behavior, and crystallization temperature by the insertion of Al2O3 interlayers.

This work presents 2-bits/cell operation in deeply scaled ferroelectric finFETs (Fe-finFET) with a 1 µs write pulse of maximum ±5 V amplitude and WRITE endurance above 109 cycles. Fe-finFET devices with single and multiple fins have been fabricated on an SOI wafer using a gate first process, with gate lengths down to 70 nm and fin width 20 nm. Extrapolated retention above 10 years also ensures stable inference operation for 10 years without any need for re-training. Statistical modeling of device-to-device and cycle-to-cycle variation is performed based on measured data and applied to neural network simulations using the CIMulator software platform. Stochastic device-to-device variation is mainly compensated during online training and has virtually no impact on training accuracy. On the other hand, stochastic cycle-to-cycle threshold voltage variation up to 400 mV can be tolerated for MNIST handwritten digits recognition. A substantial inference accuracy drop with systematic retention degradation was observed in analog neural networks. However, quaternary neural networks (QNNs) and binary neural networks (BNNs) with Fe-finFETs as synaptic devices demonstrated excellent immunity toward the cumulative impact of stochastic and systematic variations.

Devices based on ferroelectric hafnium oxide are of major interest for sensor and memory applications. In particular, Si-doped hafnium oxide layers are investigated for the application in the front-end-of-line due to their resilience to high thermal treatments. Due to its very confined doping concentration range, Si:HfO2 layers based on thermal atomic layer deposition often exhibited a crossflow pattern across 300 mm wafer. Here, plasma enhanced atomic layer deposition is explored as an alternative method for producing Si-doped HfO2 layers, and their ferroelectric and pyroelectric properties are compared.

Ferroelectric domain wall conductance is a rapidly growing field. Thin-film lithium niobate, as in lithium niobate on insulators (LNOI), appears to be an ideal template, which is tuned by the inclination of the domain wall. Thus, the precise tuning of domain wall inclination with the applied voltage can be used in non-volatile memories, which store more than binary information. In this study, we present the realization of this concept for non-volatile memories. We obtain remarkably stable set voltages by the ferroelectric nature of the device as well as a very large increase in the conduction, by at least five orders of magnitude at room temperature. Furthermore, the device conductance can be reproducibly tuned over at least two orders of magnitude. The observed domain wall (DW) conductance tunability by the applied voltage can be correlated with phase-field simulated DW inclination evolution upon poling. Furthermore, evidence for polaron-based conduction is given.

Recently, the perpendicular magnetic tunnel junctions (p-MTJs) arouse great interest because of its unique features in the application of spin-transfer-torque magnetoresistive random access memory (STT-MRAM), such as low switching current density, good thermal stability and high access speed. In this paper, we investigated current induced switching (CIS) in ultrathin MgO barrier p-MTJs with dimension down to 50 nm. We obtained a CIS perpendicular tunnel magnetoresistance (p-TMR) of 123.9% and 7.0 Ω·μm2 resistance area product (RA) with a critical switching density of 1.4×1010 A/m2 in a 300 nm diameter junction. We observe that the extrinsic breakdown mechanism dominates, since the resistance of our p-MTJs decreases gradually with the increasing current. From the statistical analysis of differently sized p-MTJs, we observe that the breakdown voltage (Vb) of 1.4 V is 2 times the switching voltage (Vs) of 0.7 V and the breakdown process exhibits two different breakdown states, unsteady and steady state. Using Simmons’ model, we find that the steady state is related with the barrier height of the MgO layer. Furthermore, our study suggests a more efficient method to evaluate the MTJ stability under high bias rather than measuring Vb. In conclusion, we developed well performant p-MTJs for the use in STT-MRAM and demonstrate the mechanism and control of breakdown in nano-scale ultrathin MgO barrier p-MTJs.

The microstructure of ferroelectric hafnium oxide plays a vital role for its application, e.g., non-volatile memories. In this study, transmission Kikuchi diffraction and scanning transmission electron microscopy STEM techniques are used to compare the crystallographic phase and orientation of Si and Zr doped HfO2 thin films as well as integrated in a 22 nm fully-depleted silicon-on-insulator (FDSOI) ferroelectric field effect transistor (FeFET). Both HfO2 films showed a predominately orthorhombic phase in accordance with electrical measurements and X-ray diffraction XRD data. Furthermore, a stronger texture is found for the microstructure of the Si doped HfO2 (HSO) thin film, which is attributed to stress conditions inside the film stack during crystallization. For the HSO thin film fabricated in a metal-oxide-semiconductor (MOS) like structure, a different microstructure, with no apparent texture as well as a different fraction of orthorhombic phase is observed. The 22 nm FDSOI FeFET showed an orthorhombic phase for the HSO layer, as well as an out-of-plane texture of the [111]-axis, which is preferable for the application as non-volatile memory.

This paper presents substantial improvements of the colloidal photolithography technique (also called microsphere lithography) with the goal of better controlling the geometry of the fabricated nano-scale structures—in this case, hexagonally arranged nanopillars—printed in a layer of directly photopatternable sol-gel TiO2. Firstly, to increase the achievable structure height the photosensitive layer underneath the microspheres is deposited on a reflective layer instead of the usual transparent substrate. Secondly, an increased width of the pillars is achieved by tilting the incident wave and using multiple exposures or substrate rotation, additionally allowing to better control the shape of the pillar’s cross section. The theoretical analysis is carried out by rigorous modelling of the photonics nanojet underneath the microspheres and by optimizing the experimental conditions. Aspect ratios (structure height/lateral structure size) greater than 2 are predicted and demonstrated experimentally for structure dimensions in the sub micrometer range, as well as line/space ratios (lateral pillar size/distance between pillars) greater than 1. These nanostructures could lead for example to materials exhibiting efficient light trapping in the visible and near-infrared range, as well as improved hydrophobic or photocatalytic properties for numerous applications in environmental and photovoltaic systems.

The microstructuring of the distribution of silver nanoparticles (NPs) in mesoporous titania films loaded with silver salts, using two-beam interference lithography leading to 1 Dimension (1D) grating, induces variations in the photocatalytic efficiency. The influence of the structuration was tested on the degradation of methyl blue (MB) under ultraviolet (UV) and visible illumination, giving rise to a significant improvement of the photocatalytic efficiency. The periodic distribution of the NPs was characterized by transmission electron microscopy (TEM), high-angle annular dark field scanning transmission electron microscopy (HAADF-STEM) and scanning electron microscopy (SEM).