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A novel power PiN diode model is derived based on the generalised all-injection level minority carrier drift–diffusion theory. An equivalent lossy transmission lines describing the carriers transport trough arbitrarily doped emitter and base quasi-neutral regions are defined. The extended electro-thermal diode model including temperature dependences of carrier transport parameters is also described and implemented in circuit simulator PSPICE. By tuning a small set of model parameters, an excellent agreement of modelling results with numerical simulations of realistic power PiN diode is obtained for different switching conditions and temperatures.

Background— In patients with atrial fibrillation (AF), the risk of thromboembolic events (TEs) is variable and is influenced by the presence and number of comorbid conditions. The effect of percutaneous left atrial radiofrequency ablation (LARFA) of AF on the risk of TEs is unclear. Methods and Results— LARFA was performed in 755 consecutive patients with paroxysmal (n=490) or chronic (n=265) AF. Four hundred eleven patients (56%) had ≥1 risk factor for stroke. All patients were anticoagulated with warfarin for ≥3 months after LARFA. A TE occurred in 7 patients (0.9%) within 2 weeks of LARFA. A late TE occurred 6 to 10 months after ablation in 2 patients (0.2%), 1 of whom still had AF, despite therapeutic anticoagulation in both. Among 522 patients who remained in sinus rhythm after LARFA, warfarin was discontinued in 79% of 256 patients without risk factors and in 68% of 266 patients with ≥1 risk factor. Patients older than 65 years or with a history of stroke were more likely to remain anticoagulated despite a successful outcome from LARFA. None of the patients in whom anticoagulation was discontinued had a TE during 25±8 months of follow-up. Conclusions— The risk of a TE after LARFA is 1.1%, with most events occurring within 2 weeks after the procedure. Discontinuation of anticoagulant therapy appears to be safe after successful LARFA, both in patients without risk factors for stroke and in patients with risk factors other than age >65 years and history of stroke. Sufficient safety data are as yet unavailable to support discontinuation of anticoagulation in patients older than 65 years or with a history of stroke.

An original work in developing technology that allows the integration of multiple vertical power devices within Power ICs has been presented in this manuscript. The developed technology uses a combination of top and back trenches as well as wafer sawing to achieve complete dielectric isolation between the silicon islands. Each silicon island is capable of holding either single vertical power device or CMOS circuitry. The test structures have been manufactured, wafer diced and individual chips packaged and tested initially for mechanical and thermal stability.

A novel method of obtaining sensorless speed information of induction motors, derived from space vector angular fluctuation, is presented in this paper. It obtains data from stator current by exploring the position of the current space vector in the space vector plane. The space vector signal and variations of the phase angle of the vector are subjected to Short Time Fourier Transformation (STFT) and analyzed in the time-frequency domain. High-resolution spectrum technique is adopted to modify spectrum of FFT. The method has been tested on laboratory induction motors, as well as by computer simulation. In the case of motor starting, when motor speed can change rapidly, this allows speed estimation within a few cycles.

Fast power devices thermal simulation method based on averaging power losses over each cycle of PWM switching frequency is presented in this paper. For implementing a long real time dynamic thermal simulation of power devices, device power losses during transient process and static characteristics are defined as a function of device conduction current and junction temperature, and are represented by a lookup table. By carrying out the circuit electrical simulation, the device conduction current can be obtained. By combining the device conduction currents, global device temperature (GDT) and the data from the lookup table, the average power loss over each cycle of PWM switching frequency is then calculated for carrying out the thermal simulation. With the proposed method, a relative large simulation time step can be employed and simulation speed can be increased dramatically. The method is suitable for a long real time thermal simulation for complex power electronics systems.

In this paper, a comparison of gold, nickel and aluminium Schottky diodes fabricated on high-quality, single-crystal CVD diamond is presented. Different metals, such as gold, nickel and aluminium, have been deposited on the oxidised surface of an intrinsic diamond layer to serve as Schottky contacts, in order to investigate the physical properties of the different metal-semiconductor interfaces. A Cr-layer, followed by a subsequent Au deposition was used to form the ohmic back contact for the Au-Schottky diodes, whereas a Cr-layer followed by a Ni deposition formed the ohmic contact for the Ni and Al-Schottky contacts. Contacts have been characterized using I-V measurements. The gold Schottky contacts exhibited reverse leakage currents as low as 0.01 muA at a reverse voltage of -600V, rising to 10 -A at 1kV (without any periphery protection). Nickel and aluminium contacts exhibited lower reverse leakage currents and higher average breakdown voltages, whilst giving poorer forward conduction

Fast power devices thermal simulation method based on averaging power losses over each cycle of PWM switching frequency is presented in this paper. For implementing a long real time dynamic thermal simulation of power devices, device power losses during transient process and static characteristics are defined as a function of device conduction current and junction temperature, and are represented by a lookup table. By carrying out the circuit electrical simulation, the device conduction current can be obtained. By combining the device conduction currents, global device temperature (GDT) and the data from the lookup table, the average power loss over each cycle of PWM switching frequency is then calculated for carrying out the thermal simulation. With the proposed method, a relative large simulation time step can be employed and simulation speed can be increased dramatically. The method is suitable for a long real time thermal simulation for complex power electronics systems

An alternative CMOS manufacturing process architecture for implementing power integrated circuits that may be used for applications requiring a bridge topology is presented. A RESURF N-LDMOS high-side compatible power transistor was designed onto the new process using TSuprem4 and Medici TCAD software. Masks were designed using Cadence Virtuoso and the new structure was manufactured at X-Fab UK Ltd. The physical results show good transistor characteristics compatible for high-side applications. The Specific RDSon for the new device is 260mOmegamm2 and breakdown voltage for both high-side and low-side operation exceeds 100V

An advanced physics-based equivalent-circuit model of IGBT has been described featuring a high accuracy in predicting device electrical performance in real circuit applications. A SPICE Level 3 model is employed for simulation of the equivalent DMOSFET, while the voltage dependant drain- to-gate overlapping capacitance and drain ohmic resistance elements are modelled separately. The one-dimensional physics- based model of the low-gain BJT device is developed using the equivalent non-linear lossy transmission line sub-circuit. IGBT model is implemented in PSPICE circuit simulator and high accuracy of the model is demonstrated by comparing the simulation results with the electrical measurements of several test power circuits.

Background— Because the genesis of atrial fibrillation (AF) is multifactorial and variable, an ablation strategy that involves pulmonary vein isolation and/or a particular set of ablation lines may not be equally effective or efficient in all patients with AF. A tailored strategy that targets initiators and drivers of AF is a possible alternative to a standardized lesion set. Methods and Results— Catheter ablation was performed in 153 consecutive patients (mean age, 56±11 years) with symptomatic paroxysmal AF with the use of an 8-mm tip radiofrequency ablation catheter. The esophagus was visualized with barium. The pulmonary veins and left atrium were mapped during spontaneous or induced AF. Arrhythmogenic pulmonary veins were isolated or encircled. If AF was still present or inducible, complex electrograms in the left atrium, coronary sinus, and superior vena cava were targeted for ablation. The end point of ablation was absence of frequent atrial ectopy and spontaneous AF during isoproterenol infusion and noninducibility of AF. Routine energy applications near the esophagus were avoided. During follow-up, left atrial flutter developed in 19% of patients and was still present in 10% at >12 weeks of follow-up. A repeat ablation procedure was performed in 18% of patients. During a mean follow-up of 11±4 months, 77% of patients were free from AF and/or atrial flutter without antiarrhythmic drug therapy. Pericardial tamponade or transient neurological events occurred in 2% of procedures. Conclusions— A tailored ablation strategy that only targets triggers and drivers of AF is feasible and eliminates paroxysmal AF in ≈80% of patients.

The paper discusses the impact of active junction isolation (AJI) structures on the switching speed of power MOSFETs embedded in a power integrated circuit. These structures are charge activated and so it is crucial to allow sufficient time for them to charge and discharge in order for them to become effective. A switching period longer than these relaxation times has the potential to result in severe on-chip charge build-up. The effect of grounding on the AJI performance has been investigated, since the effectivness of the active junction isolation techniques relies on changing locally the potential of the floating substrate in proximity of the carrier injection point.

Background The coronary sinus (CS) and its branches may play a role in the genesis of various arrhythmias. Applications of radiofrequency energy within the CS may be necessary. Atrio-esophageal fistula has been recognized as a complication of ablation along the posterior left atrial wall. Objectives The purpose of this study was to describe the in vivo topographic anatomy of the CS, esophagus, and coronary arteries using computed tomography (CT). Methods Helical contrast CT of the heart with three-dimensional and endoscopic reconstructions was performed in 50 patients (28 men and 22 women; mean age 54 ± 10 years). The images were reformatted to determine the relationships among the CS, adjacent blood vessels, and esophagus and to determine the nature and thickness of surrounding tissue layers. Results Mean CS ostium diameter was 12 ± 4 mm, and mean thickness of the periosteal fat layer was 3 ± 2 mm. In 40 of the 50 patients (80%), the esophagus was adjacent to the CS, starting 24 ± 9 mm from the ostium, and remained in contact for a mean length of 7 ± 5 mm. Mean thickness of the fat layer between the esophagus and CS was 1 ± 1 mm, and mean thickness of the anterior wall of the esophagus was 3 ± 2 mm. In 10 patients (20%), there was no contact between the esophagus and CS. In 40 patients (80%), the right coronary artery was less than 5 mm from the CS (minimum distance 1 ± 1 mm) over a mean length of 17 ± 11 mm. In all patients, the circumflex artery was less than 5 mm from the CS (minimum distance 1 ± 0.4 mm) over a mean length of 16 ± 9 mm in patients with right-dominant coronary circulation and over a mean length of 86 ± 11 mm in patients with left-dominant coronary circulation. Conclusion The CS often lies very close to the esophagus and coronary arteries. During radiofrequency energy ablation in the CS, caution should be exercised to prevent injury to surrounding structures.

A fast power losses calculation method for long real time thermal simulation of IGBT module for a three-phase inverter system is presented in this paper. The speed-up is obtained by simplifying the representation of the three-phase inverter at the system modelling stage. This allows the inverter system to be simulated predicting the effective voltages and currents whilst using large time-step. An average power losses is calculated during each clock period, using a pre-defined look-up table, which stores the switching and on-state losses generated by either direct measurement or automatically based upon compact models for the semiconductor devices. This simulation methodology brings together accurate models of the electrical systems performance, state of the art-device compact models and a realistic simulation of the thermal performance in a usable period of CPU time and is suitable for a long real time thermal simulation of inverter power devices with arbitrary load. Thermal simulation results show that with the same IGBT characteristics applied, the proposed model can give the almost same thermal performance compared to the full physically based device modelling approach. Copyright © 2006 John Wiley & Sons, Ltd.

This paper investigates the performance of single and multiple junction isolation structures for smart power IC’s with regards to transient carrier injection. Both, single and multiple isolation structures are produced using a standard CMOS process all using the same surface area. The devices are based on different active junction isolation principles and it is shown that combinations of these devices can significantly improve the blocking characteristics of the isolation without an increase in surface area. It is shown that the transient current rejection of the devices is markedly different from their dc blocking characteristics. Considerations for the design of efficient isolation structures are discussed.

A 0.6 /spl mu/m CMOS process was adapted to incorporate LDMOS transistors for Power Integrated Circuit Applications. The design was realised by adding only three additional ion implants process steps and one extra masking process step providing a cost effective approach. The design was optimised prior to manufacture by the Avanti TCAD simulation tool. Physical results show good agreement with the simulated device and display 2-D RESURF action.

New LDMOSFET device based on 0.6 microns CMOS technology (X-Fab Plymouth, UK) is presented in this paper. The process is based on p-(substrate)/p-(epi) layers, layer thicknesses and dopings being standard for this type of technology. The optimised device has a 75 V breakdown voltage.

An electro-thermal (ET) strategy used for ET circuit simulations is described in this paper. An original program for a MATLAB environment based on a deconvolution method is written and used for a determination of the RC dynamic thermal network parameters. An excellent agreement is obtained between experimental thermal transient response function of the device for a step function excitation and simulated one obtained using corresponding RC thermal network.

A physically based compact device model of the PIN diode is presented. A new 1D module for the drift zone (low doped n-base region) is presented which correctly describes static and dynamic behavior of the power diode. This incorporates conductivity modulation and non-quasistatic charge storage effect. Finally, this electric model is transformed into a electrothermal model by adding an extra node (thermal node) to the electrical compact model. This thermal node stores information about junction temperature of the active device and it represents a connection between the device and the rest of the circuit thermal network.

New dynamic electro-thermal models of the power MOSFET, and power bipolar devices (PiN diode and IGBT) are presented in this paper. Firstly, electric device models were made, and then they were transformed into the electro-thermal models by adding a thermal node. This thermal node stores information about junction temperature and represents a connection between the device and rest of the circuit thermal network. All models have been found to be efficient and robust in all cases examined.

The impact of a titanium barrier layer on the residual thermal stress in passivated multilevel aluminium metallization structure (Al lines and connecting via) is investigated using an advanced finite element approach. It is confirmed that the titanium, when is presented in the structure, can significantly improve the reliability of the Al metallization.

A new physically-based compact device model of the PiN diode is presented. A one-dimensional model for the drift zone (low doped n-base region) is presented which accurately describes conductivity modulation and non-quasistatic charge storage effects within the structure. To validate the power diode compact model, simulation results are compared with those from a detailed drift-diffusion finite-element model, as well as with experimental results (for two different devices), showing an excellent agreement in all cases. The model is found to be efficient and robust in all cases examined.

A novel enhancement mode structure, a buried gate gallium nitride (GaN) high electron mobility transistor (HEMT) with a breakdown voltage (BV) of 1400 V–4000 V for a source-to-drain spacing (LSD) of 6 μm–32 μm, is investigated using simulations by Silvaco Atlas. The simulations are based on meticulous calibration of a conventional lateral 1 μm gate length GaN HEMT with a source-to-drain spacing of 6 μm against its experimental transfer characteristics and BV. The specific on-resistance RS for the new power transistor with the source-to-drain spacing of 6 μm showing BV = 1400 V and the source-to-drain spacing of 8 μm showing BV = 1800 V is found to be 2.3 mΩ cm2 and 3.5 mΩ cm2, respectively. Further improvement up to BV = 4000 V can be achieved by increasing the source-to-drain spacing to 32 μm with the specific on-resistance of RS = 35.5 mΩ cm2. The leakage current in the proposed devices stays in the range of ~5 × 10−9 mA mm−1.

A structure for the isolation of power transistors from (CMOS) control circuitry used in smart power integrated circuits is proposed. This negative feedback activated junction isolation is compatible with standard CMOS technology.

Considerations of the electrical system configuration and the control strategy for the wave dragon (WD) multi-megawatt (MW) offshore wave energy converter (WEC) are presented in this study. The electrical system consists of 16–20 turbine–generator–AC/DC/AC converter units. The characteristics of the low-head water-turbine and generator control strategy enabling maximum energy capture and the best performance for the MW offshore wave energy power take-off system are described in detail. Simulation results from a single turbine–generator–frequency converter unit at different turbine heads are presented at the end of the study.

Temperature and temperature variation cycles of insulated gate bipolar transistors (IGBTs) are important variables for reliability assessment of inverter power module (IPM) applied in hybrid vehicles. Conventional electro-thermal (ET) simulation based on physics device model has been considered as an accurate method, but it is difficult to conduct a long real-time (over 10 min) thermal simulation as required in hybrid vehicles. In this study, a fast ET simulation model for long real-time thermal simulation of three-phase IGBT IPMs is presented in which the consideration of inverter/motor power train modelling, determination of simulation time step, calculation of temperature-dependent power losses as well as thermal network are discussed in detail. The advantage of the proposed simulation model is the IGBT temperature and variation cycle with power cycles of vehicles can be simulated at a fast speed without significant loss of accuracy. Device temperature over 10 min of real-time operation for a three-phase IGBT IPM has been simulated and validated by an experimental test.

Practical results are used to parameterise a physically based, compact IGBT model for three generations of IGBT (PT, NPT and IGBT3), at temperatures extending down to 50 K. Full details are presented of the model parameter variations with temperature over the range 50-300 K. The models are then used to examine the performance of a sinusoidal pulse-width-modulated inverter leg at cryogenic temperatures.

SESSION 32: CATHETER ABLATION V: New Techniques and Approaches Friday, May 6, 2005 10:45 a.m.–12:15 p.m.

An advanced strategy is presented for modelling thermal stress induced in aluminium interconnections during processing. The advantage of the approach described is that it allows the residual stresses from one technological step to be used as an initial condition for subsequent steps. The particular example demonstrated here is for a passivated aluminium line (silicon-glass-aluminium-glass), however, the technique is readily extendible to more complex situations and material combinations.

Objectives The purpose of this study was to identify ventricular tachycardia (VT) isthmus sites by pace-mapping within scar tissue and to identify electrogram characteristics that are helpful in identifying VT isthmus sites during sinus rhythm (SR). Background Pace-mapping has been used in the scar border zone to identify the exit site of post-infarction VT. Methods In 19 consecutive patients (18 men, mean age 66 ± 9 years, mean ejection fraction 0.24 ± 0.12) with post-infarction VT, a left ventricular voltage map was generated during SR. Pace-mapping was performed at sites with abnormal electrograms or isolated potentials. Radiofrequency ablation was performed at isthmus sites as defined by pace-mapping (perfect pace-map = 12/12 matching electrocardiogram leads; good pace-map = 10/12 to 11/12 matching electrocardiogram leads) and/or entrainment mapping. Results A total of 81 VTs (mean cycle length 396 ± 124 ms) were inducible. In 16 of the 19 patients, a total of 41 distinct isthmus areas of 41 distinct VTs were identified and successfully ablated. All but one displayed isolated potentials during SR. Furthermore, 22 of the 81 VTs (27%) for which no isthmus was identified became noninducible after ablation of a targeted VT. The 16 patients in whom ≥1 isthmus was identified and ablated were free of arrhythmic events during a mean follow-up of 10 months. Conclusions During SR, excellent or good pace-maps at sites of isolated potentials within areas of scar identify areas of fixed block that are protected and part of the critical isthmus of post-infarction VT. Shared common pathways might explain why non-targeted VTs might become noninducible after ablation of other VTs.

Objectives The aim of this study was to determine the effects of circumferential pulmonary vein ablation (CPVA) and electrogram-guided ablation (EGA) on the spectral characteristics of atrial fibrillation (AF) and the relationship between changes in dominant frequency (DF) and clinical outcome. Background Circumferential pulmonary vein ablation and EGA have been used to eliminate AF. Spectral analysis may identify high-frequency sources. Methods In 84 consecutive patients, CPVA (n = 42) or EGA (n = 42) was performed for paroxysmal (n = 49) or persistent (n = 35) AF. During EGA, complex electrograms were targeted. Lead V1and electrograms from the left atrium and coronary sinus were analyzed to determine the DF of AF before and after ablation. Results The left atrial DF was higher in persistent (5.83 ± 0.86 Hz) than paroxysmal AF (5.33 ± 0.76 Hz, p = 0.03). There was a frequency gradient from the left atrium to the coronary sinus (p = 0.02). Circumferential pulmonary vein ablation and EGA resulted in a similar decrease in DF (18 ± 17% vs. 17 ± 15%, p = 0.8). During a mean follow-up of 9 ± 6 months, the change in DF after CPVA was similar among patients with and without recurrent AF. An acute decrease in DF after EGA was associated with freedom from recurrent AF only in patients with persistent AF (19 ± 14% vs. 3 ± 6%, p = 0.02). Conclusions Both CPVA and EGA decrease the DF of AF, consistent with elimination of high-frequency sources. Whereas the efficacy of EGA is associated with a decrease in DF in patients with persistent AF, the efficacy of CPVA is independent of changes in DF. This suggests that CPVA and EGA eliminate different mechanisms in the genesis of persistent AF.

This paper describes recent experimental work carried on the optimisation of junction isolation structures for use in Power Integrated Circuits. Isolation is required to collect minority carriers injected into the substrate before the can reach the low voltage control circuitry. The most effect form of isolation found in this paper combines A number of techniques (SJI & MAAP) to reduce the injected current by3 orders of magnitude compared with the standard junction isolation techniques.