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A Pixel Circuit and a Gate Driver on Array for light‐emitting display are presented. By simultaneously utilizing Top‐Gate n‐type Oxide and p‐type LTPS TFTs, the circuits provide high refresh rate and low power consumption. An AMOLED panel with proposed circuits is fabricated and driving at various refresh rate ranging from 1Hz to 120Hz could be achieved. [ABSTRACT FROM AUTHOR]

We demonstrate the level shifter integrated gate drive circuits using Low‐Temperature Poly‐Si (LTPO) TFT technology. Three level shifters are integrated with a 16‐stage 2‐clock CMOS shift register. A low 5 V start pulse is level up to a high 20 V for gate driving operation. The 4 μs pulse width ensures its speed compatibility to drive an Ultra‐High Definition (UHD) 4K displays (3840 X 2160 @ 60 Hz). [ABSTRACT FROM AUTHOR]

This paper introduces a new type of switched-mode gate driver, which is capable of operating at high frequencies. This topology satisfies requirements of small passive storage components, low-voltage stress, and high design flexibility. Most popular gate-drive circuits require at least two transistors. The proposed circuit has only a single transistor and is suitable for operation at switching frequencies on the order of several megahertz. The output voltage of the gate driver is a quasi-rectangular waveform shaped by a resonant network to produce the desired gate–source voltage waveform. A detailed steady-state operation of the proposed gate driver is discussed. The power-loss analysis and design procedure are presented. Experimental results are given to verify the presented analytical approach. A laboratory prototype of the gate driver is designed, built, and tested at a switching frequency of 20 MHz. [ABSTRACT FROM AUTHOR]

A major challenge in the implementation of flying capacitor multilevel (FCML) converters and hybrid switched-capacitor (SC) converters is providing gate drive power to the large number of floating switches. A common solution uses isolated dc/dc converters, which are bulky, expensive, and energy inefficient. To design more compact and efficient gate drive power supply circuits, five methods are presented and compared in this article: bootstrap at deadtime, cascaded bootstrap with low-dropout (LDO) regulator, double charge pump, gate-driven charge pump, and synchronous bootstrap. By leveraging the inherent properties of multilevel converters, these methods can overcome the limitation of conventional bootstrap method (diode forward voltage drop) and make it possible to transfer ground-referenced power to all of the floating switches for any FCML or hybrid SC converters. Compared with the typical isolated dc/dc solution, these methods have simple structure and operating principle and can be implemented with a small number of diodes, capacitors, and LDOs. Experimental results show that an example power supply circuit can cut the size of the power stage of a state of the art seven-level FCML converter by half at 1/6 of the cost. [ABSTRACT FROM AUTHOR]

A pixel circuit and a gate driver on array for light‐emitting display are presented. By simultaneously utilizing top‐gate n‐type oxide and p‐type low‐temperature polycrystalline silicon (LTPS) thin‐film transistors (TFTs), the circuits provide high refresh rate and low power consumption. An active‐matrix LED (AMOLED) panel with proposed circuits is fabricated, and driving at various refresh rate ranging from 1 to 120 Hz could be achieved. [ABSTRACT FROM AUTHOR]

This brief presents a simple cost-effective design approach for an insulated gate bipolar junction transistor (IGBT) gate driver board used in manual metal arc constant current power source and manual metal inert gas welding constant voltage power source. In order, to design a universal IGBT driver board, an electrical model of the inverter welding power source is analyzed in this brief and an experimental prototype was developed and was put in rigorous use to test its durability. The proposed method is applied to an 18 kW inverter welding power source, and then the measurement results are analyzed. A cost benefit analysis was made to ascertain the techno-economic viability of the proposed driver. [ABSTRACT FROM AUTHOR]

A global and real-time control with embedded hardware artificial neural network (ANN) for imbalance current suppression of parallel connected insulated gate bipolar transistors (IGBTs) is first proposed in this paper. This method focuses on control strategy and control execution. The former one is realized by porting the ANN-based PID (ANN-PID) strategy in the control loop to yield the real-time and adaptive characteristics without IGBT quantity limitation. The latter one is realized by designing the IGBT gate quantity of charge regulator (GQR) to execute the command from ANN-PID controller. The evaluation of ANN-PID algorithm results 0.023% mean error in IGBT current control that reveals the feasibility of the proposed method. A full prototype with FPGA-based hardware accelerator for ANN-PID computing, including the designed GQR circuit, has been built for realization and qualification in a buck converter with parallel connected IGBTs. The experimental results show that the performance of the proposed method in imbalance current suppression is improved about 3.5–5.5 times as the load increase from low to high with the advantage of immunity to load change and the current imbalance can be suppressed within 4%. [ABSTRACT FROM AUTHOR]

This paper presents a new gate driver integrated by In-Zn-O thin-film transistors (IZO TFTs) with the etch stop layer (ESL) structure, in which only a single negative power source is used on account of a new boosting module. The boosting module is controlled only by the VIN signal for generating a lower level than VSS. The proposed gate driver with 15 stages is fabricated through the IZO TFT process on a glass substrate to verify its function. The experiment results showed that the proposed gate driver can successfully output full-swing waveforms with resistive load RL=2 kΩ and capacitive load CL=30 pF at the 16.7 and 66.7 kHz clock frequencies, and can also output as small as 3.2 μs pulse width with little distortion, revealing good stability. [ABSTRACT FROM AUTHOR]

Silicon carbide (SiC) devices can significantly increase power efficiency, temperature reliability, power capacity, and power density because of their outstanding characteristics. Nevertheless, in the bridge-leg configuration of a power converter, the high-speed switching capability of SiC mosfets is often restricted by the coupling noise between high-side mosfet and low-side mosfet. The coupling noise caused by high ${dv/dt}$ and ${di/dt}$ in switching transient will increase the switching loss and the risk of mosfet breakdown. In order to completely take advantage of the superior feature of SiC mosfets, a novel multilevel gate driver is proposed in this article to mitigate the coupling noise effectively. Compared to the conventional gate drivers, the proposed gate driver adds a capacitor, an auxiliary mosfet, a Zener diode, and two resistors to regulate the turn-off voltage bias felicitously. In this article, the operation principle of the proposed gate driver is first introduced, to the best of our knowledge. Moreover, to obtain the circuit parameters accurately, a series of formulas have also been derived by equivalent circuit models. A 230-V/4.6-A synchronous buck converter based on SiC mosfets is successfully experimented to verify this proposed gate driver. [ABSTRACT FROM AUTHOR]

In this work, the design and analysis of new Level Shifter with Gate Driver for Li-Ion battery charger is proposed for high speed and low area in 180nm CMOS technology. The new proposed level shifter is used to raise the voltage level and significantly reduces transfer delay 1.3ns (transfer delay of conventional level shifter) to 0.15ns with the same input signal. Also, the level shifter with gate driver achieves a propagation delay of less than 0.25ns and the total area is only 0.05mm². The proposed level shifter with gate driver was designed, simulated and layouted in Cadence using TSMC 180nm CMOS technology. [ABSTRACT FROM AUTHOR]

Silicon carbide (SiC) power electronic devices feature the advantages of fast switching speed, low conduction loss, and reliable operation in high temperature environment, etc. Due to the differences of parasitic parameters and threshold voltage between SiC mosfets and Si mosfets, crosstalk problem is easy to be triggered when SiC mosfets are applied to bridge topologies. In this paper, the crosstalk effect with different parasitic parameters of SiC mosfets is firstly analyzed, and then an improved active crosstalk suppression method for high-speed SiC mosfets is proposed. By using the proposed method, when the crosstalk occurs, the crosstalk voltage will be decreased by reducing the equivalent gate resistance and increasing the equivalent gate-source capacitance in an active way. Consequently, the crosstalk problem can be suppressed without affecting the switching speed. To verify the effectiveness of the proposed method, a prototype of a buck–boost converter is built and the proposed modified gate driver is applied to the half-bridge topology. Comparative experimental study is conducted and the crosstalk voltage is analyzed. The experimental results verify that effective crosstalk suppression is achieved. [ABSTRACT FROM AUTHOR]

The conventional cascode structure for driving depletion-mode (D-mode) gallium nitride (GaN) high electron mobility transistors (HEMTs) raises reliability concerns. This is because of the possibility of the gate to source voltage of the GaN HEMT surging to a negative voltage during the turn off transition. The existing solutions for this problem in the literature produce additional drawbacks such as reducing the switching frequency or introducing many additional components. These drawbacks may outweigh the advantages of using a GaN HEMT over its silicon (Si) alternative. This paper proposes two innovative gate drive circuits for D-mode GaN HEMTs—namely the GaN-switching based cascode GaN HEMT and the modified GaN-switching based cascode GaN HEMT. In these schemes, the Si MOSFET in series with the D-mode GaN HEMT is always turned on during regular operation. The GaN HEMT is then switched on and off by using a charge pump based circuit and a conventional gate driver. Since the GaN HEMT is driven independently, the highly negative gate-to-source voltage surge during turn off is avoided, and in addition, high switching frequency operation is made possible. Only two diodes and one capacitor are used in each of the schemes. The application of the proposed circuits is experimentally demonstrated in a high voltage flyback converter, where more than 96% efficiency is obtained for 60 W output load.

In this article, we described an innovative design technology of active matrix organic light emitting diode (AMOLED) display, to provide a bezel free design. We designed gate driver circuit of amorphous indium‐gallium‐zinc oxide thin‐film transistors (TFTs) not on the bezel area but within the active array. Although we applied challengeable design, no degradation of electrical/optical properties of panel was observed. Because we effectively prevented capacitive coupling and interference between the emission circuit and integrated gate driver circuit in active array, finally, we successfully demonstrated a bezel free designed AMOLED display of 18.3″ HD (1366 × 768) driven by a‐InGaZnO TFTs. [ABSTRACT FROM AUTHOR]

A novel implementation of an isolated gate driver for power switches is proposed in this study. The driver is bespoke designed for SiC power mosfets. The proposal achieves the main driver characteristics—isolation capability, gate switching command, and power transfer to the secondary side by using a unique magnetic transformer. The resulting simple circuitry enables the integration of the driver into the power cell, achieving theoretical higher power density values of the final system. The principle of operation of the driver is described in detail. The original pulsewidth modulation signal is modulated with a pure ac square waveform under a two-level modulation scheme, that guarantees no saturation of the magnetic core. The signal is then magnetically coupled to the secondary side, where it is rectified and reconstructed to effectively drive the target device. In addition, the steps needed to provide a suitable design taking into account the parameters of the target power switch are also detailed. The resulting driver is characterized and a prototype of the driver is built and tested. The main results of the driver performance on a SiC mosfet-based prototype are presented. Based on the analysis of these results, this study experimentally demonstrates the feasibility of the proposal. [ABSTRACT FROM AUTHOR]

Medium-voltage (MV) silicon carbide (SiC) devices have opened up new areas of applications which were previously dominated by silicon-based IGBTs. From the perspective of a power converter design, the development of MV SiC devices eliminates the need for series connected architectures, control of multilevel converter topologies which are necessary for MV applications, and the inherent reliability issues associated with it. However, when SiC devices are used in these applications, they are exposed to a high peak stress (5–10 kV) and a very high $dv/dt$ (10–100 kV/ $\mu$ s). Using these devices calls for a gate driver with a dc–dc isolation stage that has ultralow coupling capacitance in addition to be able to withstand the high isolation voltage. This paper presents a new MV gate driver design to address these issues while maintaining a minimal footprint for the gate driver. An MV isolation transformer is designed with a low interwinding capacitance, while maintaining the clearance, creepage, as well as insulation standards. A dc isolation test has been performed to validate the integrity of the insulating material. The key features include low input common mode current, and a short-circuit protection scheme specifically designed for 10 kV SiC mosfets. The performance of the gate driver is evaluated using double pulse tests and continuous tests. Experimental results validate the advantages of the gate driver and its application for MV SiC devices exhibiting very high $dv/dt$. The proposed gate driver concept is aimed at providing an efficient and reliable method to drive MV SiC devices. [ABSTRACT FROM AUTHOR]

A couple of gate drivers are fabricated with LTPS TFTs in this paper. In order to improve the stabilization of the circuit output, the three TFTs' structure are utilized in the scan circuit and the method of inserting a TFT is adopted in the emission circuit. Moreover, high temperature operation at 85 °C within 240 hours and low temperature operation at −40 °C within 240 hours without failure show the useful stabilization of the proposed circuits. Finally, a 5.5‐in. QHD OLED panel on substrate was successfully demonstrated with the gate driver circuits. [ABSTRACT FROM AUTHOR]

An IGZO TFTs integrated gate driver with an independent bootstrapping structure and an independent control unit is proposed for AMOLED display. The driver can output both programmable multi‐pulse scan signals and normally‐high‐voltage emission control signals. Compared with the traditional bootstrapping node structure with a long rising time of 1.06 µs, and the diode‐connected bootstrapping node structure with a long falling time of 1.60 µs, the proposed driver has a short and symmetric rising and falling time of about 0.64 µs. Cascaded simulation results show that the driver may be applicable to 5.5‐in full HD AMOLED panel. [ABSTRACT FROM AUTHOR]

The a‐IGZO TFTs integrated gate driver being compatible depletion‐mode device is proposed for AMOLEDs. The circuit features a bootstrapping inverter, which is initialized by global signal and controlled by cascading gate‐driving signals. Two sets of clocks with different low voltages are employed. Enhanced stability and reduced power consumption is thus resulted. The circuit can generate ultra‐wide compensation signals for AMOLED displays even with Vth of ‐6 V. [ABSTRACT FROM AUTHOR]

In this article, we described an innovative design technology of organic light emitting diode (OLED) display, to provide a bezel free design. To demonstrate it, we located gate driver circuit of amorphous indium‐gallium‐zinc oxide thin‐film transistors (TFTs) within the active array, and have successfully prevented capacitive coupling and interference between the emission circuit and gate driver circuit. Finally, we have successfully demonstrated bezel free designed OLED display of 18.3″ HD (1366x768, 85ppi) driven by a‐InGaZnO TFTs. [ABSTRACT FROM AUTHOR]

MPRT is one of the most important characteristics to enhance the image quality of the TVs. Despite of the fact that OLED device has fast response time, MPRT characteristics of the OLED display is limited by compensation driving method, frame frequency and resolution of the display panel. We present the high image quality OLED displays with integrated gate driver circuit using MPRT enhancement method for large size premium TVs. Its methods to turn emitting pixels off in advance by giving a black data, and the integrated gate driver designed for normal display, black data insertion, and compensation mode. Moreover, it is possible that adjust of the duty of inserting black data. With these results, we successfully enhanced MPRT characteristics of the 55, 65, and 77 inch UHD OLED panels for high image quality OLED TVs. [ABSTRACT FROM AUTHOR]

This paper presents a 2.5-kW (500 V/5 A) simmer circuit for a xenon flash lamp driver. The simmer circuit is based on an LCC resonant converter to take advantage of minimal arc energy from the current source characteristic. The output under no load condition was analyzed. The converter minimizes filter size with high switching frequency through the use of zero-voltage switching and SiC power devices. A gate driver with variable dead time to assist soft switching was designed. The design criteria of variable dead time implemented through a simple RC circuit are presented. A PSpice simulation was performed to verify the parameter design. The simmer circuit was implemented based on the designed LCC converter. The circuit was tested at a resistive load under rated conditions (500 V/5 A) and open condition (1400 V/0 A). The Xenon flash lamp driver was implemented using the developed simmer circuit and trigger circuit. The prototype was tested to maintain the lamp under various simmering current conditions. The influence of the arc energy on the reliability of the triggering operation was proven by comparing the waveform for filter capacitor values. The experimental results verify that the designed circuit can be effectively used for simmering xenon flash lamps. [ABSTRACT FROM AUTHOR]

With the development of renewable energy, grid-connected inverter technology has become an important research area. When compared with traditional silicon IGBT power devices, the silicon carbide (SiC) MOSFET shows obvious advantages in terms of its high-power density, low power loss and high-efficiency power supply system. It is suggested that this technology is highly suitable for three-phase AC motors, renewable energy vehicles, aerospace and military power supplies, etc. This paper focuses on the SiC MOSFET behaviors that concern the parasitic component influence throughout the whole working process, which is based on a three-phase grid-connected inverter. A high-speed model of power switch devices is built and theoretically analyzed. Then the power loss is determined through experimental validation. [ABSTRACT FROM AUTHOR]

A hydrogenated amorphous silicon (a‐Si:H) thin‐film transistor (TFT) gate driver with multioutputs (eight outputs per stage) for high reliability, 10.7‐inch automotive display has been proposed. The driver circuit is composed of one SR controller, eight driving TFTs (one stage to eight outputs) with bridging TFTs. The SR controller, which starts up the driving TFTs, could also prevent the noise of gate line for nonworking period. The bridging TFT, using width decreasing which connects between the SR controller and the driving TFT, could produce the floating state which is beneficial to couple the gate voltage, improves the driving ability of output, and reaches consistent rising time in high temperature and low temperature environment. Moreover, 8‐phase clocks with 75% overlapping and dual‐side driving scheme are also used in the circuit design to ensure enough charging time and reduce the loading of each gate line. According to lifetime test results, the proposed gate driver of 720 stages pass the extreme temperature range test (90°C and −40°C) for simulation, and operates stably over 800 hours at 90°C for measurement. Besides, this design is successfully demonstrated in a 10.7‐inch full HD (1080 × RGB×1920) TFT‐liquid‐crystal display (LCD) panel. A hydrogenated amorphous silicon (a‐Si:H) thin‐film transistor (TFT) gate driver with multioutputs (eight outputs per stage) for high reliability 10.7‐inch automotive display has been proposed. The proposed gate driver of 720 stages pass the extreme temperature range test (90°C and −40°C) for simulation and operates stably over 800 hours at 90°C for measurement. [ABSTRACT FROM AUTHOR]

This paper presents a fully integrated gate driver in a 180-nm bipolar CMOS DMOS (BCD) technology with 1.5-A max. gate current, suitable for normally OFF gallium nitride (GaN) power switches, including gate-injection transistors (GIT). Full-bridge driver architecture provides a bipolar and three-level gate drive voltage for a robust and efficient GaN switching. The concept of high-voltage energy storing (HVES), which comprises an on-chip resonant LC tank, enables a very area-efficient buffer capacitor integration and superior gate-driving speed. It reduces the component count and the influence of parasitic gate-loop inductance. Theory and calculations confirm the benefits of HVES compared to other capacitor implementation methods. The proposed gate driver delivers a gate charge of up to 11.6 nC, sufficient to drive most types of currently available GaN power transistors. Consequently, HVES enables to utilize the fast switching capabilities of GaN for advanced and compact power electronics. [ABSTRACT FROM AUTHOR]

This letter proposes a high-resolution [200 (RGB) * 600, 282 PPI) flexible active matrix organic light emitting display (AMOLED) integrating a new gate driver, of which the substrate is a polyimide material. Flexible In–Zn–O thin-film transistors (TFTs) with back channel etched structure reveal a good stability at different curvature radii. The integrated gate driver employing bi-side driving method consists of seven TFTs and two capacitors with the advantages of simple topology, low power, full-swing output, and small area. The conventional 2T1C pixel circuit with top emission structure is applied to the proposed flexible AMOLED panel. And the flexible panel has a good full-color display quality without obvious defects at the bending condition. It is shown that the output signals of the proposed gate driver have no distortion and good noise suppressed characteristics even up to 600 stages and maintain stable under a long-time continuous operation up to 15 days. [ABSTRACT FROM AUTHOR]