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Hot-water liquid cooling is a key technology in future green supercomputers as it maximizes the cooling efficiency and energy reuse. However the cooling system still is responsible for a significant percentage of modern HPC power consumption. Standard design of liquid-cooling control relies on rules based on worst-case scenarios, or on CFD simulation of portion of the entire system, which cannot account for all the real supercomputer working conditions (workload and ambient temperature). In this work we first introduce an analytical model, based on lumped parameters, which can effectively describe the cooling components and dynamics, and can be used for analysis and control purposes. We then use it to design an energy-optimal control strategy which is capable to minimize the pump and chiller power consumption while, meeting the supercomputer cooling requirements. We validate the method with simulation tests, taking data from a real HPC cooling mechanism, and comparing the results with state-of-the-art commercial cooling system control strategies.

This paper presents the design, implementation and characterization of an energy–efficient smart power unit for a wireless sensor network with a versatile nano-Watt wake up radio receiver. A novel Smart Power Unit has been developed featuring multi-source energy harvesting, multi-storage adaptive recharging, electrochemical fuel cell integration, radio wake-up capability and embedded intelligence. An ultra low power on board microcontroller performs maximum power point tracking (MPPT) and optimized charging of supercapacitor or Li-Ion battery at the maximum efficiency. The power unit can communicate with the supplied node via serial interface (I2C or SPI) to provide status of resources or dynamically adapt its operational parameters. The architecture is very flexible: it can host different types of harvesters (solar, wind, vibration, etc.). Also, it can be configured and controlled by using the wake-up radio to enable the design of very efficient power management techniques on the power unit or on the supplied node. Experimental results on the developed prototype demonstrate ultra-low power consumption of the power unit using the wake-up radio. In addition, the power transfer efficiency of the multi-harvester and fuel cell matches the state-of-the-art for Wireless Sensor Networks.

Barrier synchronization is a key programming primitive for shared memory embedded MPSoCs. As the core count increases, software implementations cannot provide the needed performance and scalability, thus making hardware acceleration critical. In this paper we describe an interconnect extension implemented with standard cells and with a mainstream industrial toolflow. We show that the area overhead is marginal with respect to the performance improvements of the resulting hardware-accelerated barriers.We integrate our HW barrier into the OpenMP programming model and discuss synchronization efficiency compared with traditional software implementations.

In this paper we present algorithms for the synthesis of encoding and decoding interface logic that minimizes the average number of transitions on heavily-loaded global bus lines at no cost in communication throughput (i.e., one word is transmitted at each cycle). The distinguishing feature of our approach is that it does not rely on designer's intuition, but it automatically constructs low-transition activity codes and hardware implementation of encoders and decoders, given information on word-level statistics. We propose an accurate method that is applicable to low-width buses, as well as approximate methods that scale well with bus width. Furthermore, we introduce an adaptive architecture that automatically adjusts encoding to reduce transition activity on buses whose word-level statistics are not known a priori. Experimental results demonstrate that our approaches out-perform specialized low-power encoding schemes presented in the past.

This paper introduces SIMinG-1k—a manycore simulator infrastructure. SIMinG-1k is a graphics processing unit accelerated, parallel simulator for design-space exploration of large-scale manycore systems. It features an optimal trade-off between modeling accuracy and simulation speed. Its main objectives are high performance, flexibility, and ability to simulate thousands of cores. SIMinG-1k can model different architectures (currently, we support ARM (Available from: http://infocenter.arm.com/help/index.jsp?topic=/com. arm.doc.ddi0100i/index.html) and Intel x86) using two-step approac where architecture specific front end is decoupled from a fast and parallel manycore virtual machine running on graphical processing unit platform. We evaluate the simulator for target architecture with up to 4096 cores. Our results demonstrate very high scalability and almost linear speedup with simulation of increasing number of cores.

The aim of this work is to develop a miniaturized, self-contained and ultra-low power SHM system for impact detection and localization in composite panels. The system is based on a sparse array of piezoelectric (PZT) transducers along with the dedicated sensor node. Methodologically, when the stress guided waves generated by an impact cross a certain mV threshold at one PZT, signals are acquired by all sensors. Next, a dedicated signal processing that combines filtering and dispersion compensation algorithms estimates the wave time difference of arrival among the different sensors. The processing framework, embedded within the sensor node, is optimized for speed and power consumption. Finally, data are wirelessly transferred to a remote station, for further structural monitoring actions. The wireless communication technology allows long distance data transmission without wiring, simplifying the deployment of large multi-device SHM monitoring systems such as those based on mesh-type or star-type networks, whereas each node in the network is able to communicate with the central gateway. The system performances in terms impact localization accuracy and power consumption are tested on a composite Zstiffened panel of 1000x1000x3 mm.

Our work focuses on allocating and scheduling a synchronous data-flow (SDF) graph onto a multi-core platform subject to a minimum throughput requirement. This problem has traditionally be tackled by incomplete approaches based on problem decomposition and local search, which could not guarantee optimality. Exact algorithms used to be considered reasonable only for small problem instances. We propose a complete algorithm based on Constraint Programming which solves the allocation and scheduling problem as a whole. We introduce a number of search acceleration techniques that significantly reduce run-time by aggressively pruning the search space without compromising optimality. The solver has been tested on a number of non-trivial instances and demonstrated promising run-times on SDFGs of practical size and one order of magnitude speed-up w.r.t. the fastest known complete approach.

Open source software adoption in the embedded systems domain is gaining growing interest within the european industrial and academic communities due to the significant benefits it brings in terms of flexibility and cost reduction.Nonetheless, scepticism about open source as a viable option to support critical business functions still holds, since its decentralized and distributed development model makes quality evaluation and assessment hard to achieve. This paper reports the SHARE project experience, aimed at facilitating and promoting the use of open source software in the embedded systems industry. Performed activities, proposed methodology and achieved results are presented, along with lessons learned to exploit for enabling further initiatives in the next future.

—With the trend toward high-quality large form factor displays on high-end handhelds, LCD backlight accounts for a significant and increasing percentage of the total energy budget. Substantial energy savings can be achieved by dynamically adapting backlight intensity levels while compensating for the ensuing visual quality degradation with image pixel transformations. Several compensation techniques have been recently developed to this purpose, but none of them has been fully characterized in terms of quality losses considering jointly the non-idealities present in a real embedded video chain and the peculiar characteristics of the human visual system (HVS). We have developed a quality analysis framework based on an accurate embedded visualization system model and HVS-aware metrics. We use it to assess the visual quality performance of existing dynamic backlight scaling (DBS) solutions. Experimental results show that none of the DBS techniques available today is fully capable of keeping quality loss under control, and that there is significant room for improvement in this direction.

In highly power constrained sensor networks, harvesting energy from the environment makes prolonged or even perpetual execution feasible. In such energy harvesting systems, energy sources are characterized as being regenerative. Regenerative energy sources fundamentally change the problem of power scheduling for embedded devices. Instead of the problem being one of maximizing the lifetime of the system given a total amount of energy, as in traditional battery powered devices, the problem becomes one of preventing energy depletion at any given time. Coupling relatively computationally intensive applications, such as video processing applications, with the constrained FPGAs that are feasible on power constrained embedded systems, makes dynamic reconfiguration essential. It provides the speed comparable to a hardware implementation, but it also allows the dynamic reconfiguration to meet the multiple application needs of the system. Different applications can be loaded on the FPGA, as the system's needs change over time. The problem becomes how to schedule the dynamic reconfiguration to appropriately make use of the regenerative energy source, to ensure the proper availability of energy for the system over time. In this paper, we present a methodology for carrying out dynamic reconfiguration for regenerative energy sources, based on statistical analysis of tasks and supply energy. The approach is evaluated through extensive simulations. Additionally, we have evaluated our implementation on our regenerative energy, dynamically reconfigurable prototype, known as the MicrelEye. Our approach is shown to miss 57.7% less deadlines on average than the current approach for reconfiguration with regenerative energy sources.

Wireless Body Area Sensor Networks (WBASN) are an emerging technology enabling the design of natural Human Computer Interfaces (HCI). Automatic recognition of human motion, gestures, and activities is studied in several contexts. For example, mobile computing technology is being considered as a replacement of traditional input systems. Moreover, body posture and activity monitoring can be used for entertainment and health-care applications. However, until now, little work has been done to develop flexible and efficient WBASN solutions suitable for a wide range of applications. Their requirements pose new challenges for sensor network designs, such as optimizing traditional solutions for use as environmental monitoring-like applications and developing on-the-field stress tests. In this paper, we demonstrate the flexibility of a custom-designed WBASN called WiMoCA with respect to a wide range of posture and activity recognition applications by means of practical implementation and on-the-field testing. pproach taken in the design of WiMoCA provides the necessary effectiveness. Software support, communication protocols and hardware architecture have been designed to match requirements of WBASN applications. Nodes of the network mounted on different parts of the human body exploit tri-axial accelerometers to detect its movements. The advanced digital Micro-electro-mechanical system (MEMS) based inertial sensor has been chosen for WiMoCA because it demonstrated high flexibility of use in many different situations, providing the chance to exploit both static and dynamic acceleration components for different purposes. Furhermore, the sensibility and accuracy of the sensing element is perfectly adequate for monitoring human movement, while keeping cost low and size compact, thus meeting our requirements. We implemented three types of applications, stressing the WBASN in many aspects. In fact, they are characterized by different requirements in terms of accuracy, timeliness, and computation distributed on sensing nodes. For each application, we describe its implementation, and we discuss results about performance and power consumption.

In this chapterwe described the main principles in designing the networking and transport layers of NoCs. These layers include the specification of the following NoC characteristics: switching technique, topology, addressing and routing, and end-to-end congestion and flow control schemes. We presented this complex problem as a constrained optimization process. The NoC designer should minimize the cost of the NoC which is expressed in terms of VLSI area and power consumption added to his overall chip design. The constraints are the level of services (service classes) to be provided for the traffic patterns of the SoC under consideration. Since NoCs can be designed anew for each SoC implementation, this optimization process is expected to be repeated for each new SoC design, using NoC CAD tools. Following this definition, it is clear that the SoC traffic characteristics strongly impact the NoC characteristics. We therefore classified SoCs according to how much is known in advance about their functionality, and consequently about their expected module-to-module communication patterns (Fig. 5.1). We reviewed topical state-of-the-art solutions for each of the important NoC characteristics: switching mechanisms, OoS implementations, topological design, routing mechanisms, congestion and flow control techniques. We showed how the NoC model impacts the choices available, for each of these, as weIl as the relationships and trade-offs between them.