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Application-specific integrated circuit (ASIC) signal processors are necessary to achieve the high performance and low power requirements of modern applications, but long development times are one hurdle contributing to their declining adoption. A significant percentage of their development time goes into the design and verification of the architecture, with the remainder consumed by back-end ASIC flow work and chip testing. Agile hardware principles, borrowed from a similar successful software approach and previously applied to general-purpose processors, offer a promising solution to continuing the development of signal processing systems on a chip (SoCs).This work presents a digital signal processing SoC design framework that, when coupled with agile design principles, supports rapid prototyping and designing of ASICs for signal processing applications. First, applications and existing ASIC solutions are explored and analyzed in Chapter 2 to glean useful properties and trends. From this, Chapter 3 proposes a model for a generic signal processing SoC is developed. Next, a new Chisel generator design framework is presented in Chapter 4. Chisel is a hardware construction language written as a DSL in Scala, allowing for high-level and functional programming use when designing hardware. This framework couples a general-purpose processor with a signal processing accelerator, and much of the library code for connectivity, memory mapping, and programming is made available. This framework, when coupled with an agile design process, supports rapid development of ASICs. The accelerator performs streaming signal processing to offload high-throughput computational kernels from the CPU. As processing elements for the desired application are produced, processing moves from the CPU to the accelerator. Low-rate processing tasks are computed on the CPU, meaning tape-out occurs on time and produces a working chip able to perform the entire application.The methodology and proposed agile design process were validated on two separate chips in Chapters 5 and 6, spanning two applications and two process nodes. The ASIC spectrometer (Splash2), for which the RTL was designed in eight weeks by one person, demonstrates the power of Chisel to rapidly construct processing element generators. These generators were then improved and the parameters adjusted as physical design and timeline constraints imposed new restrictions. The radar receive processor design fleshed out the generator framework details. A significantly larger design, this chip required about 300 engineering-weeks of work over 9 months, equivalent to a team of 8 engineers working full time. About 30% of that time was spent designing the framework and reusable processing elements. This represents a 56% reduction in development time compared to the estimated 14.4 months from standard practices (excluding time for framework design, fabrication, and testing). Both efforts produced working chips competitive against state-of-the-art custom ASICs in terms of performance, power, and capabilities.

Background: The Gene Regulatory Network (GRN) is a model for studying the function and behavior of genes by treating the genome as a whole, which can reveal the gene expression mechanism. However, due to the dynamics, nonlinearity, and complexity of gene expression data, it is a challenging task to construct a GRN precisely. And in the circulating cooling water system, the Slime-Forming Bacteria (SFB) is one of the bacteria that helps to form dirt. In order to explore the microbial fouling mechanism of SFB, constructing a GRN for the fouling-forming genes of SFB is significant. Objective: Propose an effective GRN construction method and construct a GRN for the foulingforming genes of SFB. Methods: In this paper, a combination method of Long Short-Term Memory Network (LSTM) and Mean Impact Value (MIV) was applied for GRN reconstruction. Firstly, LSTM was employed to establish a gene expression prediction model. To improve the performance of LSTM, a Particle Swarm Optimization (PSO) was introduced to optimize the weight and learning rate. Then, the MIV was used to infer the regulation among genes. In view of the fouling-forming problem of SFB, we have designed electromagnetic field experiments and transcriptome sequencing experiments to locate the fouling-forming genes and obtain gene expression data. Results: In order to test the proposed approach, the proposed method was applied to three datasets: a simulated dataset and two real biology datasets. By comparing with other methods, the experimental results indicate that the proposed method has higher modeling accuracy and it can be used to effectively construct a GRN. And at last, a GRN for fouling-forming genes of SFB was constructed using the proposed approach. Conclusion: The experiments indicated that the proposed approach can reconstruct a GRN precisely, and compared with other approaches, the proposed approach performs better in extracting the regulations among genes.