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Due to the emerging high-speed digital infrastructure, the protection of data being shared throughout the open networks has been a challenging task. By large, the dependency on cryptographic primitives exists to encounter cyberspace challenges. Key generation is a core process of any cryptographic application which improvises the strength of the algorithm. Reconfigurable hardware-assisted true random number generators (TRNGs) play a crucial role in key generation to provide high-speed cryptographic solutions. In this work, metastability-influenced TRNG architecture on Altera Cyclone II EP2C20F484C7 FPGA has been proposed. The 256 units of SR latches with de-synchronisation technique were the prime source used to harvest the true randomness. TRNG design consumed 1851 logic elements with a dynamic power dissipation of 4.41 mW. Proposed architecture achieves a high throughput of 26.64065 Mbps using 27 MHz onboard sampling clock. This TRNG has been validated through entropy, correlation, NIST SP 800-22 batteries of test, linear complexity test, restart experiment and hamming distance analysis.

Microprocessors are regarded as the “heart” of an operating system. Arithmetic and Logical Unit (ALU) plays a crucial role in microprocessors, taking care of all critical tasks. Thus, considering the varied applications of the microprocessor, the security of the data and the operations performed by the microprocessor is critical. Field Programmable Gate Array (FPGA) stands in its outstanding capability due to its field re-programmability unlike the semi-custom and full-custom designs. It has also has the capabilities of parallel processing, and its ability to process data high speeds due to its high clocking frequencies. Thus, FPGA can be a fruitful prototyping agent for Microprocessors. In this work, a lightweight pipelined computational unit (ALU), an important part of the microprocessor, has been realised on Intel Cyclone V FPGA using Verilog HDL. The lightweight computational unit also includes an optional lightweight S-Box that can provide adequate non-linearity and security to the data. Also, a custom testbench has been designed for functional verification. The optimised design occupies 515 logic elements and dissipates 199.75 mW of power when including the memory. Further, it takes four clocks as an accumulation period to initialise the pipeline and produces the computational results for every subsequent instruction at the same clock instant.

The emerging growth in communication arena firmly demands a secure channel and needless to mention that security and privacy of the user are the top priorities in audio communication. To transmit audio signals safely, cryptography is being adopted widely. Chaos-based cryptography is one of the effective strategies that attract researchers to develop more techniques. Characteristics of chaotic systems such as ergodicity and stochasticity are the main motivators for using them in encryption schemes. This work presents an field programmable gate array (FPGA) governed chaotic audio encryption scheme based on Lorenz attractor. This scheme of encryption undergoes two consecutive steps of operations, namely confusion by linear feedback shift register (LFSR) and diffusion through the random numbers generated in X, Y, and Z planes of the chaotic attractor. A study has also been carried out to analyze the best diffusion from the obtained results. Evaluation of the proposed scheme includes entropy, correlation, histogram, PSNR, and MSE. Further, NIST SP 800-22 batteries of test have been performed to ensure that the encrypted audio data possesses more randomness. Moreover, this work consumed 15,422 logic elements and 14.22 mW of dynamic power to accomplish the design. Noticeably, the proposed work has achieved 10.346 Mbps as a throughput to encrypt 216 × 16 bit samples of audio data.

In recent years, encryption of medical images has been given much importance and several cryptographic algorithms and principles have been made and designed for secure communication. One such approach has been proposed in this work using pixel scrambling and diffusion techniques governed through linear feedback shift register (LFSR) and modified logistic map (MLM). The main advantage of this work is its concurrent encryption through which the scrambling and diffusion have been performed on the fly without any additional delays. The proposed design has been implemented on Intel Cyclone IV E FPGA using Quartus II Electronic Design Automation (EDA) tool. Further, the functional verification of LFSR and MLM has been carried out through ModelSim simulation. The design occupies 3580 logic elements and 135 logic registers to encrypt 256 × 256 × 16 bits of DICOM image at 216 mS when it was operated with 50 MHz frequency. Also, this work achieves near-zero correlation, and the statistical properties of the encryption have been tested through standard metrics.

In the modern age, where the digital communication systems play a vital part in our day-to-day activities the amount of digital data generated has increased exponentially. Limited security and bandwidth are the major constraints that have to be faced. One of the most excessively used multimedia data are images. A lot of studies indicate that the confidentiality and authenticity of the data are vulnerable from attacks no matter the level or method proposed to secure the data. In this paper, an algorithm is proposed to encrypt color image where Lorenz attractor is used to generate keys that are used in the process of image encryption. The proposed solution is focused of reducing the computational complexity by reducing the encryption process to most significant nibble plane of the image.

The healthcare industry has been facing a lot of challenges in securing electronic health records (EHR). Medical images have found a noteworthy position for diagnosis leading to therapeutic requirements. Millions of medical images of various modalities are generally safeguarded through software-based encryption. DICOM format is a widely used medical image type. In this chapter, DICOM image encryption implemented on cyclone FPGA and ARM microcontroller platforms is discussed. The methodology includes logistic map, DNA coding, and LFSR towards a balanced confusion – diffusion processes for encrypting 8-bit depth 256 × 256 resolution of DICOM images. For FPGA realization of this algorithm, the concurrency feature has been utilized by simultaneous processing of 128 × 128 pixel blocks which yielded a throughput of 79.4375 Mbps. Noticeably, the ARM controller which replicated this approach through sequential embedded “C” code took 1248 bytes in flash code memory and Cyclone IV FPGA consumed 21,870 logic elements for implementing the proposed encryption scheme with 50 MHz operating clock.

Image sharing has been quite common in recent days. With advancements in image sharing technology, the vulnerabilities of a cyber attack on these have also increased. Thus an effective method for encrypting these images is required. This paper proposes an Image Encryption algorithm for a color image using the Logistic Map. The correlation between the adjacent pixels is the major concern in image encryption. In this algorithm, the encryption is done using both confusion and diffusion. Statistical analysis and qualitative analysis are used for showing the feasibility and effectiveness of the algorithm.

The increase of cyberattacks in the field of information security leads to high attention in the digitalized environment. There is a demand for well-organised methods to transmit data securely over the Internet. In the proposed algorithm, a greyscale image is secured by an encryption technique by two stages, i.e. confusion and diffusion. Digital images can be expressed in terms of numeric values called pixels. The images are converted by the integer wavelet transform-domain technique, where the images are separated by approximation and detailed sub-bands. The proposed encryption algorithm is implemented for the approximated sub-bands which contain significant information of the digital image. 1D logistic and 2D tent maps generate chaotic random keys. By various statistical and differential analyses, the robustness of the proposed algorithm is examined by achieving a maximum entropy of 7.997, near-zero correlation and larger keyspace of 1080. With the results, it has confirmed that the enhanced chaos-based Integer Wavelet Transform (IWT) encryption has succeeded to resist any cyberattacks.

Recently, diverse types of chaotic image encryption algorithms have been explored to meet the high demands in realizing secured real time image sharing applications. In this context, to achieve high sensitivity and superior key space, a multiple chaotic map based image encryption algorithm has been proposed. The proposed algorithm employs three-stage permutation and diffusion to withstand several attacks and the same is modelled in reconfigurable platform namely Field Programmable Gate Array (FPGA). The comprehensive analysis is done with various parameters to exhibit the robustness of the proposed algorithm and its ability to withstand brute-force, differential and statistical attacks. The synthesized result demonstrates that the reconfigurable hardware architecture takes approximately 0.098 ms for encrypting an image of size 256 × 256. Further the resource utilization and timing analyzer results are reported.

This work presents permutation and diffusion based hybrid image crypto system in transform domain using combined chaotic maps and Haar Integer Wavelet Transform (HIWT). HIWT is used to transform the plain image and four sub-bands of the image coefficients are encrypted by combined chaotic maps. The combination of two one-dimensional chaotic maps results in better chaotic behavior and generates unpredictable large random sequence that can be used for the encryption of the image. To manage the trade-offs between security, speed and power consumption, the proposed encryption algorithm is modeled in Cyclone II Field Programmable Gate Array (FPGA). The proposed design occupies only 4025 logical elements and takes 0.28 ms for encrypting an image of size 256 × 256. Robustness of the algorithm is estimated using quality metrics including statistical and differential attack analysis. The proposed scheme is resistant to most of the known attacks and is more secure than other image encryption schemes.

Data in today’s world is ubiquitous and often regarded more valuable than the paper currency itself. More often than not, sensitive data needs to be transmitted from a sender to a receiver in an encrypted format. This paper proposes a novel secret message transmission method through image encryption. The proposed system highlights four techniques; Bit Plane Splicing (BPS), Arnold Transform, a combination of logistic and tent maps. The original text is obtained after decryption, reinforcing its efficiency, security and reliability of this scheme. The security of this scheme has been rigorously analysed through image metrics like Correlation, Entropy, NPCR and UACI, histogram deviation and are tabulated for reference. The results show good security performance against threats. Chosen plaintext attack has been carried out, on two sets of different plain texts, and the results obtained have been favourable.

True random number generator (TRNG) is a crucial part of any modern cryptographic primitives. Designing high entropy TRNG is still a challenging task to compete. Usually, TRNGs use physical mean as random source to generate random numbers which are unpredictable. TRNG has different application but not limited to symmetric key cryptography, random simulation, nonce, user authentication protocols, and gaming. In this work, ring oscillator (RO)-based pyramid entropy source is proposed for generating device-independent true random numbers. The de-synchronization technique has been utilized for extracting the randomness from entropy source wherein linear-feedback shift register (LFSR) is used as post-processor to improve the statistical characteristics of proposed TRNG. The design of TRNG has been implemented on Altera Cyclone II EP2C20F484C6 FPGA which consumed 892 logic elements (5%), 67.75 mW power to generate 131,072 true random bits. It yields maximum entropy of 0.999987 through entropy analysis. Statistical properties of the proposed TRNG have been evaluated using NIST tests. Restart experiment is also conducted to evidence the true randomness of the proposed TRNG.

Chaotic attractors are used in variety of applications especially in image encryption due to their sensitivity, confusion and diffusion properties. Such attractors are continuous form of chaos which can be described using differential equations. In this work, an image encryption technique employing Chen attractor and FPGA generated synthetic image has been discussed. Altera Cyclone II FPGA was used to generate synthetic image that consumed 438 logic elements and 34.03 mW of power consumption. The simulation was carried out on LabVIEW platform. The performance of the algorithm was evaluated through statistical (Entropy, Histogram, Correlation) and differential analyses (NPCR and UACI) for grayscale images of various sizes 128 × 128, 256 × 256 and 512 × 512 which yielded good figures.

Nowadays, digital image communication through internet has become essential in public network as images can give a clear vision than describing something through text. Data such as medical images, military images, etc. which are highly prone to intruders are mandatory to be maintained confidential to transmit and receive data safely without being intruded by unauthorised persons. This technique can be provided by encrypting these digital images through cryptographic techniques. The proposed image encryption is performed in the transform domain, where Integer Wavelet Transform is adopted to separate the image into approximation coefficients and detailed coefficients. In IWT, most of the significant pixels are in the low-frequency band where confusion and diffusion is performed with chaotic logistic keys. The experimental results achieved entropy of 7.97 and near-zero correlation to verify it is able to resist any statistical attacks.

Image watermarking plays an important role in the field of medical image security and also provides a safe pathway for transfer of medical information through public networks such as internet. In this work, variable pixel and variable bit -medical image watermarking scheme has been proposed to protect the Electronic Patient Record (EPR). The proposed algorithm uses a Linear Feedback Shift Registers (LFSR) to generate pseudo random sequences for randomly selecting the image pixels of 16 bit Digital Imaging and Communications in Medicine (DICOM) image and modified logistic map has been utilized for selecting the bits to achieve adaptive Least Significant Bit (LSB) embedding. Integer Wavelet Transform (IWT) has been applied on original image to decompose it to its sub – bands where EPR has been embedded. The algorithm comprises four phases namely, pixel separation, random pixel selection, variable bit selection and LSB embedding. Proposed watermarking scheme has been achieved a near zero Mean Square Error (MSE) and histogram analysis confirms the imperceptibility of the algorithm. The algorithm requires only 0.235542 S to perform LSB embedding on 512 × 512 DICOM images. Peak Signal to Noise Ratio (PSNR), Normalized Cross Correlation (NCC) and Structural Similarity Index (SSIM) analyses also have been performed to evaluate the efficiency of the watermarking scheme.

Nano industries have been successful trendsetters for the past 30 years, in escalating the speed and dropping the power necessities of nanoelectronic devices. According to Moore's law and the assessment created by the international technology roadmap for semiconductors, beyond 2020, there will be considerable restrictions in manufacturing IC's based on CMOS technologies. As a result, the next prototype to get over these effects is quantum-dot cellular automata (QCA). In this chapter, an efficient quantum cellular automata (QCA) based random number generator (RNG) is proposed. QCA is an innovative technology in the nano regime which guarantees large device density, less power dissipation, and minimal size as compared to the various CMOS technologies. With the aim to maximise the randomness in the proposed nano communication, a linear feedback shift register (LFSR) keyed multiplexer with ring oscillators is developed. The developed RNG is simulated using a quantum cellular automata (QCA) simulator tool.

These days, a countless number of digital images are made in many fields, such as military, medicine, education, and personal affairs. As digital images usually contain secret or private data, image encryption has grown into a hot issue in theoretical study and in its practical presentation. In this paper an image encryption algorithm based on Logistic map will be used. Contrasting most of the existing image encryption algorithms, the proposed algorithm gives the original image as an integer pixel, and uses Logistic map for confusion and Galois field LFSR for diffusion. The consumption of logistic map and Galois field LFSR makes the proposed algorithm achieves not only a desirable level of security, but also high effectiveness, so the algorithm is suitable for practical application. Apart from this, the algorithm accepts a "confusion-diffusion-confusion" structure to yield good confusion and diffusion things which are the goods of the operation of a secure cipher. Simulation results and security analysis advice that the proposed algorithm has many desirable things of a perfect cryptosystem, thus it is very suitable for practical applications. The security analyses performed are Histogram analysis, Correlation analysis, Entropy analysis, Encryption Quality analysis, Differential analysis, Error metric analysis.

In this paper, Reversible data hiding using difference statistics technique incorporating QR codes was proposed. Here, Quick Response (QR) codes were employed as an additional feature and were hidden in the corners of the original image to direct to the hyperlink after authentication and then embedding the secret data bits was carried out. At the receiver side, when the QR codes were scanned by the user, the link to the webpage was accessed, and then the original image and the secret data bits were recovered by using the proposed reversible data hiding scheme. In the proposed scheme, the pixels of the cover image were scanned in row-major order fashion, and the differences between the adjacent pixels were computed, keeping the first pixel unaltered to maintain the size of the host and the difference image same. Now, the histogram was shifted towards the right or left to reduce the redundancy and then to embed the secret data bits were done. Due to the similarity exists between the pixel values, the difference between the host and the secret image reconstructs the marked image. The proposed scheme was carried out using MATLAB 2013. PSNR (Peak Signal to Noise Ratio) and payload have been computed for various test images to validate the proposed scheme and found to be better than the available literature.

Our country is facing vast challenges in the environment due to waste generation some of them were: inadequate waste collection, transport, treatment, and disposal. One of the important challenges is from its inception till its disposal. Our country can’t cope with the current systems by an increasing urban population with the volumes of waste, and this result on the public and environmental health pollution. Unhygienic conditions are created due to the flooding of the dustbins each day. This paper is for the commenting of the challenges, barriers, and opportunities for the betterment of collection, and segregation in the field of waste management. When it senses the nearby trash the dustbin that function automatically, and it is built through a prototype. Dustbins are placed all over the city, and delivered with low cost embedded method to help in tracking of the garbage bins. The Blynk app indicates through SMS as soon as dustbin has reached its maximum level, to the unwanted management department. An immediate action would be taken by the alarmed authorities once the position of the bin is sent via the Internet. The proposed system is developed by using ultrasonic sensors, nodemcu, servo motor, Blynk app

In the present scenario, accidents are due to speeding, reckless driving, dogging etc. Many fatal car accidents have occurred due to the speeding of other vehicles. This paper focuses on preventing car collision using Intelligent Braking. The vehicle state information is being equipped with sensors to envisage the possibility of the accident and accordingly reduces the vehicle speed. This methodology reduces the speed of motors and vehicle when the distance is reduced than the safety limit, and these modules are interfaced through a microcontroller. This is in line with present technology in manufacturing smart cars and the desires of individuals who continuously needs to have a contented and secure ride in their vehicles. Moreover, this type of cars can be suitable and are much better into the intelligent highway.

Data security remains to be one of the most discussed issues in the modern, fast-paced technological ecosystem. This paves way to a lot of endangerment to the transfer of data over various channels, which can be considered reliable and confidential. Classified information cannot be compromised by transmitting it through common channels as they are prone to attack by certain groups, which might to lead to catastrophic circumstances. The most commonly transmitted type of data is in the form of images and classified images have to be transmitted in such a way that it is highly imperceptible. This paper discusses about an encryption algorithm which follows an unconventional method of encryption, followed by diffusion by Ex-OR addition. The confusion is carried out among different planes of the image and can be termed as inter-planar confusion. There are two different ways in which inter-planar confusion can be done and that depends on a chaotic tent map random number generator. The viability and the overall performance of the proposed algorithm is marked as a trade-off between various combinational metrics and good results shows the imperceptibility of the encrypted image

Technology has revolutionized the field of medicine with the IOT automating the various features of healthcare. The objective here is to create a wireless system which enables real-time healthcare monitoring of patients with primary focus on Intra Venous (IV) fluid flow control and regulation. The system also records the pulse rate and constantly monitors the body temperature of the patient. In conventional methods, doctors or nurses need to be present physically to monitor a patient’s condition and also to stop the IV infusion to prevent the backflow of blood into the IV tubing. The current method intends to automatically stop the IV infusion once it is completed and notify the doctor and nurse about the same via an app which would also contain the patient’s primary details. This will reduce the need for constant human intervention for these purposes and hence, would avoid the risk of emergencies. In this project, a cyber-physical system architecture based on ontology will be designed and developed. Also, it will be capable of automatically monitoring the health conditions of the patient with lesser manpower in a secured manner.

Garbage disposal has become a vast cause for concern in the world these days. Waste that is generated is disposed of by means which hurt the environment is a very big amount. Industrial and domestic waste are major sources of waste. Since people are not concentrating on the segregation waste into their basic streams is the cause for the unrecognition of the industrial waste, so the work is mainly concentrating on industrial waste. So, it is easy to use a solution for a segregation system through the smart dustbin which is also very cheap, at small and medium companies or industries which are sent directly for processing. The metallic and non-metallic waste is sorted through the design. The use of the microcontroller controls the circuit.

This paper aims to provide the most efficient and automatic Power Management System with no human intervention in hotels and lodges. A passive infrared (PIR) sensor is used to detect the presence of people in the room by receiving the infrared (IR) rays emitted from the human body. The PIR sensor is connected to the microcontroller to which the relay is also connected. When the presence/motion of people has detected the relay triggers and power supply to the room is switched ‘on’. And when any motion has not been detected for 5 minutes or more the main power supply to the room is switched ‘off’. This can prevent unwanted usage of power in hotels /lodges when no one is in the room. The hotel management can also remotely monitor the availability of people in the room by monitoring the output of the Sensors through IoT.

This paper presents a true random key generation using Physically Unclonable Function (PUF). PUFs are considered as "physical fingerprint" of anys Integrated Circuit (IC) through which they can be differentiated from others. They offer a plenty of applications namely Hardware authentication, Identification, Anti – counterfeiting to safeguard the hardware as well as the sensitive data being processed or stored in the hardware. A deeper insight is required into the design and implementation of hardware efficient FPGA based PUF with a focus on low area overhead. In this work, PUF architecture for key generation on Intel Cyclone II FPGA using Verilog HDL and Quartus II 13.0 Electronic Design Automation (EDA) tool has been proposed. SR latch based metastability is the main concern of PUF generation. Metastability on SR latch act as entropy source to generate true randomness. This design requires only four SR latches to produce adequate true randomness. Further, true randomness is extracted through harvesting mechanism where Meta beat counting and De - synchronization techniques have been investigated with respect to equidistribution property. Post processing unit has been incorporated to enhance the statistical properties of PUF. This design consumes 881 logic elements and dissipates 4.41 mW of power for implementing the PUF architecture on Cyclone II EP2C3F484C7 FPGA. Entropy, restart experiment and NIST SP 800 – 22 tests have been performed to evidence the true randomness.