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This paper proposes a spintronic neuron structure composed of a heterostructure of magnets and a piezoelectric with a magnetic tunnel junction (MTJ). The operation of the device is simulated using SPICE models. Simulation results illustrate that the energy dissipation of the proposed neuron compared to that of other spintronic neurons exhibits 70% improvement. Compared to CMOS neurons, the proposed neuron occupies a smaller footprint area and operates using less energy. Owing to its versatility and low-energy operation, the proposed neuron is a promising candidate to be adopted in artificial neural network (ANN) systems., Comment: Submitted to: ACM Southeast '18

In this letter, the transient behavior of a ferroelectric (FE) metal-oxide-semiconductor (MOS) capacitor is theoretically investigated with a series resistor. It is shown that compared to a conventional high-k dielectric MOS capacitor, a significant inversion charge-boost can be achieved by a FE MOS capacitor due to a steep transient subthreshold swing (SS) driven by the free charge-polarization mismatch. It is also shown that the observation of steep transient SS significantly depends on the viscosity coefficient under Landau's mean field theory, in general representing the average FE time response associated with domain nucleation and propagation. Therefore, this letter not only establishes a theoretical framework that describes the physical origin behind the inversion charge-boost in a FE MOS capacitor, but also shows that the key feature of depolarization effect on a FE MOS capacitor should be the inversion-charge boost, rather than the steep SS (e.g., sub-60mV/dec at room temperature), which cannot be experimentally observed as the measurement time is much longer than the FE response. Finally, we outlines the required material targets for the FE response in field-effect transistors to be applicable for next-generation high-speed and low-power digital switches., Comment: 6 figures, 5 pages, submitted to IEEE JxCDC

Magnetic skyrmions have been the focus of intense research with promising applications in memory, logic and interconnect technology. Several schemes have been recently proposed and demonstrated to nucleate skyrmions. However, they either result in an uncontrolled skyrmion bubble production or are mostly targeted towards integration with racetrack memory device. In this work, we propose a novel scheme for a controlled single skyrmion nucleation in a confined nanowire geometry with sub-100 nm width using a generalized approach of "localized spin current injection" technique in material systems exhibiting low Dzyaloshinskii-Moriya interaction (DMI). Our proposed nucleation mechanism follows a pathway involving the creation of a reversed magnetic domain containing one or more pairs of vertical Bloch lines (VBLs) that form an edge-to-edge domain wall as the VBLs get annihilated at the edge of the nanowire. However, pinning of the edge domain walls within a narrow gap using notches or anti-notches results in the creation of a magnetic bubble with defect-free domain wall that eventually relaxes into a circular skyrmion structure. Our simulations predict that the proposed mechanism allows skyrmion nucleation on sub-nanosecond timescale, shows robustness to variations like local pinning sites and is applicable for any skyrmion-based logic, memory and interconnect application.

Demonstration of ultra-low energy switching mechanisms is an imperative for continued improvements in computing devices. Ferroelectric (FE) and multiferroic (MF) orders and their manipulation promises an ideal combination of state variables to reach atto-Joule range for logic and memory (i.e., ~ 30X lower switching energy than nanoelectronics). In BiFeO3 the coupling between the antiferromagnetic (AFM) and FE orders is robust at room temperature, scalable in voltage, stabilized by the FE order, and can be integrated into a fabrication process for a beyond-CMOS era. The presence of the AFM order and a canted magnetic moment in this system causes exchange interaction with a ferromagnet such as CoFe or LSMO. While previous work has shown that exchange coupling (uniaxial anisotropy) can be controlled with an electric field, several puzzling issues remain. Perhaps the most intriguing among them is that the BiFeO3-CoFe bilayer did not demonstrate any electrically controlled directional anisotropy, i.e., an exchange bias, which is a potential mechanism for 180o magnetic reversal and is independent of switching kinetics. However, what is needed/preferred for logic and memory is a magneto-electric mechanism that works analogous to an applied field, i.e a uni-directional anisotropy that is voltage modulated. Here, we present the evidence of electrical control of exchange bias of a laterally scaled spin valve that is exchange-coupled to BiFeO3 at room temperature. We show that the exchange bias in this bilayer is thermally robust, electrically controlled and reversible. We anticipate that magneto-electricity at such scaled dimensions provides a powerful pathway for computing beyond the modern nanoelectronics transistors by enabling a new class of non-volatile, ultra-low energy computing elements.

We propose a heterostructure device comprised of magnets and piezoelectrics that significantly improves the delay and the energy dissipation of an all-spin logic (ASL) device. This paper studies and models the physics of the device, illustrates its operation, and benchmarks its performance using SPICE simulations. We show that the proposed device maintains low voltage operation, non-reciprocity, non-volatility, cascadability, and thermal reliability of the original ASL device. Moreover, by utilizing the deterministic switching of a magnet from the saddle point of the energy profile, the device is more efficient in terms of energy and delay and is robust to thermal fluctuations. The results of simulations show that compared to ASL devices, the proposed device achieves 21x shorter delay and 27x lower energy dissipation per bit for a 32-bit arithmetic-logic unit (ALU).

In the quest to develop spintronic logic, it was discovered that magnetoelectric switching results in lower energy and shorter switching time than other mechanisms. Magnetoelectric (ME) field due to exchange bias at the interface with a multi-ferroic (such as BiFeO3) is well suited for 180 degree switching of magnetization. The ME field is determined by the direction of canted magnetization in BiFeO3 which can point at an angle to the plane, to which voltage is applied. Dependence of switching time and the threshold of ME field on its angles was determined by micromagnetic simulations. Switching occurs by formation of a domain wall on the side of the nanomagnet on top of BFO and its propagation to the rest of the magnet. For in-plane magnetization, switching occurs over a wide range of angles and at all magnitudes of ME field above threshold. For out-of-plane magnetization failure occurs (with an exception of a narrow range of angles and magnitudes of ME field) due to the domain wall reflecting from the opposite end of the nanomagnet., Comment: 7 pages, 5 figures

Transient negative differential capacitance (NC), the dynamic reversal of transient capacitance in an electrical circuit is of highly technological and scientific interest since it probes the foundation of ferroelectricity. In this letter, we study a resistor-ferroelectric capacitor (R-FeC) network through a series of coupled equations based on Kirchhoff's law, Electrostatics, and Landau theory. We show that transient NC in a R-FeC circuit originates from the mismatch between rate of free charge change on the metal plate and that of bound charge change in a ferroelectric (FE) capacitor during polarization switching. This transient charge dynamic mismatch is driven by the negative curvature of the FE free energy landscape. It is also analytically shown that a free energy profile with the negative curvature is the only physical system that can describe transient NC during the two-state switching in a FE capacitor. Furthermore, this transient charge dynamic mismatch is justified by the dependence of external resistance and intrinsic FE viscosity coefficient. The depolarization effect on FE capacitors also shows the importance of negative curvature to transient NC. The relation between transient NC and negative curvature provides a direct insight into the free energy landscape during the FE switching., Comment: 5 pages, 11 figures

Physical phenomena underlying operation of ferroelectric field-effect transistors (FeFETs) is treated within a unified simulation framework. The framework incorporates the Landau mean-field treatment of free energy of a ferroelectric and the polarization dynamics according to Landau-Khalatnikov (LK) equation. These equations are self-consistently solved with the one-dimensional metal-oxide-semiconductor (MOS) structure electrostatics and the drift-diffusion solution for the current in the semiconductor channel. Numerical simulations demonstrate, depending on the ferroelectric (FE) thickness, both regimes of hysteresis switching (relevant for a non-volatile memory) and of higher on-currents and steeper subthreshold slope (SS) with a negligible hysteresis (relevant for logic) via the negative capacitance effect., Comment: 8 pages, 14 figures

Spin waves are propagating disturbances in magnetically ordered materials, analogous to lattice waves in solid systems and are often described from a quasiparticle point of view as magnons. The attractive advantages of Joule-heat-free transmission of information, utilization of the phase of the wave as an additional degree of freedom and lower footprint area compared to conventional charge-based devices have made spin waves or magnon spintronics a promising candidate for beyond-CMOS wave-based computation. However, any practical realization of an all-magnon based computing system must undergo the essential steps of a careful selection of materials and demonstrate robustness with respect to thermal noise or variability. Here, we aim at identifying suitable materials and theoretically demonstrate the possibility of achieving error-free clocked non-volatile spin wave logic device, even in the presence of thermal noise and clock jitter or clock skew., Comment: 31 pages including supplementary information

In this technical note, we address the comments on the energy estimates for Magnetoelectric Spin-orbit (MESO) Logic, a new logic device proposed by the authors. We provide an analytical derivation of the switching energy, and support it with time-domain circuit simulations using a self-consistent ferroelectric (FE) compact model. While the energy to charge a capacitor is dissipated in the interconnect and transistor resistance, we note that the energy to switch a capacitor and a FE is independent of the interconnect resistance value to the first order. Also device design can mitigate the parasitic energy losses. We further show the circuit simulations for a sub 10 aJ switching operation of a MESO logic device comprehending: a) Energy stored in multiferroic; b) Energy dissipation in the resistance of the interconnect, Ric ; c) Energy dissipation in the inverse spin-orbit coupling (ISOC) spin to charge converter Risoc; d) Supply, ground resistance, and transistor losses. We also identify the requirements for the resistivity of the spin-orbit coupling materials and address the effect of internal resistance of the spin to charge conversion layer. We provide the material parameter space where MESO (with a fan-out of 1 and interconnect) achieves sub 10 aJ switching energy with path for scaling via ferroelectric/magnetoelectric/spin-orbit materials development., Comment: we address the comments from arXiv:1607.06690 on the energy of MESO logic. The typical ISOC internal resistance should read 10k.Ohm. The technical note is 25 pages, 7 figures

Modern computing systems based on the von Neumann architecture are built from silicon complementary metal oxide semiconductor (CMOS) transistors that need to operate under practically error free conditions with 1 error in $10^{15}$ switching events. The physical dimensions of CMOS transistors have scaled down over the past five decades leading to exponential increases in functional density and energy consumption. Today, the energy and delay reductions from scaling have stagnated, motivating the search for a CMOS replacement. Of these, spintronics offers a path for enhancing the functional density and scaling the energy down to fundamental thermodynamic limits of 100kT to 1000kT. However, spintronic devices exhibit high error rates of 1 in 10 or more when operating at these limits, rendering them incompatible with deterministic nature of the von Neumann architecture. We show that a Shannon-inspired statistical computing framework can be leveraged to design a computer made from such stochastic spintronic logic gates to provide a computational accuracy close to that of a deterministic computer. This extraordinary result allowing a $10^{13}$ fold relaxation in acceptable error rates is obtained by engineering the error distribution coupled with statistical error compensation.

A novel scheme for non-volatile digital computation is proposed using spin-transfer torque (STT) and automotion of magnetic domain walls (DWs). The basic computing element is composed of a lateral spin valve (SV) with two ferromagnetic (FM) wires served as interconnects, where DW automotion is used to propagate the information from one device to another. The non-reciprocity of both device and interconnect is realized by sizing different contact areas at the input and the output as well as enhancing the local damping mechanism. The proposed logic is suitable for scaling due to a high energy barrier provided by a long FM wire. Compared to the scheme based on non-local spin valves (NLSVs) in the previous proposal, the devices can be operated at lower current density due to utilizing all injected spins for local magnetization reversals, and thus improve both energy efficiency and resistance to electromigration. This device concept is justified by simulating a buffer, an inverter, and a 3-input majority gate with comprehensive numerical simulations, including spin transport through the FM/non-magnetic (NM) interfaces as well as the NM channel and stochastic magnetization dynamics inside FM wires. In addition to digital computing, the proposed framework can also be used as a transducer between DWs and spin currents for higher wiring flexibility in the interconnect network., Comment: 9 pages

As nanoelectronics approaches the nanometer scale, a massive effort is underway to identify the next scalable logic technology beyond Complementary Metal Oxide Semiconductor (CMOS) computing. Such computing technology needs to improve switching energy & delay at reduced dimensions, allow improved interconnects and provide a complete logic/memory family. However, a viable beyond-CMOS logic technology has remained elusive. Here, we propose a scalable spintronic logic device which operates via spin-orbit transduction combined with magneto-electric switching. The proposed Magneto-Electric Spin Orbit (MESO) logic enables a new paradigm to continue scaling of logic performance to near thermodynamic limits for GHz logic (100 kT switching energy at 100 ps delay). The proposed MESO devices scale strongly and favorably with critical dimensions of the device, showing a cubic dependence of switching energy on size, (E_m proportional to W^3), and square dependence on voltage (E_m proportional to V^2). The excellent scaling is obtained thanks to the properties of the spin orbit effects (e.g. Inverse Spin Hall Effect (ISHE) and Inverse Rashba-Edelstein Effect (IREE)) and the dependence of capacitance on size. The operating voltages for these devices are predicted to be < 100 mV allowing a significant jump ahead of historic trends of scaling voltage with size and corresponding reduction of energy. Interconnect resistance is a critical obstacle for scaling beyond 10 nm dimensions. We project a less detrimental impact of interconnect resistance and show that MESO logic is amenable for highly resistive interconnects (100 uOhm.cm-1 mOhm.cm) which opens a possibility to use nano-metallic (width < bulk electron mean free path) or doped semiconducting wires (width<5 nm). A scalable, CMOS compatible, non-volatile logic family proposed here may enable the next multi-generational scaling of computing devices., Comment: (60 pages, including supplementary) Updated Figure 3B. Contains expanded energy calculations, effect of SOC resistivity, supported with device simulations in supplementary Sections F,G

Efficient generation of spin currents from charge currents is of high importance for memory and logic applications of spintronics. In particular, generation of spin currents from charge currents in high spin-orbit coupling metals has the potential to provide a scalable solution for embedded memory. We demonstrate a net reduction in critical charge current for spin torque driven magnetization reversal via using spin-orbit mediated spin current generation. We scaled the dimensions of the spin-orbit electrode to 400 nm and the nanomagnet to 270 nm x 68 nm in a three terminal spin-orbit torque, magnetic tunnel junction (SOT-MTJ) geometry. Our estimated effective spin Hall angle is 0.15-0.20 using the ratio of zero temperature critical current from spin Hall switching and estimated spin current density for switching the magnet. We show bidirectional transient switching using spin-orbit generated spin torque at 100 ns switching pulses reliably followed by transient read operations. We finally compare the static and dynamic response of the SOT-MTJ with transient spin circuit modeling showing the performance of scaled SOT-MTJs to enable nanosecond class non-volatile MTJs.