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56. Hypergraph Partitioning

57. Multi-Threaded Processors

58. Memory Models

59. Myri-10G

60. High Performance Fortran (HPF)

61. Meiko

62. Memory Ordering

63. Monitors, Axiomatic Verification of

64. Homology to Sequence Alignment, From

65. Heterogeneous Element Processor

66. HPS Microarchitecture

67. HPF (High Performance Fortran)

68. Massive-Scale Analytics

69. Modulo Scheduling and Loop Pipelining

70. Mutual Exclusion

71. HyperTransport

72. Mul-T

73. High-Level I/O Library

74. Hypercubes and Meshes

75. Models for Algorithm Design and Analysis

76. HEP, Denelcor

77. Message Passing Interface (MPI)

78. MIMD Lattice Computation

79. Multicore Networks

80. Massively Parallel Processor (MPP)

81. MIMD (Multiple Instruction, Multiple Data) Machines

82. Hazard (in Hardware)

83. MPI (Message Passing Interface)

84. Multistage Interconnection Networks

85. Model Coupling Toolkit (MCT)

86. Hybrid Programming With SIMPLE

87. Half Vector Length

88. Memory Wall

89. HPC Challenge Benchmark

90. Memory Consistency Models

91. METIS and ParMETIS

92. MPI-IO

93. Multi-Level Transactions

94. High-Performance I/O

95. Multiple-Instruction Issue

96. MPI-2 I/O

97. Matrix Computations

98. Mesh Partitioning

99. Hierarchical Data Format

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