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52. Impact of material/process interactions on the properties of a porous CVD-O3 low-k dielectric film

54. Gate Dielectrics for High Performance and Low Power CMOS SoC Applications

60. Integration feasibility of porous SiLK* semiconductor dielectric

66. Cost-effective cleaning and high-quality thin gate oxides

69. Development of ALD HfZrOx with TDEAH/TDEAZ and H2O.

75. CD control using SiON BARL processing for sub-0.25 @mm lithography

76. Tantalum-based gate electrode metals for advanced cmos devices

81. Ge deep sub-micron pFETs with etched TaN metal gate on a high-k dielectric, fabricated in a 200mm silicon prototyping line

83. Cu/LKD-5109 damascene integration demonstration using FF-02 low-k spin-on hard-mask and embedded etch-stop

84. Cost-effective cleaning for advanced Si-processing

90. Development of ALD HfZrOxwith TDEAH/TDEAZ and H2O

91. High-k Dielectrics and Metal Gates for Future Generation Memory Devices

92. Ultrathin NiGe films prepared via catalytic solid-vapor reaction of Ni with GeH(4).

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