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51. Manufacturing 100-µm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line

Author

Terheiden, Barbara, primary, Ballmann, Tabitha, additional, Horbelt, Renate, additional, Schiele, Yvonne, additional, Seren, Sabine, additional, Ebser, Jan, additional, Hahn, G., additional, Mertens, Verena, additional, Koentopp, Max B., additional, Scherff, Maximilian, additional, Müller, Jörg W., additional, Holman, Zachary C., additional, Descoeudres, Antoine, additional, Wolf, Stefaan De, additional, de Nicolas, Silvia Martin, additional, Geissbuehler, Jonas, additional, Ballif, Christophe, additional, Weber, Bernd, additional, Saint-Cast, Pierre, additional, Rauer, Michael, additional, Schmiga, Christian, additional, Glunz, Stefan W., additional, Morrison, Dominique J., additional, Devenport, Stephen, additional, Antonelli, Danilo, additional, Busto, Chiara, additional, Grasso, Federico, additional, Ferrazza, Francesca, additional, Tonelli, Elisa, additional, and Oswald, Wolfgang, additional

Published
2014
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58. Manufacturing 100-µm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line.

Author

Terheiden, Barbara, Ballmann, Tabitha, Horbelt, Renate, Schiele, Yvonne, Seren, Sabine, Ebser, Jan, Hahn, G., Mertens, Verena, Koentopp, Max B., Scherff, Maximilian, Müller, Jörg W., Holman, Zachary C., Descoeudres, Antoine, Wolf, Stefaan De, de Nicolas, Silvia Martin, Geissbuehler, Jonas, Ballif, Christophe, Weber, Bernd, Saint‐Cast, Pierre, and Rauer, Michael

Subjects
DIRECT energy conversion, SOLAR cells, COMPOUND parabolic concentrators, REGRESSION quantiles, ISOTHERMAL processes
Abstract

Reducing wafer thickness while increasing power conversion efficiency is the most effective way to reduce cost per Watt of a silicon photovoltaic module. Within the European project 20 percent efficiency on less than 100-µm-thick, industrially feasible crystalline silicon solar cells ('20plµs'), we study the whole process chain for thin wafers, from wafering to module integration and life-cycle analysis. We investigate three different solar cell fabrication routes, categorized according to the temperature of the junction formation process and the wafer doping type: p-type silicon high temperature, n-type silicon high temperature and n-type silicon low temperature. For each route, an efficiency of 19.5% or greater is achieved on wafers less than 100 µm thick, with a maximum efficiency of 21.1% on an 80-µm-thick wafer. The n-type high temperature route is then transferred to a pilot production line, and a median solar cell efficiency of 20.0% is demonstrated on 100-µm-thick wafers. [ABSTRACT FROM AUTHOR]

Published
2015
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59. Variation of the layer thickness to study the electrical property of PECVD Al2O3 / c-Si interface.

Author

Saint-Cast, Pierre, Heo, Youn-Ho, Billot, Etienne, Olwal, Peter, Hofmann, Marc, Rentsch, Jochen, Glunz, Stefan W., and Preu, Ralf

Subjects
ELECTRICITY, ALUMINUM oxide, DEEP level transient spectroscopy, SILICON oxide, ELECTRONS, CRYSTALLIZATION, SURFACES (Technology)
Abstract

Abstract: This paper focusses in particular on the influence of the layer thickness on the passivation quality, the charge density and the interface defects of PECVD Al2O3 passivation layers on c-Si surfaces. The surface recombination velocity and the interface defect density are observed to increase by decreasing the layer thickness. However, the density of negative charges remains almost constant with values around 3 1012cm-2. An optimal passivation quality is obtained for thicknesses of 15nm and higher. A linear relation between surface recombination velocity and Dit was established, allowing the estimation of the electron capture cross section (σn ∼ 10-13 cm-2). Additionally, we measured the capture cross section of holes and electrons using DLTS measurement. The results are found to be very similar to reported values for silicon dioxide. This supports the idea that the chemical passivation of crystalline silicon by Al2O3 is performed by the interstitial SiO2 layer. [Copyright &y& Elsevier]

Published
2011
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60. Manufacturing 100-mu m-thick silicon solar cells with efficiencies greater than 20% in a pilot production line

Author

Terheiden, Barbara, Ballmann, Tabitha, Horbelt, Renate, Schiele, Yvonne, Seren, Sabine, Ebser, Jan, Hahn, G., Mertens, Verena, Koentopp, Max B., Scherff, Maximilian, Mueller, Joerg W., Holman, Zachary C., Descoeudres, Antoine, De Wolf, Stefaan, De Nicolas, Silvia Martin, Geissbuehler, Jonas, Ballif, Christophe, Weber, Bernd, Saint-Cast, Pierre, Rauer, Michael, Schmiga, Christian, Glunz, Stefan W., Morrison, Dominique J., Devenport, Stephen, Antonelli, Danilo, Busto, Chiara, Grasso, Federico, Ferrazza, Francesca, Tonelli, Elisa, and Oswald, Wolfgang

Subjects
high efficiency, pilot production, solar cells, thin wafers, silicon
Abstract

Reducing wafer thickness while increasing power conversion efficiency is the most effective way to reduce cost per Watt of a silicon photovoltaic module. Within the European project 20 percent efficiency on less than 100-mu m-thick, industrially feasible crystalline silicon solar cells ("20pl mu s"), we study the whole process chain for thin wafers, from wafering to module integration and life-cycle analysis. We investigate three different solar cell fabrication routes, categorized according to the temperature of the junction formation process and the wafer doping type: p-type silicon high temperature, n-type silicon high temperature and n-type silicon low temperature. For each route, an efficiency of 19.5% or greater is achieved on wafers less than 100 mu m thick, with a maximum efficiency of 21.1% on an 80-mu m-thick wafer. The n-type high temperature route is then transferred to a pilot production line, and a median solar cell efficiency of 20.0% is demonstrated on 100-mu m-thick wafers. (C) 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

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