51. A 150 MIPS/W CMOS RISC processor for PDA applications
- Author
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H. Goto, K. Malik, Y. Ootaguro, Masato Nagamatsu, A. Kawasumi, H. Tago, T. Mijamori, K. Mabuchi, Hiroaki Murakami, T. Utsumi, M. Kamata, and T. Teruyama
- Subjects
Multi-core processor ,Engineering ,Reduced instruction set computing ,business.industry ,Transistor ,Electrical engineering ,Die (integrated circuit) ,law.invention ,Microprocessor ,Software portability ,CMOS ,law ,Embedded system ,Hardware_INTEGRATEDCIRCUITS ,business ,Digital signal processing - Abstract
This CMOS microprocessor has performance of about 45MIPS at 50 MHz with about 300 mW power dissipation at 3.3 V power supply. It implements about 440 k transistors in a 25 mm/sup 2/ die fabricated by 0.41 /spl mu/m double metal CMOS. It is designed as a core processor for PDA applications, that require high speed graphical operation and digital signal processing functions as well as low power consumption from portability requirements.
- Published
- 2002