407 results on '"Kim, Hyesoon"'
Search Results
52. CuPBoP
53. Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping
54. Person Walking Backward.
55. Development and Effect of Science Play Program Connected with Maker-Activity for Young Children
56. COX : Exposing CUDA Warp-level Functions to CPUs
57. The Development and Validation of the Play Support Efficacy Scale for Early Childhood Teachers
58. Accelerating Graphic Rendering on Programmable RISC-V GPUs
59. Maia: Matrix Inversion Acceleration Near Memory
60. Securing GPU via region-based bounds checking
61. FiGO: Fine-Grained Query Optimization in Video Analytics
62. I'm OK, I'm Pig!
63. Development of character education program for early childhood teachers based on the Four Noble Truths
64. Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics
65. RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU
66. Copernicus: Characterizing the Performance Implications of Compression Formats Used in Sparse Workloads
67. SmaQ: Smart Quantization for DNN Training by Exploiting Value Clustering
68. Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References
69. Quantifying the design-space tradeoffs in autonomous drones
70. Efficiently Solving Partial Differential Equations in a Partially Reconfigurable Specialized Hardware
71. An analysis of the performance impact of wrong-path memory references on out-of-order and runahead execution processors
72. Performance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU)
73. FAFNIR: Accelerating Sparse Gathering by Using Efficient Near-Memory Intelligent Reduction
74. Hardware-based Always-On Heap Memory Safety
75. MEISSA: Multiplying Matrices Efficiently in a Scalable Systolic Architecture
76. Parallel Hash Table Design for NDP Systems
77. Things to Consider to Enable Dynamic Graphs in Processing-in-Memory
78. Neural Network Weight Compression with NNW-BDI
79. Understanding the Software and Hardware Stacks of a General-Purpose Cognitive Drone
80. Hot Chips 2020 Posters
81. RISC-V FPGA Platform Toward ROS-Based Robotics Application
82. PISCES: Power-Aware Implementation of SLAM by Customizing Efficient Sparse Algebra
83. Toward Collaborative Inferencing of Deep Neural Networks on Internet-of-Things Devices
84. The 2019 Top Picks in Computer Architecture
85. Proposing a Fast and Scalable Systolic Array for Matrix Multiplication
86. Psychoanalytic Exploration of a Psychopathic Character: A Case of Villanelle in 'Killing Eve'
87. Batch-Aware Unified Memory Management in GPUs for Irregular Workloads
88. ASCELLA: Accelerating Sparse Computation by Enabling Stream Accesses to Memory
89. Tango: An Optimizing Compiler for Just-In-Time RTL Simulation
90. Traversing large graphs on GPUs with unified memory
91. Un verre de miroir rouge : Recueil
92. Productive Hardware Designs using Hybrid HLS-RTL Development
93. Cash
94. ALRESCHA: A Lightweight Reconfigurable Sparse-Computation Accelerator
95. Characterizing the Deployment of Deep Neural Networks on Commercial Edge Devices
96. Video analytics from edge to server
97. Affective Factors That Contribute to the Quality of Life of Juvenile Inmates with Attention-Deficit/Hyperactivity Disorder: A Focus on Items from the Korean Youth Self Report
98. Capella: Customizing Perception for Edge Devices by Efficiently Allocating FPGAs to DNNs
99. POSTER: Tango: An Optimizing Compiler for Just-In-Time RTL Simulation
100. ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.