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The new energy system with low environmental load will more and more reflect its superiority in urban design and planning. The state monitoring of power electronic devices used for power conversion in new energy system is of great significance to the stable operation of the whole city. The failure mechanism and aging evolution process of IGBT modules are studied, and the failure types of IGBT devices are judged. An algorithm based on the thermal sensitive electrical parameter method and thermal resistance network method was proposed to identify aging types. Firstly, a healthy junction temperature model of IGBT based on the initial loss of turn-off was established in the double-pulse platform based on experimental data. Secondly, a thermal resistance network model of IGBT was established based on the datasheet. Finally, the accelerated aging of IGBT was carried out through the existing accelerated aging experimental platform of IGBT in the laboratory, and the aging parameters were imported into the above two models. The results show that the output results of the thermal resistance network model and the thermal parameter model are affected by the aging type, which provides a new solution for the aging type research of IGBT, and is of great value for the application of new energy system.

This article presents the results of investigations illustrating the influence of the method of assembling the die of the insulated gate bipolar transistor (IGBT) to the base of the TO-220 lead frame on its thermal parameters. The properties of the tested semiconductor die and the methods of assembling it in the case are presented. The measurement method used here, belonging to the indirect electrical methods, is carefully described. The obtained measurement results are shown and discussed to indicate which of the assembly methods of the die attachment to the case ensures the most effective heat dissipation. The results obtained for the tested devices point to soldering, and they are comparable with the results of measurements obtained for a commercial IGBT mounted in the same case.

The thicker photoresists are usually used in the manufacture processes of micro electro mechanical systems (MEMS), bipolar CMOS DMOS (BCD), and insulated gate bipolar transistor (IGBT), due to the thicker film need to be etched, high-dose implant process or other extreme processes have been widely used. This paper deal with the double coating process using the single commercial photoresist, this is an effective and simple approach to achieve the thicker photoresist thickness for the lithography process. We focus on the prediction of the thickness of the double-layer photoresist, which has seldom been reported in past studies. Although the final photoresist cross-section looks like one layer, we divide it theoretically into two layers, refer to as the first layer photoresist and the second layer one. Combined this model, first, an original equation for predicting the final thickness is deduced from the model developed by Emslie et al. Second, we conduct the experiment with different photoresists, soft bake temperatures, and soft bake times, and compare the theoretical predicted thickness to the actual one obtained from the experiment, moreover, a modified equation with satisfied accuracy is proposed, we can prepare the required photoresist thickness quickly and accurately by using this equation, not only can development cost be saved, but also can development cycle be shortened.

In this article, a dc/dc topology is proposed for welding power supply that achieves a high conversion efficiency of over 94%, requiring ac 220 and 440 V operation. The secondary-side structure of the proposed topology is the same as that of conventional welding power supplies but the primary side consists of a three-leg inverter structure and a high-frequency transformer with two primary windings connected in series. Due to this structure, it is possible to operate in a wider input voltage range than conventional welding power supplies without significant loss of performance. In addition, it has the advantage of achieving high conversion efficiency over the entire input voltage range by reducing primary current stress and secondary rectifying voltage stress due to an increase in turn-ratio, and a reduction in circulating current. This advantage allows the use of mosfet s rather than insulated gate bipolar transistor (IGBTs) with low operating frequency, which are often used in conventional welding power supply applications. Using a mosfet reduces the size of the power-stage passive devices, thereby reducing the overall system size. The performance of the proposed topology is verified in prototypes with a switching frequency of 100 kHz, an input voltage of 311/622 V, an output of 50 V, and a 6.0 kW class specification.

The technology of inverse current commutation with semiconductors (ICCOS) has the ability to reliably commutate high current, which has been demonstrated in related literature. By applying the ICCOS technology to a repetitive inductive pulsed power supply (IPPS), an improved IPPS circuit was presented in our previous work. In the improved circuit, a thyristor replaces the insulated gate bipolar transistor (IGBT) of the previous circuit as the main switch, and a bridge current commutation unit acts as the ICCOS branch. The capacitor voltage in ICCOS has the ability of self-recovery, which adapts to the continuous operation of IPPS. To make the improved IPPS circuit obtain higher performance, the influence of some key circuit parameters is studied in this paper by numerical calculation. It can be concluded that the voltage of the main switch and the ratio of capacitive energy storage can be reduced, the recovery rate of residual energy can be increased, and the residual energy recovery time can be shorten by improving the capacitance C , inductance ratio L 2/( L 2 + L L), inductance L 2 and coupling coefficient k . Finally, the preliminary experimental results under various capacitance are presented, which confirms the validity of the numerical calculation.

Die attachment by pressureless silver sintering at I–V characteristics and the thermal resistance of the IGBT modules were discussed.

This paper presents a method for junction temperature estimation using the mathematical thermal model in a two-level insulated-gate bipolar transistor (IGBT) inverter for motor drives. A power conversion system (PCS) comprises various components, and IGBT switches are the key components determining the reliability of the PCS. One of the challenges with regard to a PCS is improving its reliability. The failure of IGBTs is mainly due to variations in the junction temperature. To predict the lifetime of the PCS, the thermal behavior of the IGBT must be defined. The thermal behavior is dependent on the current that flows to the IGBT, and the load current profile is specific to the application. Generally, the switch module is encapsulated; therefore, an additional manufacturing process is necessary for measuring the junction temperature. The presented temperature estimation method using a mathematical model does not require an additional process for temperature measurement. An experiment is conducted using a diode-doped FS150R12KT4 module to determine the thermal profile of the IGBT for 11-kW interior permanent magnet synchronous motor drives. The effectiveness of the presented estimation method is verified by the simulation and experimental results.

The object of this research was a self-resonated inverter, based on paralleled Insulated-Gate Bipolar Transistors (IGBTs), for high-frequency induction heating equipment, operating in a wide range of output powers, applicable for research and industrial purposes. For the nominal installed capacity for these types of invertors to be improved, the presented inverter with a modified circuit comprising IGBT transistors connected in parallel was explored. The suggested topology required several engineering problems to be solved: minimisation of the current mismatch amongst the paralleled transistors, a precise analysis of the dynamic and static transistors’ parameters, determination of the derating and mismatch factors necessary for a reliable design, experimental verification confirming the applicability of the suggested topology in the investigated inverter. This paper presents the design and analysis of IGBT transistors based on datasheet parameters and mathematical apparatus application. The expected current mismatch and the necessary derating factor, based on the expected mismatch in transistor parameters in a production lot, were determined. The suggested design was experimentally tested and investigated using a self-resonant inverter model in a melting crucible induction laboratory furnace.

Turn- off time is an important condition parameter for insulated gate bipolar transistor (IGBT), which could provide useful information on the device junction temperature and its state of health. Currently, it is measured directly from the IGBT collector-emitter voltage V ce or indirectly from the gate side, which may cause problems of safety and complexity for a power converter operating in a harsh electromagnetic environment. To address the challenges, this article proposes a noncontact method to monitor the IGBT turn- off time from the PWM switching ringing in the converter output current. First, a phenomenon is observed that there are two switch-over points in the switching ringing current corresponding to the transition of IGBT turn- off voltage. Analytical analysis is performed with a high-frequency (HF) equivalent circuit to investigate the mechanism of the one-to-one temporal relationship. Then, the noncontact condition monitoring (CM) scheme including the HF switching ringing current sensor and the framework of CM system is devised. Finally, experimental work is carried out to validate the theoretical analysis and the effectiveness of the method. Research results show that the turn- off time of multi-IGBTs can be effectively extracted at the terminal of converter during system normal operation with electrically isolated safety.

This article presents a self-balancing technique for voltage sharing of series-connected insulated gate bipolar transistors (IGBTs). Each series IGBT is augmented with an auxiliary switch, which operates in complementary to the main one, and a capacitor in series. When gate signal delays, based on the capacitor voltage feedbacks, are applied to the series modules, the voltage sharing can be balanced. The delays are generated with local controllers without DSP/field-programmable gate array, regardless of the parasitic element distribution, thermal characteristics of the devices, or current amplitudes. Since there is no resistive element in the auxiliary branch, the balancing circuit is low loss. The circuit and the operation modes are provided in detail and illustrated with simulation models. Experimental results with ten series modules at different voltage levels are presented to demonstrate the principle of control, and the performance of the proposed technique.

A press pack insulated gate bipolar transistor (PP IGBT) device consists of multiple materials. Under the influence of alternating current and clamping force, the device suffers from complex thermomechanical stress. However, the experience-based packaging design does not consider the coupling effect of junction temperature fluctuation ( $\Delta T_{\mathrm{ j}}$ ) and mechanical stress, which may not ensure the optimal thermomechanical behavior and cause the advance failure of the PP IGBT device. Thus, it is significant to provide a theoretical basis and select appropriate parameters for device packaging design. In this article, a finite-element model of a 3300-V/50-A PP IGBT device is first built and verified via experiments. The influence of principal parameters on the thermomechanical behavior is then illustrated. Next, the response surface method is proposed to reveal the significance level of each parameter. According to simulation results under different combinations of parameters, quadratic response surfaces are obtained. The combined effects of packaging parameters on $\Delta T_{\mathrm{ j}}$ and stress are clarified. Finally, optimal results are derived and verified. An approximate 4 °C decrease in $\Delta T_{\mathrm{ j}}$ and a 19.8% decrease in stress are achieved simultaneously in the long-time power cycling test. A 2.6 °C reduction in junction temperature is achieved under the practical high-voltage direct current (HVDC) condition.

The safe operating condition for the vacuum tubes is very important and critical since they are very expensive and delicate. Providing limited short circuit energy for the vacuum tube and fast transferring from the short circuit to the nominal operation state are absolutely necessary. Extant protection strategies threat the availability of the vacuum tubes. In addition, they cannot completely protect the tube due to the delay of the fault detection system. This article proposes a high voltage (HV) short circuit fault current limiter which can limit the short circuit energy of the system inherently. The proposed structure activates automatically when the current exceeds the predetermined value. Hence, the need for the fault detection unit is minimized. The proposed short circuit fault current limiter is based on the series insulated gate bipolar transistors (IGBTs). Due to the interesting current limiting feature of the IGBTs, the short circuit current is limited for a definite time. During this time interval, the vacuum arc interrupts and the tube can operate instantaneously. In order to provide a safe operating condition of the series-connected IGBTs in the short circuit fault, several external circuits are suggested. The proper operation of the proposed short circuit fault current limiter is evaluated using simulations and experimental prototyping.

Fast and accurate online monitoring of junction temperature of insulated gate bipolar transistor (IGBT) chips is of great significance for overtemperature protection and thermal stress optimization of IGBTs. However, existing IGBT junction temperature estimation methods have drawbacks of dependence on bond wire degradation, low resolution, nonlinearity, and difficulty in online implementation. In this article, a novel in situ IGBT junction temperature estimation method via turn- off collector voltage overshoot is proposed, which is independent on bond wire degradation. Based on theoretical analysis, the turn- off collector voltage overshoot is approximately linear to the junction temperature. The peak value of the turn- off collector voltage can be extracted during operation. Experiments are conducted to verify the technique proposed. A linear relationship between collector voltage overshoot and IGBT junction temperature is revealed, which illustrates the validity of the proposed method. Besides, the operation parameters (bus voltage, load current, and temperature) are considered, and the calibration on operation parameter variations is discussed. At last, the proposed method is compared with a traditional IGBT junction temperature estimation method based on the on -state voltage drop. The advantages of the proposed method lie in its independence on bond wire degradation and high resolution for online temperature estimation.

Hybrid circuit breaker (HCB) has shown good performance for interrupting dc fault current. However, a massive number of IGBTs in series is needed. These will lead to high costs and significant difficulty in balancing IGBT dynamic voltage. This paper proposes a bidirectional hybrid circuit breaker based on a cascaded half-bridge submodule structure to reduce the overall costs and implementation difficulty of HCB. The number of IGBTs is reduced by 50%, and the operating speed is fast enough. A model of a four-terminal modular multilevel converter (MMC) system with a proposed hybrid circuit breaker in different stages is developed to describe the fault blocking process more clearly. The performance of the proposed HCB is validated and compared with other HCB structure through both theoretical derivation and time-domain simulation.

A 600 V-rated insulated gate bipolar transistor (IGBT) with improved turn-on transient characteristics is proposed and investigated by simulation. The proposed IGBT features a built-in voltage-clamping structure. The floating ${p}$ -body adjacent to the trench gate is clamped at an appropriately high voltage before turn-on. This slows down the hole accumulation process in the floating p -body during turn-on transient, and thus the self-charging displacement current through the gate capacitance is reduced. The increasing rate for the gate voltage ( dV GE/ dt ) is then reduced. As a result, the proposed IGBT achieves a 25% decrease in collector current ( $I_C$ ) overshoot and 34% decrease in dI C/ dt , when compared with the conventional IGBT with the same turn-on loss ( E ON), at IC = 250 A/cm2 under hard-switching. Its fabrication process is compatible with conventional trench IGBT.

Temperature sensitive electrical parameters (TSEPs) are used to determine the chip temperature of a single-chip insulated gate bipolar transistors (IGBT) power module by measuring one electrical device parameter. Commonly, most TSEPs have a linear relationship between the chip temperature and the electrical parameter. Like any sensor, preferred attributes of TSEPs include good accuracy, linearity, and sensitivity. For multichip IGBTs (mIGBTs) modules, these can only be achieved when all chips have the same temperature. Equal chip temperatures among different semiconductor chips can be achieved when placing mIGBTs in environmental chambers to produce a homogeneous temperature distribution (HTD). In real applications, however, mIGBTs are power cycled and are exposed to inhomogeneous temperature distribution (ITD) where temperature differences exist between chips. Consequently, measuring one electric parameter only cannot represent each chip temperature which impacts the TSEP sensitivity, linearity, and accuracy. This article compares the performance of ten TSEPs applied to an mIGBT module operating at HTD and ITD conditions in order to determine which TSEPs are most suitable for mIGBTs in real applications.

Given the recently available IGBT switch modules up to 6.5 kV, 1200 A rating, the prospect of the diode-free variant topology of the three-level neutral-point-clamped (3-level T-type, NPC) inverter in certain medium-voltage applications is bright due to its small part count and low conduction losses compared to the diode-clamped NPC inverter. However, within this voltage range, the input dc voltage rating of 50% of the switches per inverter phase-leg still poses limitations to the deployment of a 3-level T-type inverter. In view of these limitations, a reconfigured four-switch per phase-leg power circuit for a 3-level inverter (F-type) is presented in this article. The common node of the bidirectional switch in the T-type inverter is explored to have only one power switch rated at input dc voltage and three switches rated at half the input dc voltage per inverter leg. This reduced voltage stress has inverter cost and loss implications. The performances and competitiveness of the three-level F-type inverter are analyzed in detail and demonstrated with a hardware prototype. Results reveal that it has the potentials of being considered a real alternative to 3-level T-type inverters for certain low- and medium-voltage applications.

Hybrid switches are attracting increasing attention recently, due to their high efficiency and low cost. Normally, two separated gate drivers and driving signals are needed for the hybrid switch, which leads to more cost and more control complexity. A novel gate driver circuit for SiC+Si hybrid switches is proposed using single driving signal and single-gate driver in this article. Two simple resistance-capacitance (RC) delay circuits are used for generating different time-delays required by two different triggering patterns to provide more flexibility. The detailed operation principles, mathematical analysis, and the guidance for the selection of key components of the proposed circuit are provided. The merits of the proposed driver are: first, simple structure; second, low control complexity; third, more flexibility; and fourth, low cost. A 2-kW Silicon Carbide (SiC)-MOSFET+Si-insulated gate bipolar transistor (IGBT) hybrid switch buck converter is built to validate the proposed gate driver circuit. The analysis and experimental results match very well, which shows the effectiveness and merits of the proposed method.

A cooling technology roadmap is defined for power electronics modules such as insulated gate bipolar transistors (IGBT) and wideband gap semiconductor modules (SiC/GaN). These power modules are widely used for inverter and converter applications. Cooling technologies studied include natural air cooling, forced air cooling, forced liquid cooling, and thermal management technologies employing phase change. This work reviews the standard modes of failures of power electronics modules. The work helps to understand the thermal resistances at various interfaces in the module stack. The study highlights the importance of using electrothermal models for power loss estimation. Effective thermal management must ensure the power electronics components' junction (die) temperature is within the desired limits. The developed cooling technology roadmap suggests using heat flux at the module base and heat generation per temperature rise in the die as a metric for selecting cooling technology. Further, the review also stresses the importance of junction temperature swings experienced by the die during transient operation.

The insulated gate bipolar transistor (IGBT) is one of the most fragile components in power electronics converters. In order to improve the reliability of IGBTs, various measurements are taken according to the condition monitoring (CM) technique. Traditional CM techniques include the measurement and estimation of the device operation conditions. Recently, emerging techniques have been developed, not only for the detection and estimation but also for the prognostics of IGBTs with the condition data. In this paper, a review is performed on the recent progress in the CM techniques for IGBTs. First, some emerging electrical and thermal measurements are reviewed. Based on the sensed data, the health indicator estimation techniques are summarised. Moreover, for the emerging prognostics and health management applications, some remaining using lifetime (RUL) prediction methods are reviewed. Finally, the research gaps and directions are discussed for the CM in IGBT applications.

In this paper, the mode-change PWM method is proposed to improve the efficiency of a 3-level T-type (3LT) PWM converter. A 3LT PWM converter, except for its added neutral-point switches, has the same topology as that of the 2-level PWM converter. Therefore, 3LT PWM converter can operate in two modes depending on the operation of neutral-point switches. In the case of a 3LT topology using generic IGBT, two IGBTs are added at the neutral point, which causes twice the conduction loss compared to 2-level converters. Thus, 3LT PWM converters have more conduction loss than 2-level converters, particularly in the low MI region. Consequently, 3LT PWM converters have lower efficiency than that of a 2-level converter in the low MI region. The switching and conduction losses based on the operation mode of each topology is calculated, analyzed. If the controller determines the operation mode of the 2- or 3-level PWM converter based on the power loss calculated during every cycle, the efficiency of 3LT PWM converter can be improved. The validity of the proposed control scheme was investigated through simulation and experiments. The waveform and efficiency of each method were compared.

Nowadays AC-DC converter is mostly used for finding dc links in various applications. In any dc system, the prime concern is voltage/current ripples, it could truly affect the system execution on both the input and output sides. In this research a single-phase IGBTs (Insulated Gate Bipolar Transistors) based PWM (Pulse width modulated) boost rectifier is simulated. This rectifier circuit is simulated by using IGBT because it is having a high switching speed. It can boost DC output voltage and unity power factor at sinusoidal input with small THD (Total Harmonic Distortion). Generally, the PWM rectifier suffers from pulsating ripple power at double the supply frequency. This unwanted power can be filtered out by selecting a large value of capacitor or an LC branch. To compensate for ripple energy in this system a Proportional Integral controller (PI controller) is proposed. PI controller is used to reducing the output voltage fluctuation and total harmonic distortion of input current. PSIM software is used to design this simulation. Simulation results validate that the projected scheme is effective to minimize the input current harmonic distortion significantly.

This article investigates three families of symmetric single-phase multilevel converters with two dc links for inverter applications. The proposed configurations are based on cascaded cells formed by two-level legs and injection transformers that are connected to a basic cell formed by two half H-bridges with shared-legs. Three types of cells are proposed: cell $U$ , composed of three legs and two transformers; cell $V$ , composed of four legs and three transformers; and cell $W$ , composed of six legs and four transformers. The topologies operate in the nonisolated condition (with one less transformer). The generalized system model equations of proposed topologies are discussed. The transformer turns ratios and the dc-link voltages are determined in order to improve the system symmetry and generate the output voltage with low harmonic contents. An unidimensional pulsewidth modulation technique is presented to control the switches of the converters. Harmonic distortion analysis, number of components, rating of the semiconductor devices, power semiconductor losses, IGBT and diode temperature analysis, and transformer ratings are used to compare the proposed configurations with a modular symmetric multilevel inverter formed by three-leg modules cascaded thought injection transformers. The proposed converters present advantages as higher quality of output voltages, and lower semiconductor power losses using the same or lower number of circuit components. Experimental results are shown to demonstrate the feasibility of the systems.

Insulated gate bipolar transistor (IGBT) modules in modular multilevel converters (MMCs) have inherent unbalanced power loss distribution and temperature swing. Some chips may become the hotspots and have much larger temperature swing than others, which seriously compromises the lifetime of the IGBT modules. Therefore, effective improvement measures that are low cost become crucial for the IGBT modules in MMC. Reverse conducting IGBT (RC-IGBT) constructs the IGBT and freewheel diode in a single chip, which has the advantages of lower thermal resistance, lower switching loss, and larger heat capacity. In this article, a new generation of RC-IGBT module and conventional IGBT (Con-IGBT) module from Fuji Electric with the same packaging are both used in the MMC. A newly defined current density for RC-IGBT and Con-IGBT module is proposed. The thermal performances and annual damages of the two modules under different power factors are comprehensively compared at the same module current density. The results show that when the power factor is greater than 0.4, using RC-IGBT can significantly improve the thermal performance of MMC submodules (SMs) and extend their lifetime. In addition, the reasons for the comparison results are also discussed in this article. Finally, the advantages of RC-IGBT in terms of thermal performances are verified by experiment. This article also provides a guideline for the design of MMC SMs.

The junction temperature ( $T_j$ ) estimation of the insulated gate bipolar transistor (IGBT) is important for reliable operation of the power converters in various applications. For $T_j$ estimation, on -state collector-emitter voltage ( $v_{ce}$ ) at higher collector currents ( $i_c$ ) is widely used temperature sensitive electrical parameter (TSEP). For real-time $T_j$ estimation, this TSEP is calibrated using the I–V characteristics of the new IGBT. Due to bond-wire degradation, the original I–V characteristics of IGBT changes resulting in inaccurate $T_j$ estimation. In this article, a technique is proposed to update the I–V characteristics of the degraded IGBT, without affecting the normal operation of the power converter. It is achieved by estimating the increment in bond-wire resistance ( $\triangle R_{con}$ ) by using real-time samples of $v_{ce}$ and inductor current. The mathematical analysis is also presented to find an error in estimated $\triangle R_{con}$ . The major contributions of this article are as follows: a) it enables the accurate $T_j$ estimation of the IGBT throughout its lifetime; and b) it also provides the parameter $\triangle R_{con}$ , which could be utilized in condition monitoring of the IGBT. Further no additional circuitry is required. The proposed technique is validated on experimental setup, which is developed in the laboratory. The error in $T_j$ estimation is observed within $1$ °C the degraded IGBT, which shows the effectiveness of the proposed scheme.

This article proposes a high-voltage fault current limiter (HVFCL) for high-voltage dc power supplies (HVdcPSs) which limits the current of the power supply automatically in the short-circuit fault (SCF). The proposed HVFCL is based on the series-connected insulated gate bipolar transistors (IGBTs). The main achievements of this article are the balanced voltage sharing and a very low value of the short-circuit current near to the load nominal current for the series-connected IGBTs during the SCF. These achievements result in a longer maximum permissible short-circuit time. These achievements are obtained by a control strategy that puts the series-connected IGBTs in a specific operating point in the active region during the SCF. Based on the proposed master–slave control strategy, one of the IGBTs is current controlled and rolls as the master. The other IGBTs are voltage controlled and imitate the master IGBT voltage. Consequently, a balanced voltage sharing is guaranteed for the series-connected IGBTs in the SCF. PSPICE simulations and experimental results are provided to verify the proper performance of the proposed HVFCL.

This article presents a novel system to connect a three-phase doubly fed induction generator (DFIG) to a dc-microgrid. The proposed system uses a three-leg rectifier at each side of the stator windings, in an open-end winding configuration. Usually, these legs are composed of insulated gate bipolar transistors (IGBTs). To reduce the number of controlled switches and costs, one of the rectifiers has its IGBT switches replaced by diodes. The converters operating principles, pulsewidth modulation, power control, and zero-sequence current minimization strategies are discussed. The proposed system is compared with two conventional systems in terms of current harmonic distortion, torque ripple, and semiconductor losses. Simulations and experiments were also performed, showing steady-state and transient results for a 0.56-kW DFIG operating at constant torque. Finally, it was verified that the proposed system maintains balanced voltages and currents over the DFIG stator windings, with no significant torque oscillations.

The bond wires failure is one of the most common failure modes of the insulated gate bipolar transistor (IGBT) module, which will cause an increase in the overall ON-state voltage drop $V_{\mathrm {CE}}$ , and it is generally believed to not affect the junction-to-case thermal resistance $R_{\mathrm {th}jc}$ . The measured $V_{\mathrm {CE}}$ mainly consists of two parts: the voltage drop of the IGBT chip $V_{\mathrm {CE\_{}Chip}}$ and that of the bond wire $V_{\mathrm {CE\_{}wire}}$ ; the influence of bond wires failure on $V_{\mathrm {CE}}$ should be discussed and explained in two parts. However, these actual measurement parameters are not considered before. In this article, the impact mechanism of bond wires failure on electrothermal characteristics of the IGBT module is analyzed with the help of realistic simulation models and experiment verification. The results show that the bond wires failure only affects $V_{\mathrm {CE\_{}wire}}$ , and the impact on $V_{\mathrm {CE\_{}Chip}}$ is small, which can be ignored. Meanwhile, the increase in the virtual junction temperature is not caused by the increase in the power loss of the IGBT chip but by the increase in the current density of bond feet, which is caused by the decrease in the effective contact area. Besides, the measured $R_{\mathrm {th}jc}$ is not the intrinsic thermal resistance but slightly smaller than the intrinsic thermal resistance, and it decreases as the bond wires failure. Furthermore, the proposed mechanism can provide method guidance for the separation strategy of concurrent failure modes of IGBT modules only by monitoring the ON-state voltage drop.

This paper deals with the development of an electro-thermal model of an Insulated Gate Bipolar Transistor (IGBT) with a water-cooled heat pipe cooling system. Firstly, a thermal model of the heat pipe cooling system is proposed. Then, an electro-thermal model of the IGBT is developed to predict the junction temperature variations in transient operation. The thermal model of the IGBT is determined on the base of the thermal-capacitance lumped method. The electrical model of the IGBT is developed by considering the effect of the junction temperature on its static electrical parameters. Finally, the electro-thermal model is considered in a boost converter application. The model predictions show the effectiveness of the heat pipe cooling system for different commutation frequencies. It is proved that the heat pipe cooling system can keep the junction temperature of the IGBT at values allowing safe operation.

Insulated gate bipolar transistor (IGBT) modules are the most critical components of modular multilevel converters (MMCs). However, they are subjected to repetitive thermo-mechanical stress caused by thermal cycles on different materials, which can easily lead to failures in the solder layers. Moreover, when MMCs work at high power factor, the IGBT modules have severely uneven temperature distribution due to the inherent dc-bias in arm currents. Some chips are much hotter than others. These hot spots significantly reduce the lifetime of the whole module. This article proposes an optimized and low-cost air-cooling system dedicated to the application of MMC. Uniquely designed O-shaped heat pipes are embedded on the heatsink to add another thermal path without extra fans and fins. The unique shape and layout of heat pipes can minimize the hot spots temperature. The operating principle and power loss of MMC are analyzed first. Then, 3-D finite element (FE) simulation is performed in ANSYS 19.2. Nine modified air-cooling heatsinks with embedded heat pipes are proposed and compared. Finally, the optimal one and a conventional air-cooling heatsink are fabricated for experimental evaluation. The comparative experiment results show that the optimized cooling system is superior over the conventional one by 20% lower in the hot spot temperature.

Electric field and temperature are two of the most important factors affecting the reliability of IGBT devices. However, the actual effects of coupled electrical–thermal stress on the reliability of these devices have not been studied in detail. In this article, cross-experiments combining different types of reliability experiments, such as high-temperature gate bias, high-temperature storage stressing, and power cycling (PC), are carried out to study the degradation mechanisms in the IGBT devices under coupled electrical–thermal stress. The process of cross-experiments is discussed in detail and a large number of IGBT devices are used for experimental verification. The degradation parameters are monitored and the related mechanisms are discussed for two parts: chip and packaging. Based on the experimental results, a detailed trap formation hypothesis about gate leakage current is proposed. At last, it is qualitatively verified via a finite element model that high-temperature storage helps to release residual stress in bonding wires, and the influence of gate oxide degradation in the PC experiments is explained.

This article presents a method for monitoring the aging of insulate gate bipolar transistor (IGBT) module bond wires based on the spectrum characteristics of differential mode (DM) interference signals. The buck converter composed of IGBT modules is used as the device under test. The path of DM current in buck converter passes through the IGBT module, so the DM current is more suitable for monitoring the status of the module. The DM electromagnetic interference (EMI) in buck converter is mainly generated by the rapid decrease of the collector current, and the aging degree of bond wires is directly related to the DM EMI signal. The aging degree of bond wires inside IGBT module is monitored by the peak value of DM EMI signal in low frequency band. The experimental results show that the DM EMI amplitude of buck converter with aging IGBT module is larger than that of the buck converter with healthy IGBT module. The main advantage of the method proposed in this article is that it is independent of temperature and can realize the on-line accurate monitoring of the aging of the bond wires inside the IGBT module through the current probe under the actual working conditions.

Press pack insulated gate bipolar transistor (PP IGBT) is suitable for the hybrid high voltage direct current (HVdc) breaker to clear the fault current of the flexible HVdc transmission system with its advantages of double-side cooling, short-circuit failure mode, and easy to connect in series. However, it should have the ability to transmit the fault current, which is up to five or six times of its rated current, within several milliseconds depending on the distances between two stations without external cooling system. The junction temperature of PP IGBT will increase sharply and it is not possible to be measured during that situation. Therefore, the accurate prediction of junction temperature is extremely important for the packaging design of PP IGBT according to its working condition. In this article, an electro-thermo-mechanical multiphysics field-circuit coupling model of PP IGBT, which is coupled with the electrical, thermal, and mechanical fields, is proposed to predict the collector current, clamping force, and junction temperature. The 3-D mechanical model is decoupled with the 1-D electro-thermal Cauer network model to simplify this multiphysics model without reducing its accuracy. Both the normal and worst working conditions are analyzed through this multiphysics field-circuit model.

Currently, power semiconductors (IGBT, Thyristor, etc.) are used for the stability and high reliability of DC system operation. However, we have proposed a current limiting DC circuit breaker with superconducting winding to improve the stability of the DC system. This is superior in terms of fast cut-off speed and economy of power semiconductors, and is suitable for changes to the Point to Loads DC system that will be expanded in the future. A superconducting DC circuit breaker is a model in which a superconducting current limiter and a DC circuit breaker are combined. The superconducting fault current limiter uses a superconducting wire made of GdBCO material to limit the initial fault current to lower the current level of the fault current, and the DC circuit breaker blocks the reduced fault current from the superconducting fault current limiter by configuring a mechanical cutoff switch, passive elements L, C and SPD. In this paper, this superconducting DC circuit breaker model was designed and tested by giving two variables, and the operating characteristics were analyzed. The first is the superconducting wire connection method, and the second is the power supply voltage. In addition, the initial fault current, the time when the zero point of the fault current is generated, and the time when the shutdown is completed were compared and analyzed. As a result, it was confirmed that the helical type showed a higher current limiting rate than the spiral type, and the result of reaching a fast current zero point was confirmed.

In this article, the influence of gate loop inductance on the insulated-gate bipolar transistor (IGBT) junction temperature monitoring based on the transient peak gate current temperature-sensitive electrical parameter (TSEP) methods is investigated using the time-domain analysis, SPICE simulation, and experimental work. It is observed that the peak gate current decreases considerably with increasing gate loop inductance, which was not addressed by a previous work. An improved junction temperature estimation model is developed to address this issue and is experimentally validated over a wide range of gate loop inductances. Unlike the previously reported model calibrated for a fixed gate loop inductance, the new model can provide accurate junction temperature monitoring in any power converter based on the same IGBT with a wide range of gate loop inductance values. An error of less than 6.2 °C in IGBT junction temperature estimation is demonstrated even when the gate loop inductance varies by 247%.

Although multichip systems (MCS) are the standard solution for high-power converters, uneven losses and thermal distribution affect unequal lifetime consumption. Many solutions have been proposed to mitigate these effects; however, critical thermal deviations are still observed, leading to a reduction of the overall MCS reliability. Therefore, this work proposes a selective soft-switching (SS) approach, whereby the turn-off losses of the devices are manipulated to obtain thermal balancing and increase the reliability of MCSs. As a consequence, the high current per device reduces its turn-off time, thereby slightly increasing the MCS efficiency. In addition, a pretuning-based thermal balancing approach is presented, whereby the junction temperature ( $T_{j}$ ) of the devices are sensed via collector-emitter voltage ( $V_{\mathrm{\scriptscriptstyle CE}}$ ) only under reduced current conditions. To validate the proposed solutions, finite-elements modelling (FEM)-based simulation and experimental tests are conducted. Moreover, a case study demonstrates the capability of the selective SS to increase the reliability and reduce the energy consumption of MCS.

The information of junction temperature is crucial for the operational management of insulated-gate bipolar transistor (IGBT) modules. In practice, the junction temperature is typically estimated by using an electrothermal model. IGBT modules are subject to various aging processes during operation, some of which, e.g., substrate solder crack, change the thermal impedance of the IGBT module. However, few works in the literature have included the aging effect on the online thermal behavior modeling of IGBT modules. This article proposes an effective heat propagation path (EHPP)-based real-time adaptive thermal model for IGBT modules, where the EHPP is proposed to quantify the impact of substrate solder cracks on the heat propagation inside the IGBT modules. A straightforward relationship between substrate solder crack and the degree of nonuniformity of case temperature distribution is established. This relationship is then used to approximate the EHPP of the IGBT module in different substrate solder health conditions in real time using the measured nonuniformity of case temperature distribution. Based on the change of the EHPP, the parameters of a thermal equivalent circuit (TEC) model, e.g., an improved Cauer-type TEC, are adjusted online and in real time to track the thermal behavior changes of the IGBT modules caused by substrate solder cracks, leading to a real-time substrate-solder-aging-adaptive thermal model. The proposed real-time adaptive thermal model is validated by simulation studies and experimental tests for a commercial IGBT module.

The gate voltage overshoot during the turn-on transient in the trench gate U-shaped (TGU) channel silicon-on-insulator lateral insulated gate bipolar transistor (SOI-LIGBT) is investigated and novel structures are proposed for the first time with numerical simulation in this article. The TGU SOI-LIGBT features two U-shaped trench gates, G1 and G2, connected together. The U-shaped trench for G2 serves as a hole barrier trench. A large number of holes accumulate in the U-shaped region during the turn-on transient because of the U-shaped architecture and the hole-blocking effect of G2. The displacement current induced by the nonuniform distributed holes overcharges the gate and leads to high di / dt . In this article, the novel structures (Novel-1 and Novel-2) with G2 partially filled by the polysilicon are proposed for the improvement in gate voltage overshoot while keeping superior turn-on loss ( ${E}_{ \mathrm{ON}}$ ). The novel structures (Novel-1 and Novel-2) can suppress the hole accumulation and slow down the rising of the electric potential in the silicon region near the G2. The di / dt can be lowered and the displacement current that overcharges G2 can be effectively shielded. Compared with the conventional TGU structure, the di / dt of the Novel-2 are improved by 56.3% at the same ${E}_{ \mathrm{ON}}$ of 2.4 mJ/cm2.

An inverter or converter achieves the desired dc–ac or dc–dc conversion as required by electric and hybrid electric vehicles. This conversion is typically performed using semiconductor switches such as Insulated Gate Bipolar Transistors (IGBTs) modules consisting of transistors and diodes. Multiple transistors-diode pairs are integrated under a common copper base plate (also referred to as case). As power density increases, the heat dissipation of each device is influenced by other devices. The heat loss from semiconductor devices needs to be effectively dissipated to the ambient to maintain the temperature of IGBTs and diodes within acceptable limits (mentioned by the component manufacturer or based on the desired thermal margin in design). The over-temperature of the IGBT junction causes reliability issues resulting in solder fatigue and bond wire wear-out. The current work comprises predicting the temperature-dependent heat loss (electrothermal modeling) and thermal management techniques to dissipate these losses effectively to the ambient. An influence coefficient matrix is defined for liquid-cooled IGBT modules and used to estimate the die-to-die thermal influence. The IGBT module’s heat distribution and its effect on the die temperature are studied for dc-dc and dc–three phase ac conversion.

Frequency Loss Induced Quench (FLIQ) is an active protection system designed to generate heat from AC losses to uniformly and safely quench a superconducting coil. It drives an imbalance in the transport current between two or more sections of the magnet using the H-bridge design with Insulated Gate Bipolar Transistor (IGBT)s, whose gates are controlled based on the current feedback within its loop. This allows FLIQ to operate at resonance with the frequency of the load. The performance of FLIQ circuit was characterized using simulations to assess the relative effectiveness of the key parameters of voltage, frequency, and time. The results show that the voltage is the most effective parameter. It was shown that with the selection of appropriate values of the parameters, the FLIQ system released sufficient energy into the coil to quench it.

Junction temperature is a key parameter for the safe operation of power semiconductor devices in power electronic systems. However, it is difficult to forecast the accurate thermal stress of the device in field use. Consequently, engineers tend to use higher rated devices to maintain excessive margin, resulting in a higher cost. In this article, a transient 3-D thermal modeling method for insulated gate bipolar transistor (IGBT) modules is proposed to obtain accurate temperature distribution considering uneven power losses and cooling conditions. The analytical model of uneven switching energy losses among the parallel IGBT chips in modules is built according to the analysis of device simulation results. The effect of uneven cooling conditions on temperature distribution in IGBT modules is considered by thermal-fluid cosimulation. Furthermore, a hybrid simulation strategy is proposed to obtain the transient thermal behavior in three dimensions. Through appropriate interface design, the power loss model is connected with the finite element model to achieve field-circuit cosimulation with multiple time steps, which takes full consideration of the multiphysical coupling effects among power loss, temperature, and flow fields. Finally, the thermal stresses of IGBT modules under different operating conditions are forecast by the proposed method.

To accurately obtain the switching characteristics of insulated gate bipolar transistors (IGBT), this paper proposes an IGBT's transient analysis model (TAM) based on the finite state machine (FSM). Firstly, the IGBT switching process in the basic converter unit is segmented in the time domain, and the circuit equations among the variables are obtained based on Kirchhoff's law. Then, the switching mechanism and parameters of the IGBT are decoupled based on time segmentation, and clarifying state equations and the transition events for each stage. Subsequently, all the stages and events are modeled in an FSM, thus establishing the IGBT's TAM, and it was realized the Stateflow toolbox of Matlab/Simulink. Finally, some experiments were performed on IGBTs with different current and voltage. The results show that the TAM can accurately describe the switching characteristics of IGBT and is suitable for different voltage and current levels.

Insulated gate bipolar transistor (IGBT) collector current measurement based on the package parasitics between the power emitter ( E ) and the Kelvin emitter ( E′ ) is a lossless and real-time monitoring method. A step to improve accuracy is to precisely match the time constant ( Rf × Cf ) of the measurement circuit against the package parasitics ( LEE′ / REE′ ). This article proposes an automated time constant matching method to realize the tuning of Rf × Cf to LEE′ / REE′ , and a detection circuit to continuously measure the IGBT collector current using the package parasitics. In the proposed method, the Miller plateau voltage is first sampled, and a polynomial curve fit is carried out to determine the fitting parameters associated with the IGBT collector current ( IC ). A programmable resistor Rf is then adjusted automatically based on the step response of the readout voltage until the time constant is matched. A ratio between the readout voltage and a known IC is then calculated based on the Miller plateau voltage. The proposed system is verified using a field-programmable gate array controller and discrete components. Experimental results confirmed the functionality of the proposed method, showing that the readout voltage versus IC relationship has good agreement in the range of 0–165 A, with less than 3% error. The proposed method can also be used for overcurrent protection with a detection time of less than 0.7 μ s.

In this article, an online condition monitoring (CM) method is proposed for the bond wire degradation of insulated-gate bipolar transistor (IGBT) modules in a single-phase or three-phase three-level neutral-point-clamped (3LNPC) dc–ac, ac–dc converter. The proposed method has the ability to detect the whole IGBTs in a 3LNPC converter, based on finding the idle on-state IGBTs under the specific load current direction and switching sequence of a leg. The detection time is short (0.2 ms) and the influence of online CM on load current can be completely neglected as long as the insertion areas for CM test are chosen reasonably. Meanwhile, an advanced bond wire CM module is designed to conduct the CM test. This module can generate and inject the current pulse trains into IGBT modules, with the high current for CM test and low current for temperature-sensitive electrical parameter measurement, and sample the collector–emitter on-state voltage ( V CE $\_$ ON) stably and precisely. Finally, the experimental work was carried out to verify the effectiveness of the proposed method and the practicality of the developed CM module.

This article presents a capacitor-switching semi-full-bridge (CS-SFB) submodule (SM) using Si-IGBT and SiC-MOSFET for a modular multilevel converter (MMC). Compared with the conventional hybrid half-/full-bridge MMC, the CS-SFB MMC has the same dc fault ride-through capability and lower power losses. The conduction loss reduces due to the current sharing phenomenon between Si-IGBTs and SiC-MOSFETs. The switching loss reduces in virtue of the fast recovery characteristic of SiC-diode. The derivation process and working principle of the proposed SM are first introduced. Then, the power loss models are established in the switch, SM, and MMC system levels, respectively. Afterward, the piecewise calculation and simulation results reveal the low-power-loss characteristics of the proposed SM and MMC. Finally, these features are verified by experimental results acquired from a downscaled MMC prototype with Si-IGBTs and SiC-MOSFETs.

In this article, pressureless sintering of nanosilver paste is proposed to enhance the reliability of wire-bonds with SiC chips by both alleviating thermomechanical stresses and enhancing thermal coupling of bonding wires and chips. A multichip 1200-V/300-A SiC hybrid module with six Si IGBTs and 12 SiC Schottky barrier diodes (SBDs) is demonstrated. The lifetime of the wire-bonds with the SiC SBD bonded by the pressureless sintered nanosilver is ~27.9% longer than that by the high-temperature solder under power cycling with constant temperature swing. The lifetime of the wire-bonds with the IGBT also bonded by the pressureless sintered nanosilver is ~46.2% longer than that by the high-temperature solder under power cycling with constant conduction current. Furthermore, not only the cost of 1700-V SiC SBDs is quite similar to that of 1200-V ones but also the leakage current of the 1200-V/300-A SiC hybrid module can be reduced greatly using 1700-V SiC SBDs as free-wheeling diodes instead of the regular 1200-V ones. Considering the much larger leakage current of a SiC SBD compared with that of a Si p-i-n diode. It is feasible to use a SiC SBD with higher blocking voltage to reduce the significant leakage current of the free-wheeling SBD with almost no cost increase.