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Strain relaxation is studied in strained silicon directly on insulator (SSDOI) substrates patterned with nanoscale features. Using interference lithography, biaxially strained SSDOI substrates with 30 nm thick strained Si on insulator films were patterned into grating structures with 90 nm wide stripes, and arrays of 80 nm×170 nm pillars. The strain profiles of these patterned structures were examined by ultraviolet Raman spectroscopy. Raman analysis of the SSDOI gratings indicates strain relaxation in the 90 nm wide stripes, compared to the strain measured in unpatterned portions of the SSDOI wafer. Three-dimensional finite-element modeling of the stress distributions in the grading structures predicts that 95% of the strain is maintained in the direction along the length of the stripes. These simulations are used to decouple the strain components along the width and length of the SSDOI grating structure, inferred from Raman measurements. The results are consistent with substantial stress relaxation across the width of the stripes and very little stress relaxation along the length of the stripes. [ABSTRACT FROM AUTHOR]

We have performed a quantitative analysis of epitaxial quality and arsenic diffusion in ion implanted polycrystalline silicon (polysilicon) layers on <100> Si, and find a clear advantage for the use of high-temperature rapid thermal annealing (RTA) in the 10-s regime to induce intentional, complete epitaxial alignment. The RTA-induced alignment kinetics and associated arsenic diffusion were studied in the 1050–1150 °C temperature range for arsenic doping concentrations between 1×1020 and 1×1021 cm-3, and were characterized by Rutherford backscattering, ion channeling, and cross-sectional transmission electron microscopy. The information about the relationship between arsenic diffusion, arsenic concentration, and epitaxial quality resulting from a given RTA cycle will be useful for optimizing bipolar transistors with realigned polysilicon emitter contacts. [ABSTRACT FROM AUTHOR]

Si1-xGex and Si layers have been grown selectively in the exposed Si regions on oxide-patterned <100> oriented Si wafers using the chemical vapor deposition technique limited reaction processing. Misfit dislocation spacings at the heterointerface were measured using plan-view transmission electron microscopy in conjunction with a large-area thinning technique which allows for examination of 100–150 μm diameter areas. The dislocation density is reduced by at least a factor of 20 for small areas (lateral dimensions: tens of microns) bounded by oxide isolation when compared to adjacent large areas (millimeters) which are uninterrupted by the patterned oxide. The ability to selectively grow Si1-xGex on patterned wafers and the area-dependent reduction in dislocation density in as-grown films may be important considerations for future device applications using Si1-xGex strained layers. [ABSTRACT FROM AUTHOR]

The thermal stability of Si/500-Å-thick Si0.77Ge0.23 bilayers grown on Si by limited reaction processing is studied as a function of Si capping layer thickness. After annealing for 4 min at 850 °C, misfit dislocation spacings increase monotonically with cap thickness from 0.5 μm for an uncapped film to greater than 50 μm for a layer with a 500-Å-thick cap. Thus, an epitaxial Si cap of sufficient thickness prevents significant misfit dislocation formation during this anneal. Experimental observations are reported which indicate that the Si cap enhances thermal stability by inhibiting both dislocation nucleation and propagation. These results are very encouraging since they suggest that high-temperature processing of Si/Si1-xGex device structures may be possible without significant misfit dislocation formation. [ABSTRACT FROM AUTHOR]

Presents a correction of an error made in the article on the epitaxial alignment of arsenic-implanted polycrystalline semiconductor silicon films.

Metal–oxide–semiconductor (MOS) capacitors were fabricated on in situ doped n- and p-type Si[sub 1-y]C[sub y]/Si heterostructures grown on Si substrates by chemical vapor deposition. Strained Si[sub 1-y]C[sub y] epitaxial layers with substitutional carbon contents up to 1.6% were studied. High frequency and quasistatic capacitance–voltage (C–V) measurements exhibit well-behaved MOS characteristics, indicating high electronic material quality. Band alignments were extracted from MOS C–V measurements and one-dimensional device simulations performed over a range of temperatures. The conduction band energy of strained Si[sub 1-y]C[sub y] is lower than that of Si by approximately 65 meV for 1 at. % carbon, while the valence band shows negligible offset to Si valence band. © 1998 American Institute of Physics. [ABSTRACT FROM AUTHOR]