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185 results on '"HELY, DAVID"'

51. Identification temps réel d'un tag THID bas coût dans le domaine THz

Author

Bonnefoy, Florent, Bernier, Maxime, Garet, Frédéric, maher, hamdi, Perret, Etienne, Barbot, Nicolas, Siragusa, Romain, Hely, David, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Laboratoire de Conception et d'Intégration des Systèmes (LCIS), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])

Subjects
[SPI]Engineering Sciences [physics]
Abstract

National audience; Grâce à l'utilisation d'un spectromètre THz commercial, nous montrons que l'identification temp réel de tags bas coût dans le domaine térahertz (THz) est désormais possible. Ces tags sont conçus autour d'un empilement périodique de couches diélectriques, sans élément métallique. Ils constituent donc un codage en volume qui peut être incorporé à l'objet à identifier : il est difficile à localiser et à identifier et donc à contrefaire. Nous montrons que la lecture de l'information contenue dans le tag peut être effectuée en quelques dizaines de millisecondes, tout en conservant une fiabilité de lecture de l'identifiant binaire meilleure que 99%.

Published
2019

52. Développement d'une plateforme RF flexible et reconfigurable basée sur un FPGA

Author

Ahmed, Mosabbah Mushir, Perret, Etienne, Siragusa, Romain, Barbot, Nicolas, Hely, David, Bernier, Maxime, Garet, Frédéric, Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and Bernier, Maxime

Subjects
[SPI]Engineering Sciences [physics], [SPI] Engineering Sciences [physics], ComputingMilieux_MISCELLANEOUS
Abstract

National audience

Published
2019

53. Diffraction grating tags structures dedicated to authentication in the THz

Author

Bonnefoy, Florent, Bernier, Maxime, Garet, Frédéric, Barbot, Nicolas, Hely, David, Siragusa, Romain, Perret, Etienne, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and Perret, Etienne

Subjects
[SPI]Engineering Sciences [physics], [SPI.ELEC]Engineering Sciences [physics]/Electromagnetism, [SPI] Engineering Sciences [physics], [SPI.ELEC] Engineering Sciences [physics]/Electromagnetism
Abstract

International audience; In this paper, we report on the statistical analysis of the THz signatures of identically realized diffraction grating-based tags by repeatable measurements. The correlation between the different signatures is analysed and the global error rates are evaluated from the statistical distributions and we show that error rates of 2.75% can be reached.

Published
2019

54. Hardware Trojan Detection Using an Advised Genetic Algorithm Based Logic Testing

Author

Hely, David, Nourian, M., Fazeli, M., Hély, D., Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Conception et Test de SYStèmes embarqués (CTSYS), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])

Subjects
Fitness function, business.industry, Computer science, 02 engineering and technology, Integrated circuit, 020202 computer hardware & architecture, law.invention, Controllability, Reduction (complexity), Hardware Trojan, law, Embedded system, Genetic algorithm, 0202 electrical engineering, electronic engineering, information engineering, Key (cryptography), 020201 artificial intelligence & image processing, Observability, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, ComputingMilieux_MISCELLANEOUS
Abstract

Today, outsourced manufacturing of integrated circuit designs are prone to a range of malicious modifications of the circuitry called Hardware Trojans. HTs can alter the functionality of a circuit, leak secret information and initiate other possible malicious actions. HTs are activated in a very rare condition known by an intruder. Therefore, a group of HT detection methods tries to activate the HT circuitry by crafting test vectors. In this paper, we propose a logic testing based HT detection method using an advised genetic algorithm which creates effective test vectors, the so-called TRIAGE (hardware TR ojan detectI on using an A dvised G enetic algorithm based logic tE sting). The key contribution of this paper is to present a proper fitness function for the genetic algorithm providing better evaluation of the test vectors. The controllability, observability and transition probability factors of rare nodes have been considered in the fitness function. Simulation results indicate 80% reduction in generation time for test sets (on average) as compared to the previous work. On the other hand, reduced generation time for test vectors has been associated with an increase in trigger coverage. The coverage of the TRIAGE method for very hard to trigger Trojans increases by about 23% due to high efficiency of the proposed fitness function for the genetic algorithm.

Published
2018

65. Sensitivity to Laser Fault Injection: CMOS FD-SOI vs. CMOS Bulk

Author

Dutertre, Jean-Max, primary, Beroulle, Vincent, additional, Candelier, Philippe, additional, De Castro, Stephan, additional, Faber, Louis-Barthelemy, additional, Flottes, Marie-Lise, additional, Gendrier, Philippe, additional, Hely, David, additional, Leveugle, Regis, additional, Maistri, Paolo, additional, Di Natale, Giorgio, additional, Papadimitriou, Athanasios, additional, and Rouzeyre, Bruno, additional

Published
2019
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66. Authentication in the THz domain: a new tool to fight couterfeiting

Author

Bonnefoy, Florent, Hamdi, Maher, Bernier, Maxime, Barbot, Nicolas, Siragusa, Romain, Hely, David, Perret, Etienne, Garet, Frédéric, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and Garet, Frédéric

Subjects
[SPI]Engineering Sciences [physics], [SPI] Engineering Sciences [physics], Physics::Optics
Abstract

International audience; Introduction: In the present work, we propose a new approach based on the use of the spectral signature of diffraction gratings engraved on one side of smart cards to be authenticated. The etched substrate acts as a dielectric waveguide associated to a 1D diffraction grating [1]. When the coupling conditions are verified, the reflected and transmitted THz spectra exhibit extinction lines (m-lines) that can be used as a broadband and rich spectral signature. For a given incident angle, the number of m-lines, their frequency positions and depth depend on the geometrical dimensions of the structure [2]. Hence, a unique etching scheme leads to a unique spectral signature. We first focused on simulations and experimental validation of the proposed authentication method that we would present to the 9 th THz days.

Published
2017

67. SafeRFID Project: A complete Framework for the Improvement of UHF RFID System Dependability

Author

Beroulle, Vincent, Aktouf, Oum-El-Kheir, Hely, David, Beroulle, Vincent, Jeunes Chercheuses et Jeunes Chercheurs - Amélioration de la sûreté de fonctionnement des Systèmes RFID - - SAFERFID2010 - ANR-10-JCJC-0305 - JCJC - VALID, Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and ANR-10-JCJC-0305,SAFERFID,Amélioration de la sûreté de fonctionnement des Systèmes RFID(2010)

Subjects
[SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract

International audience

Published
2017

69. Laser Fault Injection at the CMOS 28 nm Technology Node: an Analysis of the Fault Model

Author

Dutertre, Jean-Max, primary, Beroulle, Vincent, additional, Candelier, Philippe, additional, De Castro, Stephan, additional, Faber, Louis-Barthelemy, additional, Flottes, Marie-Lise, additional, Gendrier, Philippe, additional, Hely, David, additional, Leveugle, Regis, additional, Maistri, Paolo, additional, Di Natale, Giorgio, additional, Papadimitriou, Athanasios, additional, and Rouzeyre, Bruno, additional

Published
2018
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71. The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks

Author

Dutertre, Jean-Max, primary, Beroulle, Vincent, additional, Candelier, Philippe, additional, Faber, Louis-Barthelemy, additional, Flottes, Marie-Lise, additional, Gendrier, Philippe, additional, Hely, David, additional, Leveugle, Regis, additional, Maistri, Paolo, additional, Natale, Giorgio Di, additional, Papadimitriou, Athanasios, additional, and Rouzeyre, Bruno, additional

Published
2018
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78. Reusing Logic Masking to Facilitate Hardware Trojan Detection

Author

Nejat, Arash, Hely, David, and Beroulle, Vincent

Subjects
Computer networks--Security measures, Sistemes integrats -- Congressos, Seguretat informàtica -- Congressos, Hardware_INTEGRATEDCIRCUITS, Enginyeria electrònica [Àrees temàtiques de la UPC], ComputingMilieux_LEGALASPECTSOFCOMPUTING, Embedded computer systems--Congresses, Integrated circuits, Hardware_PERFORMANCEANDRELIABILITY, Circuits integrats, Hardware_LOGICDESIGN
Abstract

Hardware Trojan (HT) and Integrated Circuit (IC)/ Intellectual Property (IP) piracy are important threats which may happen in untrusted fabrication foundries. Modifying structurally the ICs/IPs design to counter the HT threats has been proposed, and it is known as Design-For-Hardware-Trust (DFHT). DFHT methods are used in order to facilitate HT detection methods. In addition, logic masking methods modify the IPs/ICs design to harden them against the IP/IC piracy. These methods modify a circuit such that it does not work correctly without applying the correct key. In this paper, we propose DFHT methods leveraging logic masking approach.

Published
2016

79. Authentication of IC based on Electromagnetic Signature

Author

Ahmed, Mosabbah Mushir, Hely, David, Siragusa, Romain, Barbot, Nicolas, Perret, Etienne, Bernier, Maxime, Garet, Frédéric, Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and Garet, Frédéric

Subjects
[SPI]Engineering Sciences [physics], [SPI] Engineering Sciences [physics]
Abstract

International audience; IC Counterfeiting is becoming serious issue. The approach discussed here is to use Electromagnetic (EM) input to an IC and measure its EM input output response. The idea is to extract a signature from EM response which should be unique to one IC. The main purpose of this work is to show that it is possible to authenticate electronic chips from a non-intrusive method, based on the use of RF waves. IC authentication can be performed using Physical Unclonable Function (PUF). PUF are based on process variation inherent to semiconductor fabrication process. EM based authentication is also based on the same principle. Nevertheless, unlike PUF such a method does not need dedicated circuitry and thus may have lower cost of implementation and may be easier to industrialize. This work first focuses on FPGA which are a common target of counterfeiting. We first prove that FPGAs are sensitive to EM excitations and find the optimum configuration using a lightweight marker not as complex as PUF to optimize the sensitivity to EM excitation. Finally, a post processing is performed on the EM measurement to get the FPGA signature which is later used for authentication. The post-processing operations are being developed in order to deal with aging effects and other measurements issues commonly seen with RF measurement.

Published
2016

80. Key Reconciliation Protocols: an Alternative for Lightweight Authentication of Integrated Circuits

Author

Colombier, Brice, Bossuet, Lilian, Hely, David, Fischer, Viktor, Laboratoire Hubert Curien [Saint Etienne] (LHC), Institut d'Optique Graduate School (IOGS)-Université Jean Monnet [Saint-Étienne] (UJM)-Centre National de la Recherche Scientifique (CNRS), Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and ANR-13-JS03-0003,SALWARE,Conception de matériel salutaire pour lutter contre la contrefaçon et le vol de circuits intégrés(2013)

Subjects
[INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], ComputingMilieux_MISCELLANEOUS
Abstract

International audience

Published
2016

81. Design and Validation of a Secured Digital Ultralight 14443-Type A RFID tag with a FPGA Platform

Author

NAIJA, Yassine, Beroulle, Vincent, Hely, David, Machhout, Mohsen, Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Laboratoire de Microélectronique et Instrumentations [Monastir], Faculté des Sciences de Monastir (FSM), Université de Monastir - University of Monastir (UM)-Université de Monastir - University of Monastir (UM), and Beroulle, Vincent

Subjects
[SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract

International audience

Published
2016

88. Evaluating and Enhancing the Security of Analog and Mixed IPs in Complex System On Chip

Author

Boher, Noémie, Hely, David, Beroulle, Vincent, Gomina, Kamil, Damiens, Joël, Candelier, Philippe, Conception et Test de SYStèmes embarqués (CTSYS), Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Université Pierre Mendès France - Grenoble 2 (UPMF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Université Pierre Mendès France - Grenoble 2 (UPMF), Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Université Pierre Mendès France - Grenoble 2 (UPMF), STMicroelectronics [Crolles] (ST-CROLLES), and Hely, David

Subjects
[INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], Fault attack, secure IC, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, mixed signal sytem on chip, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR], [INFO.INFO-ES] Computer Science [cs]/Embedded Systems, Security evaluation
Published
2013

89. Triggering Hardware Trojans in EPC C1G2 RFID Tags

Author

Hely, David, Beroulle, Vincent, Omar, Abdelmalek, Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Université Pierre Mendès France - Grenoble 2 (UPMF), Conception et Test de SYStèmes embarqués (CTSYS), Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Université Pierre Mendès France - Grenoble 2 (UPMF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Université Pierre Mendès France - Grenoble 2 (UPMF), and Hely, David

Subjects
RFID, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], Hardware Trojans, ComputerSystemsOrganization_SPECIAL-PURPOSEANDAPPLICATION-BASEDSYSTEMS, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR], [INFO.INFO-ES] Computer Science [cs]/Embedded Systems
Abstract

This paper addresses the Hardware Trojan issues in passive EPC C1G2 RFID Tags. We propose in this paper to study the insertion of malicious circuit in EPC GEN2 RFID tags. The description and the implementation of several different Hardware Trojans are first discussed. Then they are all evaluated in an EPC GEN2 environment using a dedicated FPGA based tag emulator. The evaluation focuses on criteria such as Trojan detection, design cost and EPC gen2 compliance.

Published
2013

99. SALWARE: Salutary Hardware to design Trusted IC

Author

Bossuet, Lilian, Hely, David, Laboratoire Hubert Curien [Saint Etienne] (LHC), Institut d'Optique Graduate School (IOGS)-Université Jean Monnet [Saint-Étienne] (UJM)-Centre National de la Recherche Scientifique (CNRS), Laboratoire de Conception et d'Intégration des Systèmes (LCIS), and Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Université Pierre Mendès France - Grenoble 2 (UPMF)

Subjects
IP protection, IP watermarking, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], salutary hardware, ComputingMilieux_LEGALASPECTSOFCOMPUTING, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, IC counterfeiting
Abstract

Fabless semiconductor industries are facing the rise of design costs of integrated circuits. This rise is link to the technology change and the complexity increasing. It follows that integrated circuits have become targets of counterfeiting and theft. The SALWARE project aims to study (theoretically and experimentally) salutary hardware design in order to fight against theft, illegal cloning and counterfeiting of integrated circuits. Salutary hardware means an embedded hardware system, hardly detectable / circumvented, inserted in an integrated circuit or a virtual component (Intellectual Property), used to provide intellectual property information (eg watermarking or hardware license) and / or to remotely activate the circuit or IP after manufacture and during use.

Published
2013

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