64 results on '"Gai, Weixin"'
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52. Digitally tuned degeneration resistance to improve linearity of boost factors for analogue equalisers
53. Power‐efficient pre‐emphasis method for transmitters with LVDS drivers
54. A 5.4 GHZ All-Digital Phase-Locked Loop with a wide output swing and high-linearity DAC
55. Deeper SSC estimator used as CDR
56. A 4-Channel 1.25–10.3 Gb/s Backplane Transceiver Macro With 35 dB Equalizer and Sign-Based Zero-Forcing Adaptive Control
57. A 4-Channel 3.1/10.3Gb/s Transceiver Macro with a Pattern-Tolerant Adaptive Equalizer
58. Design Consideration of 6.25 Gbps Signaling for High-Performance Server
59. A 2.7-GHz digitally-controlled ring oscillator with supply sensitivity of 0.0014%-fDCO/1%-VDD using digital current-regulated tuning.
60. A novel frequency search algorithm to achieve fast locking without phase tracking in ADPLL.
61. SSC tracking analysis and a deeper-SSC estimator.
62. Teaching Practice in Circuits and Systems Courses at Peking University: A Curriculum and Pedagogical Perspective.
63. Quadratic-translinear CMOS multiplier-divider circuit
64. Area-efficient recursive degree computationless modified Euclid's architecture for Reed-Solomon Decoder.
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