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A new millimeter-wave (mm-wave) fully-integrated 0.18- $\mu \text{m}$ BiCMOS frequency division duplex (FDD) transmit–receive (T/R) front-end module with internal power amplifier (PA) and low noise amplifier (LNA) is reported. It employs an active circuit to cancel the transmitter (TX) signal leaking into the receiver (RX). The T/R module provides 43.6 dB isolation between the PA output and LNA input at 29 GHz and 9.5 dB average noise figure (NF) over 27–29 GHz on the entire RX path. At 29 GHz, the T/R module has 13.8 and 10.6 dB gain on the RX and TX path, respectively. A design methodology is also presented for maximum isolation and optimum NF. It occupies a small area of 2 mm2. [ABSTRACT FROM AUTHOR]

This article proposes and presents an innovative approach to realizing the concurrent dual-band transmission with only a single front-end and local oscillator at radio frequency (RF). Fundamentally, the proposed concurrent dual-band front-end is based on the conventional multiport interferometric architecture for single-band operation. Nevertheless, the conventional variable loads are replaced by diode networks with IF input signals to produce the RF signals at their designated center frequencies. Furthermore, due to the linear characteristics of a multiport network, the signals with different data contents will be mixed into both RF channels. To this end, an inverse matrix operation is applied to reversely convert the original data streams before the modulations of IF input signals. As a result, the two original data streams can be effectively modulated into specific RF channels (for transmission) with minimal interchannel interferences based on this configuration. In addition to the theoretical analyses, this innovative concurrent dual-band transmitting front-end has been investigated and verified with $M$ -quadrature amplitude modulation (QAM) signals in simulations and experiments. All outcomes demonstrate excellent performances in concurrent dual-band transmission with significant reductions in both size and biasing power. [ABSTRACT FROM AUTHOR]

The beginning of an innovation process, also known as “front-end of innovation” (FEI), counts as an essential contributor to the successful development of new products and for their market appeal. Nevertheless, while helpful procedures and techniques for developing new products are well-known and widely applied, FEI is still an understudied area, and models for managing it are not yet commonly used in technology-oriented companies. FEI, also known as "fuzzy front end", can even be "fuzzier" in not-for-profit research centers. That is because the focus of these centers is advancing of scientific knowledge, rather than commercializing the results of those activities. This study summarizes the insights from a literature review on the topic of “project portfolio management” (PPM) in relation to innovation and, more specifically, with FEI and its components of ideation, innovation management, innovation strategy, foresight, and incremental or radical innovation. The authors selected and reviewed content from 170 papers published in SCOPUS prior to February 2019. The discussion uses a theoretical framework called "Front-End of Innovation Integrative Ontology (FEI2O)" to assist in framing the discussion.

A monolithic pixel sensor with high spatial granularity (35 × 40 μm2) is presented, aiming at thermal neutron detection and imaging. The device is made using the CMOS SOIPIX technology, with Deep Reactive-Ion Etching post-processing on the backside to obtain high aspect-ratio cavities that will be filled with neutron converters. This is the first monolithic 3D sensor ever reported. Owing to the microstructured backside, a neutron detection efficiency up to 30% can be achieved with a 10B converter, as estimated by the Geant4 simulations. Each pixel includes circuitry that allows a large dynamic range and energy discrimination and charge-sharing information between neighboring pixels, with a power dissipation of 10 µW per pixel at 1.8 V power supply. The initial results from the experimental characterization of a first test-chip prototype (array of 25 × 25 pixels) in the laboratory are also reported, dealing with functional tests using alpha particles with energy compatible with the reaction products of neutrons with the converter materials, which validate the device design.

This paper presents a front-end integrated circuit for ultrasound (US) harmonic imaging, interfacing to a one-dimensional capacitive micromachined ultrasonic transducer (CMUT). It contains a complete ultrasound receiving chain, from analog front-end (AFE) to gigabit/s data link. A two-stage self-biased inverter-based transimpedance amplifier (TIA) is proposed in this work to improve tradeoffs between power, noise, and linearity at the first stage. To improve harmonic imaging performance, the design is further equipped with a 4 $^\text {th}$ -order highly programmable bandpass filter, which has a tunable bandwidth from 2 MHz to 15 MHz. An 8 b 80 MS/s SAR ADC digitizes the signal, which is further encoded and serialized into an LVDS data link, enabling a reduction in the number of output cables for future systems with multiple ADCs. The design is realized in a 40 nm CMOS technology. Electrical measurements show it consumes 2.9 mW for the AFE and 2.1 mW for the ADC and digital blocks. Its overall dynamic range varies from 61 dB to 69 dB, depending on the reception bandwidth. The imaging capability of this design is further demonstrated in a US transmission and reception imaging system. The acoustic measurements prove successful ultrasound harmonic acquisition, where the on-chip bandpass filter can improve the lateral resolution by more than 30%. [ABSTRACT FROM AUTHOR]

The Front-End process plays an essential role in deriving infrastructure megaprojects' performance. However, Front-End issues often negatively impact the process, hindering the value of infrastructure for society. This paper aims to systemise knowledge and understanding of the Front-End of infrastructure megaprojects, the main Front-End issues, and remedies for managing them. The paper leverages a Systematic Literature Review to address four research questions: What definition can appropriately describe the Front-End of infrastructure megaprojects? What are the issues at the Front-End of infrastructure megaprojects? What are the remedies for managing the issues at the Front-End of infrastructure megaprojects? What are the connections between Front-End issues and the remedies for managing them? Following thematic analysis, iterative coding and group discussions, the paper develops a definition for the Front-End of infrastructure megaprojects based on five characteristics, identifies 44 Front-End issues, and connects these issues to six remedies through 17 links.

This work is focused on the design and the experimental characterization of an analog channel developed for the readout of lithium-drifted silicon detectors of the General AntiParticle Spectrometer (GAPS) experiment aimed at the search for dark matter. The instrument is designed for the identification of antideuteron particles from cosmic rays during an Antarctic balloon mission scheduled for late 2022. A low-noise analog front-end, featuring a dynamic signal compression to comply with the wide input range, has been designed in commercial 180-nm CMOS technology. The channel was fabricated in 2018 and is the first building block toward the development of a multichannel readout ASIC. The article will provide a description of the design criteria, the architecture of the channel, and a summary of the results of the experimental characterization. [ABSTRACT FROM AUTHOR]

A time-division duplex (TDD) transmit/receive (T/R) millimeter-wave (mm-wave) front-end in 0.13- $\mu \text{m}$ SiGe BiCMOS for fifth generation (5G) is presented. The front-end is composed of a power amplifier (PA), a low noise amplifier (LNA), and a single-pole double-throw (SPDT) switch. At mm-wave bands, the traditional SPDT switch limits the output power of the front-end in transmit mode. In this article, an asymmetric SPDT switch is proposed with high-power-handling capability (simulated OP $_{\mathrm {1\,dB}} > 28$ dBm), low insertion loss, and compact structure at 24–30 GHz. A balanced architecture is used to implement a high gain and high linearity PA with excellent input/output return losses and load-variation insensitivity. The effect of the feedback capacitor in the base of the cascode stage has been analyzed. The standalone PA achieves OP $_{\mathrm {1\,dB}}$ /peak $\text {PAE} > 16.9$ dBm/18.7% across 24–30 GHz and the OP $_{\mathrm {1\,dB}}$ /peak PAE still exceeds >15.9 dBm/16.3% including the switch loss and compression. 5G NR FR2 64-QAM modulation tests demonstrate the high linearity of the balanced PA. At 28 GHz, the standalone PA shows the EVM of −29.93 dB/−26.06 dB with an average output power ($P_{\mathrm {avg}}$) of 10.15 dBm/12.16 dBm. The front-end in transmit mode shows the EVM of −29.63 dB/−26.02 dB with an average output power of 7.76 dBm/9.59 dBm. A wideband LNA is designed and exhibits a measured gain of 26 dB with a 3-dB bandwidth of 19–35 GHz, a noise figure (NF) < 5.3 dB at 24–30 GHz including the switch loss. The proposed front-end achieves high linearity in transmit mode and low NF in receive mode. [ABSTRACT FROM AUTHOR]

In this study, we propose a miniaturized Ka-band transceiver module with a microstrip-to-waveguide transition structure that can be applied to high-capacity wireless radio. We apply a probe-shaped transition structure with the vertical structure of a substrate and waveguide that can mount a filter on top of a transceiver module. Measurement results of the fabricated transition structure revealed an insertion loss of 0.67 dB or less and a return loss of −14.1dB or more in the frequency range of 28～30 GHz. Measurement results of the transceiver module when the transition structure was applied revealed a maximum output of 2 W, a transmission gain of 35 dB, a gain of 20 dB, and a return-loss performance of less than −10 dB. [ABSTRACT FROM AUTHOR]

Стаття містить такі розділи: вступ, результати дослідження, висновки та перспективи подальших досліджень. У вступі розглянуто проблему щодо сучасних тенденцій розробки веб-сторінок, здійснено аналіз останніх досліджень та публікацій, сформульовано мету статті. У другому розділі статті висвітлено основні кроки, яких варто дотримуватися при розробці веб-сайтів, а саме: збір матеріалів для розробки веб-сайту (технічне завдання); розбиття технічного завдання на компоненти; розробка дизайну веб-сайту; розробка веб-сайту (front-end та back-end) по компонентам; тестування веб-сайту по компонентам; розміщення веб-сайту в мережі. Описано основні складові front-end розробки. Здійснено детальний огляд текстового редактора Sublime Text, як одного з найпопулярніших текстових редакторів з широким набором зручних інструментів для виділення, маркування та обробки текстових фрагментів коду. Оскільки для сучасних розробників плагін є невід’ємною частину інструментальних засобів, то в статті розглянуто дане поняття, а також описано найпопулярніші плагіни для Sublime Text: Package Control, JavaScript & NodeJS Snippets, Emmet, Advanced New File, Git, GitGutter, Side Bar Enhancements, ColorPicker, Placeholders, DocBlockr, SublimeCodeIntel, Minify, Sublime Linter, Color Highlighter. Наведено приклад розробки елементарного веб-сайту з метою демонстрації використання описаних плагінів, який складається з таких розділів: шапка; домашня сторінка; про нас; контакти; підвал. Продемонстровано використання інтерактивного компоненту «карусель». Розглянуто нюанси використання фреймворків та їх компонентів таких, як CSS-Framework та Bootstrap. У результаті проведеного дослідження сформовано чіткий алгоритм розробки елементарного веб-сайту та описано методи та засоби, які можуть бути використані при цьому. У висновках сказано про перспективи розвитку технологій по створенню якісних веб-сайтів.

In this study, we propose an approach for the design and satisfy the requirements of the fabrication of a reliable and stable high-frequency downconverter for the millimeter-wave (Ka band) and detail the contents of the approach. We design and fabricate a stable downconverter with a low noise figure, flat gain characteristics, and multi-channel characteristics suitable for millimeter-wave bands. The method uses the chip-and-wire process for the assembly and operation of a bare MMIC device into the RF path. To compensate for the mismatch among the many components used in the module, W/G transition, an image rejection mixer, a switch, and an amplifier suitable for millimeter-wave frequency characteristics are designed and applied to the downconverter. To reject the spurious signals generated from the complex local oscillation signals, the downconverter is designed to not affect the RF path. In the Ka-band downconverter, the gain is measured from 41.89 dB to 42.83 dB at 33–35 GHz with flatness of about 0.94 dB. The measured value of the noise figure at CH1 is 4.936 dB with a maximum value in the 0.75–1.25 GHz intermediate frequency. The third intermodulation measurement result is 61.83 dBc under a −50 dBm input power and above gain, and the switching to select a channel takes about 622 μs.

The Mu2e experiment at Fermi National Accelerator Laboratory will search for the charged-lepton flavour-violating neutrinoless conversion of negative muons into electrons in the Coulomb field of an Al nucleus. The conversion electron with a monoenergetic 104.967 MeV signature will be identified by a complementary measurement carried out by a high-resolution tracker and an electromagnetic calorimeter, improving by four orders of magnitude the current single-event sensitivity. The calorimeter—composed of 1348 pure CsI crystals arranged in two annular disks—has a high granularity, 10% energy resolution and 500 ps timing resolution for 100 MeV electrons. The readout, based on large-area UV-extended SiPMs, features a fully custom readout chain, from the analogue front-end electronics to the digitisation boards. The readout electronics design was validated for operation in vacuum and under magnetic fields. An extensive radiation hardness certification campaign certified the FEE design for doses up to 100 krad and 1012 n1MeVeq/cm2 and for single-event effects. A final vertical slice test on the final readout chain was carried out with cosmic rays on a large-scale calorimeter prototype.

This paper presents a 245 GHz wireless communications system with a data rate of 30 Giga bits per second (Gbps) at a 1.2 m distance, which proves the potential for future high-speed communications beyond 5G technology. The system consists of low-complexity and real-time base-band modules to provide the high-speed wideband signal processing capability. Multi-channel base-band signals are combined and converted to 15.65 ± 6.25 GHz wideband intermediate frequency (IF) signals. A novel 245 GHz waveguide bandpass filter (BPF) with low loss and high selectivity is designed and applied to a terahertz (THz) front-end for image rejection and noise suppression. Configuration of the base-band, IF, and THz front-end modules is also given in detail. The 245 GHz wireless communication link is demonstrated over a distance of 1.2 m.

Many commercial benchtop impedance analyzers are incapable of acquiring accurate tetrapolar measurements, when large electrode contact impedances are present, as in bioimpedance measurements using electrodes with micrometer-sized features. External front-end amplifiers can help overcome this issue and provide high common-mode rejection ratio (CMRR) and input impedance. Several discrete component-based topologies are proposed in the literature. In this article, these are compared with new alternatives with regard to their performance in measuring known loads in the presence of electrode contact impedance models, to emulate tetrapolar bioimpedance measurements. These models are derived from bipolar impedance measurements taken from the electrodes of a tetrapolar bioimpedance sensor. Comparison with other electrode models used in the literature established that this is a good and challenging model for bioimpedance front-end amplifier evaluation. Among the examined amplifiers, one of the best performances is achieved with one of the proposed topologies based on a custom front-end with no external resistors (AD8066/AD8130). Under the specific testing conditions, it achieved an uncalibrated worst-case absolute measurement deviation of 4.4% magnitude and 4° at 20 Hz, and 2.2% and 7° at 1 MHz accordingly with loads between $10~\Omega $ and 10 $\text{k}\Omega $. Finally, the practical use of the front-end with the impedance analyzer is demonstrated in the characterization of the bioimpedance sensor, in saline solutions of varying conductivities (2.5–20 mS/cm) to obtain its cell constant. This article serves as a guide for evaluating and choosing front-end amplifiers for tetrapolar bioimpedance measurements both with and without impedance analyzers for practical/clinical applications and material/sensor characterization. [ABSTRACT FROM AUTHOR]

An ultralow power (ULP) low-noise receiver front-end for the BLE application is presented in this letter. The tradeoff between noise and power consumption is mitigated by employing a transformer-based passive gm-boosting common-gate low noise transconductance amplifier (LNTA). Local-positive feedback (LPF) and feedforward (FF) noise cancellation techniques are combined in the LNTA to further lower noise. After the passive mixer, a TIA implements complex filtering with a moderate conversion gain. The receiver front-end, fabricated in TSMC 28-nm process, consumes only 440 μW under 0.9-V supply with a minimum noise figure of 4.8 dB. [ABSTRACT FROM AUTHOR]

This letter introduces for the first time a fully integrated analog vectorial modulator (VM) in gallium nitride on silicon (GaN-on-Si) monolithic microwave-integrated circuit (MMIC) technology, operating in Ka-band, and an analytical calibration technique suitable for VM. An extensive characterization of the prototype, with both static and dynamic modulating signals, validates both the design and the calibration technique. The VM is capable to produce corrected constellations with accuracy of 0.06 dB and 0.28° root mean square, respectively, for amplitude and phase, across the 35–40 GHz bandwidth. Furthermore, it is capable to generate single-side modulated signal with undesired sideband suppression in excess of 47 dBc. [ABSTRACT FROM AUTHOR]

This article presents a wideband millimeter-wave (mmWave) receiver front-end that covers the frequency range from 43 to 97 GHz, supporting the operation in the major parts of the V-, E-, and W-bands. The front-end incorporates a passive mixer-first topology to achieve high linearity and wideband performance. The front-end adopts I/Q generation at the RF port, using a coupled-line coupler (CLC), rather than at the local oscillator (LO) port to mitigate the crosstalk of the overlapping I/Q LO signals especially present at high frequencies. The CLC at the RF input facilitates ultrawide band input matching. The front-end implements the multi-gate gm3 cancellation technique at the IF amplifiers to preserve the linearity and provide gain at the IF section. Image rejection capabilities using a current mode transformer-based IF 90° coupler are implemented on chip and demonstrated with measurements. The front-end prototype is fabricated on the GlobalFoundries 22-nm FD-SOI CMOS process and it demonstrates an ultra-wideband performance across the frequency range 43–97 GHz (2.25:1 bandwidth) with image rejection of up to 32 dB, IIP3 of 1.6–5.2 dBm, and gain of 15 dB. The implementation used is low-IF topology with 3.8-GHz IF frequency and 1-GHz bandwidth. Furthermore, the measurement results show that the front-end supports high-speed modulated signals of up to 6-Gbps 64QAM modulation data. [ABSTRACT FROM AUTHOR]

As a result of local governance, municipalities and housing developers work together to define housing development projects and to co-create value propositions. The purpose of this study is to explore how value propositions are co-created during the front-end of housing development projects and how this affects housing developers' ability to drive change and innovation. The value co-creation process is explored through interviews, documents and observations in a case study of an urban development programme in Sweden. The findings illustrate how emerging conflicts and the process of resolving them are central drivers for value co-creation between these actors. However, conflicts that are not managed and resolved constructively can lead to the co-destruction of value. In this study we illustrate how value co-creation processes that precede procurement limit the flexibility of housing developers and determine the scope for value that can be realised. [ABSTRACT FROM AUTHOR]

Development of healthcare services is a societal responsibility often appearing as major public projects. These types of projects often have a long lifetime expectancy and represent large investments and changes to established welfare systems with a considerable societal impact. This makes strategic project success depending on front-end planning performance crucial. Motivated by literature claiming that the hospital projects’ front-end phase has a potential for improvements, this paper presents findings from a study investigating front-end planning practice in five Norwegian hospital projects. Discovered challenges mainly relate to the planning process or exploration of the opportunity space and concept elaboration. A main conclusion is that implementing theoretical recommendations both in guidelines and in practice should be a desired and possible development to further improve hospital projects’ front-end planning, thereby strengthening the odds for project success both on a tactical and strategical level.

In this study, we propose an approach for the design and satisfy the requirements of the fabrication of a small, lightweight, reliable, and stable ultra-wideband receiver for millimeter-wave bands and the contents of the approach. In this paper, we designed and fabricated a stable receiver with having low noise figure, flat gain characteristics, and low noise characteristics, suitable for millimeter-wave bands. The method uses the chip-and-wire process for the assembly and operation of a bare MMIC device. In order to compensate for the mismatch between the components used in the receiver, an amplifier, mixer, multiplier, and filter suitable for wideband frequency characteristics were designed and applied to the receiver. To improve the low frequency and narrow bandwidth of existing products, mathematical modeling of the wideband receiver was performed and based on this spurious signals generated from complex local oscillation signals were designed so as not to affect the RF path. In the ultra-wideband receiver, the gain was between 22.2 dB and 28.5 dB at Band A (input frequency, 18–26 GHz) with a flatness of approximately 6.3 dB, while the gain was between 21.9 dB and 26.0 dB at Band B (input frequency, 26–40 GHz) with a flatness of approximately 4.1 dB. The measured value of the noise figure at Band A was 7.92 dB and the maximum value of noise figure, measured at Band B was 8.58 dB. The leakage signal of the local oscillator (LO) was −97.3 dBm and −90 dBm at the 33 GHz and 44 GHz path, respectively. Measurement was made at the 15 GHz IF output of band A (LO, 33 GHz) and the suppression characteristic obtained through the measurement was approximately 30 dBc.

This paper introduces a high-performance analog front end for passive UHF RFID tag compatible with the EPC Class-1 Generation 2 (EPC C1G2) standard protocol. The proposed front end of a passive tag which contains the following modules: a power generation circuit which is composed of a matching circuit and an RF-limiter circuit, an NMOS rectifier, a DC limiter, a voltage regulation, a modulation and ASK demodulation circuit, a power-on-reset circuit, a ring oscillator which generates a clock of 1.28 MHz. The originality of this work is the proposal of a voltage regulation circuit composed of two distinct LDO regulators that share the same reference voltage and are designed to generate a Vdd1 (0.5 V) for the analog supply and Vdd2 (1 V) for digital power supply, under conditions of 50 Ω antenna, 900 MHz, a sensitivity of -24 dBm and a maximum consumption of 1 µW. The operating distance of the RFID is more than 25 meters based on the regulated 4 W effective isotropic radiated power (EIRP). The chip area of the proposed analog front end is only 79 μm × 83 μm. The simulation results in 90 nm CMOS process confirm the performance of the proposed analog front-end.

The beginning of an innovation process, also known as "front-end of innovation" (FEI), counts as an essential contributor to the successful development of new products and for their market appeal. Nevertheless, while helpful procedures and techniques for developing new products are well-known and widely applied, FEI is still an understudied area, and models for managing it are not yet commonly used in technology-oriented companies. FEI, also known as "fuzzy front end", can even be "fuzzier" in not-for-profit research centers. That is because the focus of these centers is advancing of scientific knowledge, rather than commercializing the results of those activities. This study summarizes the insights from a literature review on the topic of "project portfolio management" (PPM) in relation to innovation and, more specifically, with FEI and its components of ideation, innovation management, innovation strategy, foresight, and incremental or radical innovation. The authors selected and reviewed content from 170 papers published in SCOPUS prior to February 2019. The discussion uses a theoretical framework called "Front-End of Innovation Integrative Ontology (FEI2O)" to assist in framing the discussion. [ABSTRACT FROM AUTHOR]

An attractive user interface (UI) design with a clear user experience (UX) is the key for the success of applications. Therefore software development projects require very close collaboration between SI developers and front-end service developers. However, methodologies for software development only exist with inadequate development processes or work standards for collaboration. This survey derived 13 risk factors in developing UI/UX from 113 risk factors of IT projects through a questionnaire and factor analysis and proposed a collaboration-based UI/UX development model that can eliminate or mitigate six risks with high weights and reliability. To extract risk factors with high reliability, factor and reliability were analyzed to extract 13 major risks, and based on the expert opinions and the results of correlation analysis, UI/UX development stages were classified into planning, design, and implementation. The causal relationships between risks were verified through regression analysis. This study is the first to expertly analyze major risks based on collaboration in UI/UX development and derive a theoretical basis that can be used in project risk management. These findings are expected to provide a basis for research on development methodologies for higher levels of front-end services and to construct rational collaboration systems between SI practitioners and front-end service providers. [ABSTRACT FROM AUTHOR]

This paper is a general description of a Python-based web platform developed by the author that generates Graphical User Interfaces (GUIs) for software programs. It presents both technical and theoretical aspects of programming, Python libraries, chatbot development and auto-generating graphical interfaces. The article proposes an overview of a web system, explained with the help of diagrams. [ABSTRACT FROM AUTHOR]

SALT, a new dedicated readout Application Specific Integrated Circuit (ASIC) for the Upstream Tracker, a new silicon detector in the Large Hadron Collider beauty (LHCb) experiment, has been designed and developed. It is a 128-channel chip using an innovative architecture comprising a low-power analogue front-end with fast pulse shaping and a 40 MSps 6-bit Analog-to-Digital Converter (ADC) in each channel, followed by a Digital Signal Processing (DSP) block performing pedestal and Mean Common Mode (MCM) subtraction and zero suppression. The prototypes of SALT were fabricated and tested, confirming the full chip functionality and fulfilling the specifications. A signal-to-noise ratio of about 20 is achieved for a silicon sensor with a 12 pF input capacitance. In this paper, the SALT architecture and measurements of the chip performance are presented.

Digital oscilloscope’s structure has analog signal acquisition circuit, which transforms signal’s amplitude to fit ADC dynamic range. This circuit is commonly called oscilloscope’s vertical or front-end amplifier. Difficulty in designing front-end amplifiers in GHz range largely affects higher frequency range oscilloscope’s price. This work is focused on designing a front-end amplifier using discrete and openly sold components. We propose a design for attenuator, buffer, variable gain circuits. Amplifier’s prototype is designed. Main characteristics of the amplifier were measured. Measured bandwidth is 3 GHz. Amplifier’s gain and attenuation can support vertical scale sensitivity range from 10 mV/div to 1 V/div. Step response distortion is under 10 %. SMD and PTH relay model attenuators were evaluated. In this paper we review oscilloscope’s front-end purpose and structure. We review amplifiers design and provide the results of experimental measurements. Oscilografo įėjimo stiprintuvo kūrimas ir tyrimas Santrauka Skaitmeninis oscilografas turi analoginę dalį, kuri matuojamą signalą priderina prie naudojamo analoginio skaitmeninio keitiklio (ASK) dinamikos. Ši dalis vadinama oscilografo vertikaliuoju traktu arba įėjimo stiprintuvu. Dėl projektavimo įėjimo stiprintuvo, esant GHz dažniams, sudėtingumo šių dažnių skaitmeninių oscilografų kaina yra didelė. Straipsnyje analizuojamas ir projektuojamas stiprintuvas iš diskrečiųjų, rinkoje pasiekiamų komponentų. Suprojektuota ateniuatoriaus grandinė, impedanso transformavimo (buferinė) grandinė, valdomo stiprinimo grandinė. Sukurtas stiprintuvo prototipas. Ištirti pagrindiniai prototipo parametrai. Sukurto stiprintuvo praleidžiamų dažnių juosta siekia 3 GHz. Stiprintuvo stiprinimo koeficientas užtikrina 10 mV/pad – 1 V/pad vertikaliosios skalės jautrumo diapazoną. Pereinamosios charakteristikos iškraipymai neviršija 10 %. Darbe palyginti PTH (angl. plated through hole – kiaurymės montažo būdo) ir SMD (angl. surface mount device – paviršinio montažo būdo) relių ateniuatorių modeliai. Straipsnyje apžvelgiama oscilografo įėjimo stiprintuvo paskirtis ir struktūra. Apžvelgiama stiprintuvo projektavimo eiga, pateikiami atliktų matavimų rezultatai ir galutinės išvados. Reikšminiai žodžiai: ateniuatorius, įėjimo stiprintuvas, GHz, oscilografas, aukštadažniai signalai, vertikalusis traktas.

In this modern age, various groups have different day to day needs which need to be collaborated. Collaborating these ideas and thoughts would prove to be very useful and productive for everyone. Track Mate is a collaboration tool to share thoughts and ideas. Users can make groups of different collaborators and give partial or full access to the user. Ideas can be added or removed by different collaborators with the right permissions. Wallet will be present in every group which will track the users balances with each other. This application could be used as a task manager, idea collaborator, balance manager. The applications are endless and is relevant to people in this technology driven era. [ABSTRACT FROM AUTHOR]

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