Author: "Cyril Buttay" - Searchworks@Jio Institute Digital Library Search Results

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188 results on '"Cyril Buttay"'

51. Packaging and Integration Activities at Laboratoire Ampère -- CPES Seminar

Author: Cyril Buttay and Buttay, Cyril
Subjects: education, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Published: 2019

52. Application of the PCB-Embedding Technology to a 3.3 kW Power Factor Corrector

Author: Rémy Caillaud, Johan Le Lesle, Cyril Buttay, Florent Morel, Roberto Mrad, Nicolas Degrenne, Stefan Mollov, Buttay, Cyril, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Mitsubishi Electric R&D Centre Europe [France] (MERCE-France), and Mitsubishi Electric [France]
Subjects: [SPI.NRJ]Engineering Sciences [physics]/Electric power, ComputingMilieux_MISCELLANEOUS, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: International audience
Published: 2019

53. Technologie des composants actifs et leur assemblage - Packaging - École Thématique CNRS 2019 Fiabilité et Sûreté de Fonctionnement

Author: Cyril Buttay and Buttay, Cyril
Subjects: [SPI] Engineering Sciences [physics], education
Published: 2019

54. Analysis and modelling of the role of temperature in the static forward characteristics of an IGBT

Author: Hervé Morel, Bruno Allard, Layachi Boussouar, Cyril Buttay, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and Université Ferhat-Abbas Sétif 1 [Sétif] (UFAS1)
Subjects: Power transistors and Simulation, MOSFET, Power semiconductor devices, Computer science, Static mode, Modeling, Insulated-gate bipolar transistor, Semiconductor device, Electrical and Electronic Engineering, IGBT, Simulation, [SPI.TRON]Engineering Sciences [physics]/Electronics
Abstract: International audience; To effectively simulate the electrical characteristics of an IGBT, it is necessary to have a good model for applications operating in a wide range of temperatures. A new model of the on-state forward characteristics of an IGBT was developed and validated in MAST language in static mode using the SABER simulator. A particular attention was given to temperature dependence, based on the physical analysis of semiconductor device regions and the use of local and physic-based relations. The model was compared to experimental results and to the standard Hefner model. The validation of the model shows a good agreement between measurements and simulation. A clear improvement in the accuracy of the on-state characteristic temperature dependence with the was obtained.
Published: 2019
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55. Packaging of 10 kV SiC MOSFETs: Trade-Off Between Electrical and Thermal Performances

Author: Cyril Buttay, Hugo Reynes, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), SuperGrid Institute SAS, and Buttay, Cyril
Subjects: [SPI.TRON] Engineering Sciences [physics]/Electronics, ComputingMilieux_MISCELLANEOUS, [SPI.TRON]Engineering Sciences [physics]/Electronics
Abstract: International audience
Published: 2018

56. Procédé de microfabrication de transformateurs intégrés

Author: Maxime Semard, Christian Martin, Cyril Buttay, Charles Joubert, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Université de Lorraine [UL], Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-Centre National de la Recherche Scientifique (CNRS)-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Université de Lyon-Institut National des Sciences Appliquées (INSA)-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-École Centrale de Lyon (ECL), Université de Lyon-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-Centre National de la Recherche Scientifique (CNRS)-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon, and Buttay, Cyril
Subjects: [SPI.NRJ]Engineering Sciences [physics]/Electric power, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: International audience; Les convertisseurs de puissance voient leur fréquence de découpage augmenter dans l'objectif de miniaturiser les composants passifs. Les transformateurs de faible puissance sont utilisés pour l'isolation galvanique des alimentations drivers. Un procédé existant [3] permet la fabrication collective d'inductances sur substrat magnétique en réalisant un enroulement par électrodéposition. Il a été possible de l'améliorer en isolant électriquement le substrat magnétique d'une part et en réalisant deux enroulements distincts d'autre part pour réaliser une fonction transformateur. Le transformateur présenté est conçu pour une puissance de 1 W et une plage de température de fonctionnement comprise entre −55°C et 200°C. L'empreinte de 5,24 mm par 8,68 mm et d'une épaisseur d'environ 1mm (épaisseur du substrat magnétique).
Published: 2018

57. Application of the PCB-Embedding Technology in Power Electronics – State of the Art and Proposed Development

Author: Florent Morel, Stefan Mollov, Nicolas Degrenne, Roberto Mrad, Remy Caillaud, Cyril Buttay, Christian Martin, Johan Le Lesle, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Mitsubishi Electric R&D Centre Europe [France] (MERCE-France), and Mitsubishi Electric [France]
Subjects: 010302 applied physics, business.industry, Computer science, 020208 electrical & electronic engineering, [SPI.NRJ]Engineering Sciences [physics]/Electric power, 02 engineering and technology, Converters, 01 natural sciences, 7. Clean energy, Automation, Design for manufacturability, Printed circuit board, Power electronics, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Microelectronics, Parasitic extraction, business, Engineering design process
Abstract: International audience; The embedding of components in Printed Circuit Board (PCB) material is an attractive solution to improve the performance of power converters in the 1 W–100 kW range by increasing the power density (exploitation of unused volume in the PCB), reducing circuit parasitics (strip-line approach to current distribution, shorter interconnects), and improving manufacturability (rationalization of the manufacturing process, automation). This paper presents a review of the embedding technologies, with a special focus on power components (passive, active) and thermal management. The second part of the article is dedicated to the design process, and proposes a new design approach, inspired from microelectronics. The ambition is to simplify the design process by using " design toolkits ". These toolkits would provide the designer with elements such as design rules, libraries or models. The objective is to enable automatic design validation, and to ensure the design can be produced directly.
Published: 2018
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58. High-Temperature Coplanar Transformer

Author: Cyril Buttay, Maxime Semard, Christian Martin, Charles Joubert, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and A. Sari, Laboratoire Ampère
Subjects: Transformer, Materials science, business.industry, 020209 energy, 020208 electrical & electronic engineering, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Electrical engineering, 02 engineering and technology, 7. Clean energy, Capacitance, law.invention, law, Electromagnetic coil, Power electronics, 0202 electrical engineering, electronic engineering, information engineering, thick film inductors, business, microfabrication, Power density, Microfabrication, Electronic circuit, Voltage
Abstract: International audience; Power electronics tends to go higher in frequency and higher in power density. This requires integrated transformers which are able to withstand high temperature (over 200˚C). This paper addresses the manufacturing and test of low power transformers used for the isolation in gate circuits power supplies. The transformers are built from a magnetic substrate (ferrite) using a microfabrication process detailed in the paper. The presented transformers are intended for power below 1 W, voltage circa 10 V, switching frequency of 1 MHz, temperature ranging from –55˚C to 200˚C and an isolation capacitance below 10 pF.
Published: 2018
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59. Design, manufacturing and characterization of printed circuit board embedded inductors for power applications

Author: Florent Morel, Christian Martin, Roberto Mrad, Johan Le Lesle, Cyril Buttay, Nicolas Degrenne, Stefan Mollov, Remy Caillaud, Mitsubishi Electric R&D Centre Europe [France] (MERCE-France), Mitsubishi Electric [France], Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), and Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)
Subjects: 010302 applied physics, Computer science, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Hardware_PERFORMANCEANDRELIABILITY, Converters, Inductor, 01 natural sciences, Manufacturing cost, Inductance, Printed circuit board, Magnetic core, Electromagnetic coil, 0103 physical sciences, Electronic engineering, Hardware_INTEGRATEDCIRCUITS, Host (network)
Abstract: International audience; The Printed-Circuit-Board (PCB) technology is attractive for power electronic systems as it offers a low manufacturing cost for mass production. Power inductors are large and complex to manufacture, because they usually are custom components which must be wound individually. Inductors based on PCB technology can reduce the complexity and cost while using a wasted space (the thickness of said PCB). In this paper, a procedure to design such inductors is summarized , with a focus on inductors intended to be implemented in converters in the 100-1000 W range. The main contribution of this paper is the description of the manufacturing process : the inductors use PCB to host their magnetic core while their winding is made by patterning the PCB copper layers and using copper vias. In addition, new experimental results are presented : the prototypes are electrically characterized, and the results are discussed to present the advantages and drawbacks of this technology, as well as the remaining open questions.
Published: 2018
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60. Design considerations for the 2-phase cooling system of a 5 MW MVDC converter

Author: Majededdine Moustaid, Cyril Buttay, Vincent Platel, SuperGrid Institute SAS, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), LABORATOIRE DE THERMIQUE ENERGETIQUE ET PROCEDES (EA1932) (LATEP), and Université de Pau et des Pays de l'Adour (UPPA)
Subjects: [SPI.NRJ]Engineering Sciences [physics]/Electric power, ComputingMilieux_MISCELLANEOUS
Abstract: International audience
Published: 2018

61. Bonding strength of multiple SiC die attachment prepared by sintering of Ag nanoparticles

Author: Jianfeng Li, Stephane Azzopardi, Wissam Sabbah, Cyril Buttay, Christopher Mark Johnson, University of Nottingham, UK (UON), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Laboratoire de l'intégration, du matériau au système (IMS), Centre National de la Recherche Scientifique (CNRS)-Institut Polytechnique de Bordeaux-Université Sciences et Technologies - Bordeaux 1, and Université Sciences et Technologies - Bordeaux 1-Institut Polytechnique de Bordeaux-Centre National de la Recherche Scientifique (CNRS)
Subjects: Materials science, business.product_category, Sintering, chemistry.chemical_element, Nanoparticle, Industrial and Manufacturing Engineering, Modelling and Simulation, Composite material, Porosity, ComputingMilieux_MISCELLANEOUS, SiC power die attachment, Nanoscale silver paste, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Metals and Alloys, Copper, Computer Science Applications, Shear (sheet metal), Shear strength, chemistry, Modeling and Simulation, Power module, Ceramics and Composites, Die (manufacturing), NIP, business
Abstract: 3mm×3mm dummy SiC dies with 100\200\200nm thick Ti\W\Au metallization have simultaneously been attached using sintering of Ag nanoparticle paste on AlN-based direct bonded copper substrates with 5\0.1μm thick NiP\Au finish. The effect of preparation and sintering parameters including time of drying the printed paste, sintering temperature and time, and pressure, on the average shear strength for multiple die attachments was investigated. The surfaces of the die attachments after the shear tests were observed and the individual shear strength values correlated with the “apparent” porosity and thicknesses of the corresponding die attachments (sintered layer). The results obtained are further discussed and compared with typical data reported in existing literature. Main conclusions include: (i) the present shear strength values and their variations are comparable with those reported for single die attachment samples, (ii) the effects of sintering parameters can be ascribed to the effectiveness of the organic content burnout and appropriate rate of growth and coalescence of the Ag nanoparticles during the sintering process, and (iii) thickness values of the sintered Ag die attachments may be taken as non-destructive measurements to monitor/evaluate the quality of die attachment during power electronic module manufacturing/assembly process.
Published: 2015
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62. Protruding Ceramic Substrates for High Voltage Packaging Of Wide Bandgap Semiconductors

Author: Hugo Reynes, Hervé Morel, Cyril Buttay, SuperGrid Institute SAS, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), and Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)
Subjects: 010302 applied physics, Permittivity, Materials science, business.industry, 020208 electrical & electronic engineering, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Wide-bandgap semiconductor, High voltage, 02 engineering and technology, 01 natural sciences, Substrate (building), visual_art, 0103 physical sciences, Partial discharge, 0202 electrical engineering, electronic engineering, information engineering, visual_art.visual_art_medium, Optoelectronics, Ceramic, business, Layer (electronics), Voltage
Abstract: International audience; —Wide bandgap semiconductors enable high voltage (10 kV and more) switches. As a consequence, new packaging solutions are required to prepare the ground for such devices. The metallized ceramic substrate is a well-known and established technology for voltages up to 3.3kV, but it exhibits some weaknesses at higher voltages: due to its manufacturing process, the profile of the metallization is sharp and induces a reinforcement of the electric field at the " triple point " area (where the ceramic, the conductor and the encapsulating material meet), which can lead to Partial Discharges (PD), eventually causing a failure of the module. In this paper, we present a new substrate structure, where the triple point is moved away to an area where the electric field is lower. In this structure, the ceramic is machined to form protrusions, and round-edge metallizations are brazed on top. The design of the substrate, based on finite-elements is described, and calculations show that a 1 mm-thick AlN layer should be sufficient to withstand 10 kV. The manufacturing process of this substrate is presented. The test results demonstrate the superiority of this new solution, with a partial discharge inception voltage increased by 38 %.
Published: 2017
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63. Multi-objective optimisation of a bidirectional single-phase grid connected AC/DC converter (PFC) with two different modulation principles

Author: Nicolas Degrenne, Florent Morel, Johan Le Lesle, Roberto Mrad, Remy Caillaud, Cyril Buttay, Stefan Mollov, Christian Vollaire, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Mitsubishi Electric R&D Centre Europe [France] (MERCE-France), Mitsubishi Electric [France], and Ampère, Département Méthodes pour l'Ingénierie des Systèmes (MIS)
Subjects: PFC, Engineering, pareto front, 02 engineering and technology, Inductor, Electromagnetic interference, law.invention, Control theory, law, Frequency grid, 0202 electrical engineering, electronic engineering, information engineering, business.industry, 020208 electrical & electronic engineering, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Filter (signal processing), Converters, Optimisation procedure, wide band-gap devices, Capacitor, modulation, Modulation, visual_art, Electronic component, visual_art.visual_art_medium, 020201 artificial intelligence & image processing, business
Abstract: International audience; A design methodology is presented for a full-bridge Power Factor Corrector (PFC) converter with two control schemes: the well-known Continuous Current Mode (C.C.M) and Triangular Current Mode (T.C.M). The second one is an extension of the Discontinuous Current Mode (D.C.M). The converter is composed of one high frequency leg and one leg switching at the grid frequency and includes the EMC (common and differential mode) filter. This work highlights the impact of the modulation scheme on the design of passive components and on the overall losses. A pareto front in the efficiency (η) vs power density (ρ) domain is derived for both modulation schemes and for natural convection cooling. We show that, when EMC issues are considered, the T.C.M poses more constraints for partial load operation, superseding the full-load design. Finally, it is shown that for non-interleaved converters C.C.M modulation is better than T.C.M modulation, resulting in higher density converters.
Published: 2017
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64. Design of a SiC based triple active bridge ceil for a multi-megawatt DC-DC converter

Author: Thomas Lagier, Roland Ryndzionek, Piotr Dworakowski, Cyril Buttay, Jose Maneiro, SuperGrid Institute SAS, Gdańsk University of Technology (GUT), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and ANR-10-IEED-0005,SUPERGRID,réseaux électriques haute et très haute tension(2010)
Subjects: Engineering, business.industry, 020209 energy, 020208 electrical & electronic engineering, Direct current, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Electrical engineering, 02 engineering and technology, Converters, Modular design, 7. Clean energy, law.invention, Offshore wind power, Capacitor, law, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, business, Transformer, Dimensioning, Voltage
Abstract: International audience; The paper describes the design methodology of a novel Triple Active Bridge cell used as the building block for modular DC-DC converters. The intended application is for Medium Voltage Direct Current grids, such as the DC collector for offshore wind farms. The latest generation of SiC MOSFET semiconductors is utilized to operate in the medium frequency range while optimizing the efficiency. The dimensioning of the main cell components, including semiconductors, transformer and DC capacitors is presented. The cell mechanical integration and cooling are also addressed.
Published: 2017
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65. Étude de la robustesse de l’oxyde de grille pour des applications aéronautiques

Author: Oriol Aviño Salvado, Hervé Morel, Cyril Buttay, SAFRAN Group, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Safran (partiel), and Ampère, Publications
Subjects: robustesse, [SPI.NRJ]Engineering Sciences [physics]/Electric power, oxyde de grille, SiC MOSFET, Carbure de Silicium, SiO2, TDDB, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: Aeronautics industry is working towards a more electrified aircraft. That represents a challenge and involves the use of new technologies as silicon carbide (SiC) for the conception of MOSFET transistors. However, this technology presents some reliability problems as short-circuit and avalanche mode robustness as well as the threshold voltage instability and gate oxide reliability. This paper presents the principal issues on SiC MOSFETs reliability, as well as a study of threshold voltage instability and gate oxide reliability. The results presented in this paper will show that gate oxide reliability problems have been dramatically reduced. However, it remains some voltage threshold instability when internal diode is required. Concerning the gate oxide robustness, it is possible to conclude that SiC MOSFETs are relatively reliable for industrial applications.MOTS-CLES, Dans la cadre d’un avion plus électrique, de nouveaux défis se présentent. Parmi eux, l’évaluation de nouvelles technologies telles que le carbure de silicium pour la conception des interrupteurs MOSFET. Cette technologie présente des problèmes de fiabilité tels que la robustesse face au phénomène d’avalanche, face aux courts-circuits, ainsi que l’instabilité de la tension de seuil et la robustesse de l’oxyde de grille. Ce papier présente les principaux problèmes de fiabilité ainsi qu’une étude sur la robustesse de l’oxyde de grille et l’instabilité de la tension de seuil. Les résultats obtenus montrent que les problèmes liés à l’oxyde de grille se sont beaucoup minimisé, bien qu’il reste quelques problèmes sur la stabilité de la tension de seuil des qu’on sollicite la diode interne. Donc, on peut conclure que les MOSFET SiC sont relativement robustes pour des applications industrielles en ce qui concerne la fiabilité de l’oxyde de grille.
Published: 2017

66. High power PCB-embedded inductors based on ferrite powder

Author: Rémy Caillaud, Cyril Buttay, Johan Le Lesle, Florent Morel, Roberto Mrad, Nicolas Degrenne, Stefan Mollov, Céline Combettes, Mitsubishi Electric R&D Centre Europe [France] (MERCE-France), Mitsubishi Electric [France], Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), LAboratoire PLasma et Conversion d'Energie (LAPLACE), Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université Fédérale Toulouse Midi-Pyrénées, and IMAPS
Subjects: characterisation, [SPI]Engineering Sciences [physics], PCB, power electronics, manufacturing process
Abstract: International audience; Inductors used in power converters are usually large and complex to manufacture. As a consequence, it is desirable to integrate them within printed circuit boards, to use an otherwise wasted volume. Solid magnetic cores are brittle, and can be damaged during the PCB manufacturing (lamination). In this paper, we present a process based on ferrite powder instead of a solid core. Process details and electrical measurement results are given. Magnetic cores of up to 50 mm in diameter are produced. Magnetic permeability of up to 28 are achieved, using some MnZn ferrite powder. A final discussion summarises the advantages and disadvantages of this technique.
Published: 2017

67. Comparison of planar and Toroidal PCB integrated inductors for a multi-cellular 3.3 kW PFC

Author: Remy Caillaud, Johan Le Lesle, Nicolas Degrenne, Cyril Buttay, Stefan Mollov, Florent Morel, Roberto Mrad, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Mitsubishi Electric R&D Centre Europe [France] (MERCE-France), and Mitsubishi Electric [France]
Subjects: Engineering, Toroid, business.industry, 020208 electrical & electronic engineering, 05 social sciences, 02 engineering and technology, Inductor, 7. Clean energy, Manufacturing cost, Finite element method, Power (physics), [SPI.TRON]Engineering Sciences [physics]/Electronics, Planar, Magnetic core, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, 0501 psychology and cognitive sciences, Point (geometry), business, 050107 human factors
Abstract: International audience; The Printed-Circuit-Board (PCB) technology is attractive for power electronic systems as it offers a low manufacturing cost for mass production. In this paper, we present a procedure to design power inductors based on PCB. These inductors either use PCB for the winding only (Planar structure), or to host both the magnetic core and the winding (Toroidal PCB structure). The design procedure compares, in the form of a Pareto fronts, the two inductor structures over a large range of parameters (geometric parameters, magnetic materials), to identify the best candidates in terms of power losses and box volume. In this procedure, the core losses are taken into account using improved Generalized Steinmetz Equation (iGSE). The skin and proximity effects are considered using the AC resistance calculated with a FEM software. The inductor feasibility is checked from a mechanical perspective using the PCB design rules and from a thermal point of view with FEM simulation. A design case is presented for a 3.3 kW multi-cellular (3 interleaved cells) Power Factor Corrector (PFC). It is found that the planar design offers the most compact solution, but might present challenges regarding thermal management. The Toroidal PCB structure tends to be larger, but easier to cool.
Published: 2017
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68. Etat de l’art de l’intégration en électronique de puissance et axes de recherches associés

Author: Vincent Bley, Cyril Buttay, Mickael Petit, Matériaux Diélectriques dans la Conversion d’Energie (LAPLACE-MDCE), LAboratoire PLasma et Conversion d'Energie (LAPLACE), Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université Fédérale Toulouse Midi-Pyrénées-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Electronique de Puissance et Intégration (SATIE-EPI), Composants et Systèmes pour l'Energie Electrique (CSEE), Systèmes et Applications des Technologies de l'Information et de l'Energie (SATIE), École normale supérieure - Cachan (ENS Cachan)-Université Paris-Sud - Paris 11 (UP11)-Institut Français des Sciences et Technologies des Transports, de l'Aménagement et des Réseaux (IFSTTAR)-École normale supérieure - Rennes (ENS Rennes)-Université de Cergy Pontoise (UCP), Université Paris-Seine-Université Paris-Seine-Conservatoire National des Arts et Métiers [CNAM] (CNAM)-Centre National de la Recherche Scientifique (CNRS)-École normale supérieure - Cachan (ENS Cachan)-Université Paris-Sud - Paris 11 (UP11)-Institut Français des Sciences et Technologies des Transports, de l'Aménagement et des Réseaux (IFSTTAR)-École normale supérieure - Rennes (ENS Rennes)-Université de Cergy Pontoise (UCP), Université Paris-Seine-Université Paris-Seine-Conservatoire National des Arts et Métiers [CNAM] (CNAM)-Centre National de la Recherche Scientifique (CNRS)-Systèmes et Applications des Technologies de l'Information et de l'Energie (SATIE), Université Paris-Seine-Université Paris-Seine-Conservatoire National des Arts et Métiers [CNAM] (CNAM)-Centre National de la Recherche Scientifique (CNRS), Petit, Mickael, Centre National de la Recherche Scientifique (CNRS)-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Institut National Polytechnique (Toulouse) (Toulouse INP), and Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Université Toulouse III - Paul Sabatier (UT3)
Subjects: Intégration 3D, Electronique de puissance, [SPI.NRJ]Engineering Sciences [physics]/Electric power, ComputingMilieux_MISCELLANEOUS, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: National audience
Published: 2017

69. Robustness of SiC MOSFET under avalanche conditions

Author: Hervé Morel, Ilyas Dchar, Marion Zolkos, Cyril Buttay, SuperGrid Institute SAS, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and ITE Supergrid Institute (financement investissement d'avenir)
Subjects: Materials science, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, Series and parallel circuits, 01 natural sciences, Hardware_GENERAL, 0103 physical sciences, MOSFET, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, Failure mechanism, SiC MOSFET, 010302 applied physics, Avalanche diode, business.industry, 020208 electrical & electronic engineering, Bipolar junction transistor, Electrical engineering, Semiconductor device, Reliability, Avalanche breakdown, [SPI.TRON]Engineering Sciences [physics]/Electronics, High-voltage direct current, Parasitic BJT, business, Critical energy, Voltage
Abstract: International audience; In high voltage direct current (HVDC) converters, a series connection of semiconductor devices is often used to achieve the desired blocking voltage. In such configuration, an unequal voltage sharing may drive one or more devices into avalanche breakdown, eventually causing the failure of the entire group of devices. This paper presents the experimental evaluation of SiC MOSFETs from different manufacturers operated in avalanche. A setup was developed to test the devices under such condition. The reliability of SiC MOSFETs have been compared. To correlate the experimental results with the failure mechanism, the MOSFETs were decapsulated to identify the failure sites on the SiC dies. Examination results show that for some tested devices, the failure occurs at the metallization source of the die, and results in a short circuit between all three terminals of the MOSFETs. Furthermore, it has been found that the parasitic BJT latch up and the intrinsic temperature limit are the main failure mechanisms for these devices.
Published: 2017
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70. Design and Manufacturing of a Double-Side Cooled, SiC based, High Temperature Inverter Leg

Author: Marie-Laure Locatelli, Raphaël Riva, Bruno Allard, Cyril Buttay, and Vincent Bley
Subjects: Materials science, Sintering, JFET, Dielectric, Power module, visual_art, Melting point, Electronic engineering, visual_art.visual_art_medium, Inverter, Pharmacology (medical), Power semiconductor device, Ceramic, Composite material
Abstract: In this paper, we present a small (25×25×3 mm3) power module that integrates two silicon-carbide (SiC) JFETs to form an inverter leg. This module has a “sandwich” structure, i.e. the power devices are placed between two ceramic substrates, allowing for heat extraction from both sides of the dies. All interconnects are made by silver sintering, which offers a very high temperature capability (the melting point of pure silver being 961 °C). The risk of silver migration is assessed, and we show that Parylene-HT, a dielectric material that can sustain more than 300 °C, can completely coat the module, providing adequate protection.
Published: 2014
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71. Thermal Stability of Silicon Carbide Power JFETs

Author: Dominique Bergogne, Hervé Morel, Florent Morel, Remy Ouaida, Cyril Buttay, Christophe Raynaud, Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and Project THOR, funded by Euripides and Catrene
Subjects: JFET, silicon carbide (SiC), Materials science, Thermal runaway, thermal runaway, Thermal resistance, 02 engineering and technology, 01 natural sciences, chemistry.chemical_compound, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Silicon carbide, Thermal stability, Electrical and Electronic Engineering, 010302 applied physics, business.industry, [SPI.NRJ]Engineering Sciences [physics]/Electric power, 020208 electrical & electronic engineering, Electrical engineering, Thermal conduction, Electronic, Optical and Magnetic Materials, Power (physics), chemistry, Optoelectronics, business, AND gate
Abstract: 9 pages; International audience; Silicon carbide (SiC) JFETs are attractive devices, but they might suffer from thermal instability. An analysis shows that two mechanisms could lead to their failure: the loss of gate control, which can easily be avoided, and a thermal runaway caused by the conduction losses. Destructive experimental tests performed on a dedicated system show that the latter mechanism is more severe than initially expected. A low thermal resistance and gate driver equipped with protections systems are thus required to ensure safe operation of the SiC JFETs.
Published: 2013
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72. Die attach using silver sintering. Practical implementation and analysis

Author: Wissam Sabbah, Cyril Buttay, Régis Meuret, Hervé Morel, Dominique Planson, Amandine Masson, Raphaël Riva, Stephane Azzopardi, Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Laboratoire de l'intégration, du matériau au système (IMS), Centre National de la Recherche Scientifique (CNRS)-Institut Polytechnique de Bordeaux-Université Sciences et Technologies - Bordeaux 1, SAFRAN, Grp Hispano Suiza, SAFRAN Group, FRAE projet EPAHT, and Université Sciences et Technologies - Bordeaux 1-Institut Polytechnique de Bordeaux-Centre National de la Recherche Scientifique (CNRS)
Subjects: 010302 applied physics, Materials science, power electronics packaging, silver sintering, [SPI.NRJ]Engineering Sciences [physics]/Electric power, 020208 electrical & electronic engineering, Metallurgy, dBc, Sintering, 02 engineering and technology, Substrate (printing), 01 natural sciences, Silver nanoparticle, Die (integrated circuit), high temperature, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Melting point, Electrical and Electronic Engineering, Silver particles
Abstract: National audience; Silver sintering is a promising alternative to high melting point (HMP) solders which contain lead. Indeed, it offers better thermal and electrical properties, and can operate at higher temperature. Currently, several implementations of this technique are available, based on various silver particles sizes and sintering additives. This paper presents a review of the different implementations, and gives practical details about one of them, based on silver nanoparticles. One specific aspect is highlighted: the metal finish of the DBC substrate. It has a major impact on the quality of the sintered joint: with some finishes, the adhesion is excellent (more than 50 MPa), while it is poor with some others (lower than 10 MPa).
Published: 2013
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73. Lifetime of power electronics interconnections in accelerated test conditions: High temperature storage and thermal cycling

Author: Cyril Buttay, Wissam Sabbah, Hervé Morel, L. Theolier, Oriol Avino-Salvado, F. Arabi, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Fiabilité / Puissance, Laboratoire de l'intégration, du matériau au système (IMS), Université Sciences et Technologies - Bordeaux 1-Institut Polytechnique de Bordeaux-Centre National de la Recherche Scientifique (CNRS)-Université Sciences et Technologies - Bordeaux 1-Institut Polytechnique de Bordeaux-Centre National de la Recherche Scientifique (CNRS), PIA GENOME PREMICES, and Centre National de la Recherche Scientifique (CNRS)-Institut Polytechnique de Bordeaux-Université Sciences et Technologies - Bordeaux 1-Centre National de la Recherche Scientifique (CNRS)-Institut Polytechnique de Bordeaux-Université Sciences et Technologies - Bordeaux 1
Subjects: Thermal shock, Materials science, chemistry.chemical_element, 02 engineering and technology, Temperature cycling, 01 natural sciences, Die (integrated circuit), [SPI]Engineering Sciences [physics], Aluminium, Power electronics, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Electrical and Electronic Engineering, Composite material, Safety, Risk, Reliability and Quality, 010302 applied physics, business.industry, 020208 electrical & electronic engineering, Electrical engineering, Condensed Matter Physics, Atomic and Molecular Physics, and Optics, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, Shock (mechanics), chemistry, Power module, business, High temperature storage
Abstract: International audience; We investigate the effect of three testing conditions (thermal shock, Rapid Temperature Changes – RTC – and high temperature storage) on the interconnects of a power electronic module. In particular, the mechanical strength of thick aluminium wirebonds is investigated and shows that while it is not affected by storage at 230 °C, it is much more sensitive to thermal cycling. Shock tests are found to be especially severe, despite having a smaller temperature swing than RTC. Regarding the die attach, no noticeable reduction in mechanical strength is found, regardless of the ageing conditions, and despite clear micro-structural evolutions.
Published: 2017
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74. Characterization of materials and their interfaces in a direct bonded copper substrate for power electronics applications

Author: O. Dezellus, Laurent Gremillard, A. Ben Kabaar, Cyril Buttay, Anthony Gravouil, Rafael Estevez, Science et Ingénierie des Matériaux et Procédés (SIMaP ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut de Chimie du CNRS (INC)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Laboratoire des Multimatériaux et Interfaces (LMI), Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Université de Lyon-Institut de Chimie du CNRS (INC)-Centre National de la Recherche Scientifique (CNRS), Laboratoire de Mécanique des Contacts et des Structures [Villeurbanne] (LaMCoS), Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Université de Lyon-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS), Matériaux, ingénierie et science [Villeurbanne] (MATEIS), Université de Lyon-Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS), and Institut Carnot Lyon I@L, projet SuMeCe
Subjects: Digital image correlation, Materials science, Mechanical characterization, Ceramic substrates, chemistry.chemical_element, 02 engineering and technology, Temperature cycling, 01 natural sciences, [SPI]Engineering Sciences [physics], Power electronics, 0103 physical sciences, Electronic engineering, Ceramic, Electrical and Electronic Engineering, Composite material, Safety, Risk, Reliability and Quality, 010302 applied physics, dBc, 021001 nanoscience & nanotechnology, Condensed Matter Physics, Copper, Atomic and Molecular Physics, and Optics, Finite element method, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, Characterization (materials science), chemistry, visual_art, visual_art.visual_art_medium, 0210 nano-technology
Abstract: International audience; Direct Bonded Copper (DBC) are produced by high temperature (>1000 °C) bonding between copper and a ceramic (usually alumina). They are commonly used in power electronics. However, their reliability when exposed to thermal cycling is still an issue, that could be addressed by advanced numerical simulations. This paper describes the identification of the parameters for a numerical model that uses finite elements with cohesive zones. This identification is based on careful mechanical characterization of all components of the DBC (ceramic, copper and interface) using an innovative approach based on image correlation.
Published: 2017
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75. Thermal Runaway Robustness of SiC VJFETs

Author: Cyril Buttay, Dominique Bergogne, Raphaël Riva, Florent Morel, Christophe Raynaud, Remy Ouaida, Hervé Morel, Anh Dung Hoang, Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and Ampère, Publications
Subjects: JFET, Materials science, Thermal runaway, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, 7. Clean energy, 01 natural sciences, law.invention, chemistry.chemical_compound, law, Robustness (computer science), Power electronics, 0103 physical sciences, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, Water cooling, Silicon carbide, General Materials Science, Power Electronics, 010302 applied physics, business.industry, Mechanical Engineering, [SPI.NRJ]Engineering Sciences [physics]/Electric power, 020208 electrical & electronic engineering, Transistor, Electrical engineering, Condensed Matter Physics, Engineering physics, High-Temperature, chemistry, Mechanics of Materials, Thermal Runaway, business, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: International audience; Silicon Carbide (SiC) Junction-Field Effect Transistors (JFETs) are attractive devices for power electronics. Their high temperature capability should allow them to operate with a reduced cooling system. However, experiments described in this paper conclude to the existence of runaway conditions in which these transistors will reach destructive temperatures.
Published: 2013
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76. Improving the thermal management of power GaN devices

Author: Chenjiang Yu, Cyril Buttay, Eric Labouré, Laboratoire Génie électrique et électronique de Paris (GeePs), Université Paris-Sud - Paris 11 (UP11)-Université Pierre et Marie Curie - Paris 6 (UPMC)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), IMAPS, ANR-12-BS09-0005,ETHAER,Electronique de puissance à Très Hautes performances pour l'AERonautique(2012), Buttay, Cyril, and BLANC - Electronique de puissance à Très Hautes performances pour l'AERonautique - - ETHAER2012 - ANR-12-BS09-0005 - BLANC - VALID
Subjects: [SPI.TRON] Engineering Sciences [physics]/Electronics, [SPI.TRON]Engineering Sciences [physics]/Electronics
Abstract: International audience; GaN transistors require extremely short connexions (parasitic inductance of a few hundred of picohenries) to remain efficient, and yet one should provide them with electrical isolation and low thermal resistance to a heatsink. In this presentation, we compare a regular mounting (flip-chip mounting on a PCB), the same mounting, but on a ceramic substrate, and an alternative mounting where the die is cooled through its backside, and the electrical interconnects use a flexible PCB. These three structures are compared using simulation and experiments, and it is found that the ceramic substratereduces the total thermal resistance by a factor of 3 (5 K/W or less vs 15 K/W for a PCB substrate).
Published: 2016

77. EDT for Power Devices

Author: Cyril Buttay, Chenjiang Yu, Eric Labouré, Vincent Bley, Céline Combettes, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Laboratoire Génie électrique et électronique de Paris (GeePs), Université Paris-Sud - Paris 11 (UP11)-Université Pierre et Marie Curie - Paris 6 (UPMC)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Matériaux Diélectriques dans la Conversion d’Energie (LAPLACE-MDCE), LAboratoire PLasma et Conversion d'Energie (LAPLACE), Centre National de la Recherche Scientifique (CNRS)-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Institut National Polytechnique (Toulouse) (Toulouse INP), Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées, IMAPS - NMI, ANR-12-BS09-0005,ETHAER,Electronique de puissance à Très Hautes performances pour l'AERonautique(2012), Université Toulouse III - Paul Sabatier (UT3), Université de Toulouse (UT)-Université de Toulouse (UT)-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université de Toulouse (UT)-Université Toulouse III - Paul Sabatier (UT3), and Université de Toulouse (UT)
Subjects: [SPI]Engineering Sciences [physics]
Abstract: International audience; This presentation gives an overview of the packaging requirements for power electronics, especially in terms of thermal aspects. Then, it briefly describes the state-of-the-art in the topic of advanced Printed-Circuit-Board (PCB) use in power electronics. Finally, the embedding technology developed in the 3DPHI platform is presented
Published: 2016

78. Avalanche robustness of SiC Schottky diode

Author: Hervé Morel, Cyril Buttay, Ilyas Dchar, SuperGrid Institute SAS, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and Supergrid Institute
Subjects: Engineering, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, 01 natural sciences, [SPI]Engineering Sciences [physics], 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Hardware_INTEGRATEDCIRCUITS, Transient-voltage-suppression diode, Electrical and Electronic Engineering, Safety, Risk, Reliability and Quality, Diode, 010302 applied physics, Avalanche diode, business.industry, 020208 electrical & electronic engineering, Electrical engineering, Schottky diode, High voltage, Condensed Matter Physics, Atomic and Molecular Physics, and Optics, Avalanche breakdown, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, Single-photon avalanche diode, Voltage spike, Optoelectronics, business
Abstract: International audience; Reliability is one of the key issues for the application of Silicon carbide (SiC) diode in high power conversion systems. For instance, in high voltage direct current (HVDC) converters, the devices can be submitted to high voltage transients which yield to avalanche. This paper presents the experimental evaluation of SiC diodes submitted to avalanche, and shows that the energy dissipation in the device can increase quickly and will not be uniformly distributed across the surface of the device. It has been observed that failure occurs at a fairly low energy level (
Published: 2016
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79. Two Comparison-Alternative High Temperature PCB-Embedded Transformer Designs for a 2 W Gate Driver Power Supply

Author: Dushan Boroyevich, Marwan Ali, Bruno Allard, Nicolas Quentin, Rolando Burgos, Cyril Buttay, Rémi Perrin, Bingyao Sun, Center for Power Electronics Systems - CPES (Blacksburg, USA), Virginia Polytechnic Institute and State University [Blacksburg], Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Sagem - SAFRAN Gr., SAFRAN Group, and IEEE
Subjects: Isolation transformer, Engineering, inter-capacitance, Switched-mode power supply, Flyback transformer, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, Distribution transformer, 01 natural sciences, GaN, high temperature, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Gate driver, Hardware_INTEGRATEDCIRCUITS, Energy efficient transformer, Delta-wye transformer, 010302 applied physics, business.industry, 020208 electrical & electronic engineering, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Electrical engineering, PCB-embedded transformer, high integration converter, business, Transformer types, Hardware_LOGICDESIGN
Abstract: International audience; With fast power semiconductor devices based on GaN and SiC becoming more common, there is a need for improved driving circuits. Transformers with smaller inter-winding capacitance in the isolated gate drive power supply helps in reducing the conducted EMI emission from the power converter to auxiliary sources. This paper presents a transformer with a small volume, a low power loss and a small inter-capacitance in a gate drive power supply to fast switching devices, such as GaN HEMT and SiC MOSFET. The transformer core is embedded into PCB to increase the integration density. Two different transformer designs, the coplanar-winding PCB embedded transformer and the toroidal PCB embedded transformer, are presented and compared. The former has a 0.8 pF inter-capacitance and the latter has 85% efficiency with 73 W/in 3 power density. Both designs are dedicated to a 2 W gate drive power supply for wide-band-gap device, which can operate at 200 ̊ C ambient temperature.
Published: 2016
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80. Comparison of topside contact layouts for power dies embedded in PCB

Author: Cyril Buttay, Céline Combettes, Eric Laboure, Gilles Brillat, Chenjiang Yu, Vincent Bley, Laboratoire Génie électrique et électronique de Paris (GeePs), Université Paris-Sud - Paris 11 (UP11)-Université Pierre et Marie Curie - Paris 6 (UPMC)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Matériaux Diélectriques dans la Conversion d’Energie (LAPLACE-MDCE), LAboratoire PLasma et Conversion d'Energie (LAPLACE), Université Toulouse III - Paul Sabatier (UT3), Université de Toulouse (UT)-Université de Toulouse (UT)-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université de Toulouse (UT)-Université Toulouse III - Paul Sabatier (UT3), Université de Toulouse (UT), IMAPS, ANR-12-BS09-0005,ETHAER,Electronique de puissance à Très Hautes performances pour l'AERonautique(2012), Centre National de la Recherche Scientifique (CNRS)-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Institut National Polytechnique (Toulouse) (Toulouse INP), Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Université Toulouse III - Paul Sabatier (UT3), and Université Fédérale Toulouse Midi-Pyrénées
Subjects: Engineering, Current distribution, business.industry, 020208 electrical & electronic engineering, Contact resistance, Electrical engineering, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, Power (physics), Inductance, [SPI]Engineering Sciences [physics], Semiconductor, Parasitic element, 0202 electrical engineering, electronic engineering, information engineering, Hardware_INTEGRATEDCIRCUITS, business, Diode
Abstract: International audience; Embedding of power semiconductor dies in PCB is a very attractive technology, especially to achieve interconnects with a very low parasitic inductance and resistance. In this paper, we focus on the contact resistance and current distribution in a large (6×6mm 2) diode embedded in PCB, as a function of the layout of its topside contact. We demonstrate that by choosing a suitable contact layout, it is possible to achieve a very low contact resistance.
Published: 2016
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81. Implementation and Switching Behavior of a PCB-DBC IGBT Module Based on the Power Chip-on-Chip 3D Concept

Author: Raphaël Riva, Johan Delaine, Jean-Louis Marchesini, Cyril Buttay, Yvan Avenas, Pierre-Olivier Jeannin, Laboratoire de Génie Electrique de Grenoble (G2ELab), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), IRT Saint Exupéry - Institut de Recherche Technologique, and Institut Carnot 'énergies du futur', Région Rhône-Alpes
Subjects: Engineering, Busbar, 02 engineering and technology, Capacitors, 01 natural sciences, Industrial and Manufacturing Engineering, law.invention, [SPI]Engineering Sciences [physics], law, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Electrical and Electronic Engineering, Inductance, 010302 applied physics, Substrates, business.industry, 020208 electrical & electronic engineering, Transistor, Electrical engineering, Logic gates, Insulated-gate bipolar transistor, Converters, Power (physics), Insulated gate bipolar transistors, Capacitor, Control and Systems Engineering, Logic gate, business, Switches, Copper
Abstract: International audience; With the emergence of new power semiconductor devices, the switching speeds in power converters are increasing. The stray inductances of switching cells must therefore be minimized to limit over-voltages on transistors. One relatively new approach, called Power Chip-on-Chip (PCoC), considers the integration of power dies, one on top of the other, directly in the busbar. This allows for the reduction of the stray inductance. This paper first presents the implementation of a PCoC module using classical packaging techniques. Then a description of the different technological steps for the realization is outlined. Finally, experimental characterization results confirm the lower stray inductances offered by the PCoC package compared with the planar one.
Published: 2016
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82. Compact inverter designed for high-temperature operation

Author: Florin Udrea, Cyril Buttay, Jeremy Rashid, Rajesh Kumar Malhan, Gehan A. J. Amaratunga, Christopher Mark Johnson, and Peter T. Ireland
Subjects: business.industry, Computer science, Automotive industry, Temperature cycling, Automotive engineering, chemistry.chemical_compound, Reliability (semiconductor), chemistry, Power module, Thermal, Silicon carbide, Electronic engineering, Inverter, Layer (object-oriented design), business
Abstract: This paper presents an integrated 10 kW inverter designed to operate in the demanding automotive environment. To achieve good compactness and high reliability to thermal cycling, several original approaches have been implemented together: the power modules are built with a sandwich structure, employing mechanical improvements compared to existing comparable structures; these sandwich modules are cooled directly (i.e without an intermediate base-plate layer), with the cooling fluid being sprayed to improve heat extraction; Anally, 1200 V silicon carbide devices are used for improved performance. The specific requirements of the automotive environment are described as well as the chosen approaches. Experimental results are presented, giving details of the electrical, thermal and reliability performance. © 2007 IEEE.
Published: 2016
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83. Compact double-side liquid-impingement-cooled integrated power electronic module

Author: Florin Udrea, Christopher Mark Johnson, Rajesh Kumar Malhan, S.J. Rashidt, Cyril Buttay, Gehan A. J. Amaratunga, and Peter T. Ireland
Subjects: Materials science, business.industry, Thermal resistance, Power electronics, Power module, Heat exchanger, Electrical engineering, Inverter, Heat sink, business, Capacitance, Power density
Abstract: This paper presents a compact integrated power electronic module (IPEM) which seeks to overcome the volumetric power density limitations of conventional packaging technologies. A key innovation has been the development of a substrate sandwich structure which permits double side cooling of the embedded dies whilst controlling the mechanical stresses both within the module and at the heat exchanger interface. A 3-phase inverter module has been developed, integrating the sandwich structures with high efficiency impingement coolers, delink capacitance and gate drive units. Full details of the IPEM construction and electrical evaluation are given in the paper. © 2007 IEEE.
Published: 2016

84. High performance cooling system for automotive inverters

Author: Rajesh Kumar Malhan, Jeremy Rashid, Peter T. Ireland, Cyril Buttay, Florin Udrea, Gehan A. J. Amaratunga, and C. Mark Johnson
Subjects: Semiconductor, Materials science, business.industry, Thermal resistance, Power module, Heat spreader, Water cooling, Mechanical engineering, Optoelectronics, Temperature cycling, Heat transfer coefficient, Heat sink, business
Abstract: A novel double-side cooled power module is presented which delivers superior cooling performance with the potential for improved robustness to thermal cycling. The semiconductor dies are sandwiched between conventional DBC substrates, the substrates being directly cooled rather than through a conventional heat spreader heat sink assembly. A theoretical analysis is presented illustrating that direct cooling can offer a lower total thermal resistance provided the heat transfer coefficient at the cooled surface is sufficiently high. Experimental results demonstrate the effectiveness of the selected impingement cooling technique when applied in both single- and double-side cooled formats. Measurements on the double-side cooled structure show a total thermal resistance (junction to ambient) that is less than 40% of the junction to case resistance of a conventional module. Similar improvements are observed in the transient thermal impedance (step response) curve indicating that thermal cycling ranges will be reduced under all operational conditions.
Published: 2016

85. Utilisation d’un modèle CEM pour l’estimation des pertes dans un module de puissance

Author: Anne-Sophie Podlejski, Arnaud Bréard, Christian Vollaire, Cyril Buttay, Ampère, Département Méthodes pour l'Ingénierie des Systèmes (MIS), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Ampère, Département Energie Electrique (EE), and Ampère, Publications
Subjects: [SPI.NRJ]Engineering Sciences [physics]/Electric power, ComputingMilieux_MISCELLANEOUS, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: National audience
Published: 2016

86. Thermal management and electromagnetic analysis for GaN devices packaging on DBC substrate

Author: Cyril Buttay, Chenjiang Yu, Eric Laboure, Laboratoire Génie électrique et électronique de Paris (GeePs), Université Paris-Sud - Paris 11 (UP11)-Université Pierre et Marie Curie - Paris 6 (UPMC)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and ANR-12-BS09-0005,ETHAER,Electronique de puissance à Très Hautes performances pour l'AERonautique(2012)
Subjects: Materials science, Thermal resistance, electromagnetic analysis, Gallium nitride, 02 engineering and technology, Substrate (electronics), 7. Clean energy, 01 natural sciences, law.invention, chemistry.chemical_compound, Printed circuit board, [SPI]Engineering Sciences [physics], Thermal conductivity, law, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, thermal management, Ceramic, Electrical and Electronic Engineering, simulation FEM, 010302 applied physics, business.industry, 020208 electrical & electronic engineering, Transistor, Power electronic substrate, chemistry, visual_art, visual_art.visual_art_medium, Optoelectronics, GaN power device, business, DBC substrate
Abstract: International audience; Printed Circuit Boards (PCBs) are often used to mount gallium nitride transistors, as they offer good electrical performance. However, their thermal conductivity is not as good as with ceramic substrates. In this paper, we compare (experimentally and by simulation) both the electrical and thermal performances of GaN transistor mounted on PCBs and ceramic substrates, and we show that with a proper layout, the ceramic substrates can offer both a very good thermal management (thermal resistance 4 times lower than with PCB) and suitable electrical performance (parasitic inductances of 1–2 nH).
Published: 2016
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87. GaN Active-Clamp Flyback Converter with Resonant Operation Over a Wide Input Voltage Range

Author: Nicolas Quentin, Rémi Perrin, Christian Martin, Charles Joubert, Bertrand Lacombe, Cyril Buttay, SAFRAN Group, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and Ampère, Publications
Subjects: [SPI.NRJ]Engineering Sciences [physics]/Electric power, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: International audience; This paper presents an active-clamp Flyback converter with a resonant operation which can realize soft-switching on all power elements with the minimum of additional components compared to the classical hard-switched flyback topology. This converter is a good candidate for wide input voltage and load range application. The operational principle and design procedure are presented and verified experimentally with a 50W prototype converter at 1 MHz switching frequency, 18 to 80 V input voltage range and 15 V output voltage. In this switching frequency range, GaN transistors and planar transformer are used in order to improve the efficiency.
Published: 2016

88. 2 MHz high-density integrated power supply for gate driver in high-temperature applications

Author: Wenli Zhang, Nicolas Quentin, Bruno Allard, Philipe Preciat, Rolando Burgos, Cyril Buttay, Donatien Martineau, Rémi Perrin, Dushan Boroyevic, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Sagem - SAFRAN Gr., Center for Power Electronics Systems - CPES (Blacksburg, USA), Virginia Polytechnic Institute and State University [Blacksburg], Labinal Power Systems, and SAFRAN (FRANCE)
Subjects: Engineering, Isolation transformer, Flyback transformer, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, Distribution transformer, 7. Clean energy, Windings, law.invention, [SPI]Engineering Sciences [physics], law, Power electronics, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, Gate driver, Prototypes, Ferrites, Energy efficient transformer, 0501 psychology and cognitive sciences, Delta-wye transformer, Transformer, 050107 human factors, Substrates, business.industry, 020208 electrical & electronic engineering, 05 social sciences, Electrical engineering, Power supplies, Transformer cores, business, Transformer types
Abstract: International audience; A PCB embedded transformer for harsh environment (i.e., ambient temperature above 200 • C) applications is presented and used in the design of a 2 MHz integrated power-supply prototype for gate driver. The main benefits of using this developed PCB embedding process are the capability to customize the air-gap for the flyback transformer and volume reduction for the converter. The easy modulation of the air-gap distance can be achieved using PCB material in specfic thickness. Moreover, the design of a coplanar-winding transformer structure with very low inter-winding capacitance needs a large winding area and raises the interest for the PCB integration approach. Two-machined ferrite pieces in UI shape were sandwiched into a multi-layer PCB laminate with multiple pressing processes. A converter prototype built with the PCB embedded transformer and other components (GaN transistors, gate driver and passives) mounted above it shows 72% of power efficiency. One thousand thermal cycles between −55 • C and 200 • C were performed on the PCB embedded transformer without observation of any major defects, such as delamination and cracking. The thermal reliability test validates the compatibility between the selected ferrite core and PCB materials as well as the feasibility of this developed transformer embedding method. A three-time volume reduction is achieved when comparing with a benchmark converter prototype using discrete transformer.
Published: 2016
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89. Mechanical Study of Copper Bonded at Low Temperature Using Spark Plasma Sintering Process

Author: Damien Fabrègue, Cyril Buttay, Bruno Allard, Bassem Mouawad, Maher Soueidan, Vincent Bley, Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), lebanese Atomic Energy Commission, National Council for Scientific Research = Conseil national de la recherche scientifique du Liban [Lebanon] (CNRS-L), Matériaux, ingénierie et science [Villeurbanne] (MATEIS), Centre National de la Recherche Scientifique (CNRS)-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA), Matériaux Diélectriques dans la Conversion d’Energie (LAPLACE-MDCE), LAboratoire PLasma et Conversion d'Energie (LAPLACE), Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université Fédérale Toulouse Midi-Pyrénées-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées, and Ampère, Publications
Subjects: 010302 applied physics, Materials science, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Metallurgy, General Engineering, Spark plasma sintering, chemistry.chemical_element, 02 engineering and technology, 021001 nanoscience & nanotechnology, 01 natural sciences, Copper, Temperature and pressure, chemistry, Bonding strength, 0103 physical sciences, Ultimate tensile strength, Copper bonding, Surface roughness, 0210 nano-technology, Tensile test, [SPI.NRJ] Engineering Sciences [physics]/Electric power, Spark Plasma Sintering, Tensile testing
Abstract: International audience; Bonding of high purity polished copper was investigated using the Spark Plasma Sintering technique (SPS) showing the effect of SPS parameters (surface roughness, time, temperature and pressure) on the bonding strength behaviour. Mechanical characterization of the bonded samples was performed at room temperature using tensile test. Two surfaces roughnesses were studied (un-polished and polished samples). It was found that the bonding strength varied from 50 MPa to 233 MPa for un-polished and polished surfaces respectively The tensile strength of the used bulk copper-rod was found to be 365 MPa, while most results are over 122 MPa (a third of the bulk value).
Published: 2011
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90. Effect of High Temperature Ageing on Active and Passive Power Devices

Author: Remi Robutel, Dominique Bergogne, Cyril Buttay, Thibaut Chailloux, Christophe Raynaud, Christian Martin, Simeon Dampieni, Ampère, Publications, Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), and Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)
Subjects: Materials science, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, Inductor, 01 natural sciences, 7. Clean energy, law.invention, Hardware_GENERAL, law, 0103 physical sciences, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, Pharmacology (medical), Power semiconductor device, Diode, 010302 applied physics, business.industry, [SPI.NRJ]Engineering Sciences [physics]/Electric power, 020208 electrical & electronic engineering, Electrical engineering, Schottky diode, Active devices, Engineering physics, Power (physics), Capacitor, Magnet, business, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: International audience; The power devices needed to build a high-temperature converter (inductors, capacitors and active devices) have been stored at 200°C for up to 1000 hrs. Their characteristics have been monitored. Capacitors and magnetic materials from various manufacturers and technologies are tested, as well as silicon-carbide diodes. It is shown that by carefully choosing the components, it is possible to build a reliable power converter operating at high temperature.
Published: 2010
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91. Applications-Based Design of SiC Technology

Author: Pearl Agyakwa, Robert Skuriat, Christopher Mark Johnson, Nicolas G. Wright, Cyril Buttay, W.S. Loh, Konstantin Vassilevski, and A.B. Horsfall
Subjects: Engineering, Reliability (semiconductor), Mechanics of Materials, business.industry, Mechanical Engineering, Thermal resistance, Electrical engineering, General Materials Science, Temperature cycling, Condensed Matter Physics, business, Reliability engineering
Abstract: The adoption of SiC devices as a viable technology depends crucially on maximising the potential advantages of the material. This is best achieved by the adoption of co-design techniques in which the optimisation of the SiC device is performed in parallel to that of the package and the overall application. This paper considers suitable techniques for this co-design and describes new approaches to the development of SiC technology for practical applications.
Published: 2008
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92. Embedded Device Technology for Power Devices

Author: Cyril Buttay, Yu, C., Labouré, E., Vincent Bley, Céline Combettes, and Pistre, Karine
Subjects: [SPI.NRJ] Engineering Sciences [physics]/Electric power
Published: 2016

93. Considerations for High Temperature Power Electronics

Author: Bruno Allard, Cyril Buttay, Christian Martin, Hervé Morel, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and Buttay, Cyril
Subjects: wide band-gap devices, [SPI]Engineering Sciences [physics], power electronics, [SPI] Engineering Sciences [physics], packaging, High temperature, passive devices
Abstract: International audience; High-temperature electronics is driving large development efforts regarding many issues among which the objective of integration. The main objectives for a higher level of integration come with the constraint of increased reliability. At converter level, these objectives face many challenges and 3 of them are discussed here with indication of results contributed by Ampere-lab.
Published: 2015

94. Layout modelling to predict compliance with EMC standards of power electronic converters

Author: Christian Vollaire, Arnaud Bréard, Florent Morel, Anne-Sophie Podlejski, Cyril Buttay, Eliana Rondon-Pinilla, Ampère, Département Méthodes pour l'Ingénierie des Systèmes (MIS), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Ampère, Département Energie Electrique (EE), and FRAE, projet ACCITE
Subjects: Engineering, business.industry, Capacitive sensing, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Converters, Layout modelling, 7. Clean energy, law.invention, Capacitor, Software, Design layout record, power electronics, law, Power electronics, conducted emissions, Electronic engineering, Equivalent circuit, business, IC layout editor
Abstract: International audience; In power electronics, the layout of a converter is known to have a significant impact on its conducted emissions. This paper focuses on layout modelling in order to predict converter compliance with EMC standards before prototype manufacturing. Inductive effects and capacitive parasitic effects should be considered and models in the form of equivalent circuits are required by time domain simulators. In recent works, a software was used to obtain an equivalent circuit of the inductive effects and analytic calculations were performed to add equivalent capacitors. In this paper a single software is used to generate a model which includes both capacitive and inductive effects. The existing method and the proposed one show very similar results and fit well with experimental results. The proposed method requires less efforts and is more scalable since it can be applied to complex geometries.
Published: 2015
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95. Thermal management of lateral GaN power devices

Author: Cyril Buttay, Eric Laboure, Chenjiang Yu, Laboratoire Génie électrique et électronique de Paris (GeePs), Université Paris-Sud - Paris 11 (UP11)-Université Pierre et Marie Curie - Paris 6 (UPMC)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), and Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)
Subjects: Materials science, 020209 energy, Thermal resistance, chemistry.chemical_element, 02 engineering and technology, 7. Clean energy, Die (integrated circuit), law.invention, 3D packaging, [SPI]Engineering Sciences [physics], Flex circuit, law, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, thermal management, Power semiconductor device, Ceramic, business.industry, 020208 electrical & electronic engineering, Transistor, dBc, Copper, flip-chip, chemistry, visual_art, visual_art.visual_art_medium, Optoelectronics, GaN power device, business, Flip chip
Abstract: International audience; This article investigates several thermal management techniques for GaN transistors with a Wafer-Level Packaging (WLP): advanced techniques are used to mount them on Direct-Bonded Copper (DBC) ceramic substrates, with the heat removed either through the topside of the die (as recommended by the manufacturer), or through the backside. The thermal resistance of the assembly is measured in the different configurations, for different die thicknesses. The paper describes the manufacturing process and the thermal simulation and experimental results will be shown.
Published: 2015
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96. Highly integrated power electronic converters using active devices embedded in printed-circuit board

Author: Chenjiang Yu, Cyril Buttay, Eric Labouré, Vincent Bley, Céline Combettes, Laboratoire Génie électrique et électronique de Paris (GeePs), Université Paris-Sud - Paris 11 (UP11)-Université Pierre et Marie Curie - Paris 6 (UPMC)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Matériaux Diélectriques dans la Conversion d’Energie (LAPLACE-MDCE), LAboratoire PLasma et Conversion d'Energie (LAPLACE), Université Toulouse III - Paul Sabatier (UT3), Université de Toulouse (UT)-Université de Toulouse (UT)-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université de Toulouse (UT)-Université Toulouse III - Paul Sabatier (UT3), Université de Toulouse (UT), IMAPS, ANR-12-BS09-0005,ETHAER,Electronique de puissance à Très Hautes performances pour l'AERonautique(2012), Centre National de la Recherche Scientifique (CNRS)-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Institut National Polytechnique (Toulouse) (Toulouse INP), Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Université Toulouse III - Paul Sabatier (UT3), and Université Fédérale Toulouse Midi-Pyrénées
Subjects: [SPI]Engineering Sciences [physics], PCB, Hardware_INTEGRATEDCIRCUITS, DBC, Hardware_PERFORMANCEANDRELIABILITY, 3-D packaging, Hardware_LOGICDESIGN
Abstract: International audience; In this paper, we present a short overview of the power dies interconnects based on PCB technology, then we focus on embedding of power dies in the PCB material. In the second part of the article, we present in details the technology we developed to embed dies in PCB. Results show that the electrical performance of the die remains satisfying after embedding, but that dies with a copper topside metal layer are required for this process.
Published: 2015

97. Silver sintering for power electronics integration

Author: Cyril Buttay, Bruno Allard, Raphaël Riva, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), IRT Saint Exupéry - Institut de Recherche Technologique, IMAPS, Centre National de la Recherche Scientifique - CNRS (FRANCE), Institut National des Sciences Appliquées de Lyon - INSA (FRANCE), Université Claude Bernard-Lyon I - UCBL (FRANCE), and IRT Saint Exupéry - Institut de Recherche Technologique (FRANCE)
Subjects: Energie électrique, Materials science, Assembly, chemistry.chemical_element, Sintering, 02 engineering and technology, Capacitors, 01 natural sciences, law.invention, [SPI]Engineering Sciences [physics], law, Power electronics, 0103 physical sciences, Thermal, Electronique, 010302 applied physics, Internet, Substrates, Metallurgy, Process (computing), 021001 nanoscience & nanotechnology, Copper, Capacitor, chemistry, Soldering, visual_art, Electronic component, visual_art.visual_art_medium, Electrical thermal performance Switches, 0210 nano-technology
Abstract: International audience; Silver sintering is an attractive alternative to soldering in power electronics, as it offers higher electrical and thermal performance. Furthermore, sintered attaches can operate at a higher temperature. In this paper, we investigate the use of silver sintering for the bonding of passive components, and for the manufacturing of so-called 3D-modules. It is shown that this technique is well suited, as it makes it possible to operate at very high temperature (up to 310 °C demonstrated), and as it simplifies the assembly process (several identical sintering steps can be performed successively without problem).
Published: 2015
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98. Semi-passive piezoelectric noise control in transmission by synchronized switching damping on voltage source

Author: Adil Faiz, Daniel Guyomar, Lionel Petit, and Cyril Buttay
Subjects: Electromechanical coupling coefficient, Physics, Frequency band, Acoustics, Attenuation, General Physics and Astronomy, Voltage source, Dissipation, Inductor, Damping torque, Voltage
Abstract: This paper deals with the so called SSD (stands for Synchronized Switch Damping) technique that is a semi-passive approach developed to address the problem of structural vibration damping and noise reduction. Compared to standard passive piezoelectric damping, this technique offers the advantage of self-adaptation with environmental variations (e.g. temperature). On the contrary to the active damping systems, its implementation does not require any sophisticated signal processing or any bulk power. In the semi passive approach, the piezoelectric element is continuously switched from open circuit to short circuit synchronously to the strain. Due to this switching mechanism, a phase difference appears between the strain induced by an incident acoustic wave and the resulting voltage, thus creating energy dissipation. With the non-linear process, damping performances directly depend on the electromechanical coupling coefficient of the system. For the weakly coefficient coupling systems, the voltage amplitude of the piezoelectric elements can be artificially increased by switching on voltage sources. Using this new method SSDV (stands for Synchronized Switch Damping on Voltage source), 16.1dB attenuation on the transmitted wave pressure in the tube is obtained whereas only 8dB were achieved with the classical SSDI (stands for Synchronized Switch Damping on Inductor). Furthermore, as this method is adaptive, attenuation is observed over a 600 Hz-wide frequency band.
Published: 2005
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99. Direct Copper Bonding for Power Interconnects: Design, Manufacturing, and Test

Author: Benoit Schlegel, Maher Soueidan, Benoit Thollin, Vincent Bley, Cyril Buttay, Laurent Dupont, Bassem Mouawad, Jean-Christophe Crebier, Julien Pezard, Damien Fabrègue, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Institut National des Sciences Appliquées (INSA)-Université de Lyon-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Institut National des Sciences Appliquées (INSA)-Université de Lyon-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Laboratoire des Technologies Nouvelles (IFSTTAR/COSYS/LTN), Institut Français des Sciences et Technologies des Transports, de l'Aménagement et des Réseaux (IFSTTAR), Matériaux Diélectriques dans la Conversion d’Energie (LAPLACE-MDCE), LAboratoire PLasma et Conversion d'Energie (LAPLACE), Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université Fédérale Toulouse Midi-Pyrénées-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées, Matériaux, ingénierie et science [Villeurbanne] (MATEIS), Centre National de la Recherche Scientifique (CNRS)-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Institut National des Sciences Appliquées (INSA)-Université de Lyon-Institut National des Sciences Appliquées (INSA), Laboratoire de Génie Electrique de Grenoble (G2ELab), Centre National de la Recherche Scientifique (CNRS)-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut Polytechnique de Grenoble - Grenoble Institute of Technology, and ANR-09-BLAN-0036,ECLIPSE,Contacts électro-thermo-mécaniques innovants pour les systèmes et l'électronique de puissance intégrée à grande échelle(2009)
Subjects: Computer science, Assembly, chemistry.chemical_element, Mechanical engineering, 02 engineering and technology, interconnections, assembly method, direct copper-to-copper bonding, 01 natural sciences, 3-D packaging, Industrial and Manufacturing Engineering, semiconductor device manufacture, Heating, Cu-Cu, power semiconductor devices, planar technology, semiconductor device metallisation, [SPI]Engineering Sciences [physics], Planar, Power electronics, thermal management (packaging), 0103 physical sciences, semiconductor device testing, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Hardware_INTEGRATEDCIRCUITS, Electrical and Electronic Engineering, 010302 applied physics, Bonding, Substrates, Manufacturing process, 020208 electrical & electronic engineering, 3D power module structures, spark plasma sintering (SPS), Copper, Electronic, Optical and Magnetic Materials, Characterization (materials science), Power (physics), bonding processes, power electronics, chemistry, 3D technology, Packaging, Power module, manufacturing process, parasitic inductances, semiconductor device packaging, power interconnects
Abstract: International audience; 3-D power module structures allow for better cooling and lower parasitic inductances compared with the classical planar technology. In this paper, we present a 3-D technology that uses an innovative assembly method (direct copper-to-copper bonding). The concept and manufacturing process of this technology is described in detail. An accurate electrical characterization is then performed to compare its performance with that of the classical planar structures.
Published: 2015
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100. Study of short-circuit robustness of SiC MOSFETs, analysis of the failure modes and comparison with BJTs

Author: Denis Labrousse, Hervé Morel, Cheng Chen, Mickael Petit, Stéphane Lefebvre, Cyril Buttay, Lefebvre, Stéphane, Systèmes et Applications des Technologies de l'Information et de l'Energie (SATIE), École normale supérieure - Cachan (ENS Cachan)-Université Paris-Sud - Paris 11 (UP11)-Institut Français des Sciences et Technologies des Transports, de l'Aménagement et des Réseaux (IFSTTAR)-École normale supérieure - Rennes (ENS Rennes)-Université de Cergy Pontoise (UCP), Université Paris-Seine-Université Paris-Seine-Conservatoire National des Arts et Métiers [CNAM] (CNAM)-Centre National de la Recherche Scientifique (CNRS), Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), Electronique de Puissance et Intégration (SATIE-EPI), Composants et Systèmes pour l'Energie Electrique (CSEE), Université Paris-Seine-Université Paris-Seine-Conservatoire National des Arts et Métiers [CNAM] (CNAM)-Centre National de la Recherche Scientifique (CNRS)-École normale supérieure - Cachan (ENS Cachan)-Université Paris-Sud - Paris 11 (UP11)-Institut Français des Sciences et Technologies des Transports, de l'Aménagement et des Réseaux (IFSTTAR)-École normale supérieure - Rennes (ENS Rennes)-Université de Cergy Pontoise (UCP), and Université Paris-Seine-Université Paris-Seine-Conservatoire National des Arts et Métiers [CNAM] (CNAM)-Centre National de la Recherche Scientifique (CNRS)-Systèmes et Applications des Technologies de l'Information et de l'Energie (SATIE)
Subjects: SiC, Materials science, [SPI] Engineering Sciences [physics], BJT, Time-dependent gate oxide breakdown, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, 01 natural sciences, law.invention, MOSFET, [SPI]Engineering Sciences [physics], chemistry.chemical_compound, Robustness (computer science), law, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Silicon carbide, Hardware_INTEGRATEDCIRCUITS, Electrical and Electronic Engineering, Safety, Risk, Reliability and Quality, 010302 applied physics, business.industry, [SPI.NRJ]Engineering Sciences [physics]/Electric power, 020208 electrical & electronic engineering, Transistor, Bipolar junction transistor, Electrical engineering, short circuit, Condensed Matter Physics, Atomic and Molecular Physics, and Optics, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, chemistry, Optoelectronics, business, Short circuit, AND gate, Hardware_LOGICDESIGN, [SPI.NRJ] Engineering Sciences [physics]/Electric power
Abstract: International audience; This paper presents experimental robustness tests made on Silicon Carbide (SiC) MOSFETs and SiC Bipolar Junction Transistors (BJTs) submitted to short-circuit operations (SC) or current limitation modes. For SiC MOSFETs, a gate leakage current is detected before failure without being responsible for the immediate failure. Nevertheless this gate leakage current is not without effect on the integrity of the SiC MOSFETs. Based on several robustness tests performed on SiC MOSFETs and on the comparison with experimental results obtained with SiC BJTs, the paper points out two main failure modes for SiC MOSFETs. The first one results in a simultaneously short circuit between drain and gate and drain and source and the second one in a degradation of the insulation between gate and source leading to a short circuit between gate and source. For some tested devices, the failure appears in a very interesting open state mode between drain and source after physical short-circuit between gate and source with a mode of failure very similar to those observed for SiC BJT.
Published: 2015
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