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To determine scanning electron microscopy (SEM) image resolution, we processed a wafer-based sample that demonstrates directionally isotropic, yet high frequency, details after Fourier transformation [3],[4],[5]. We developed a new fully automatable method that outputs the SEM resolution, beam shape, and eccentricity as results. To verify the influence of further parameters (e.g., scanning conditions, acceleration voltage) on how the resolution influences critical dimension (CD) measurement accuracy, wafers with test structures of a wide range of nominal sizes of lines and contact holes were created. For all CD-SEM measurements, we used a calibrated CD-atomic force microscope (CD-AFM) as a reference [6]. CD-SEM measurements were done on different tool generations with variations in best achievable resolution. Experimental SEM resolution results will be shown, including influences of focus and stigmation. Both the wafer sample for resolution monitoring and a new Fourier-based evaluation method show significant sensitivity to variations in these parameters. By comparing the resolution results in the X and Y directions, astigmatism can be estimated. Even stigmation drifts less than normal daily variations can be observed. Differences in accuracy of less than 30nm to 500nm among different CD-SEM tool generations will be shown, which is revealing when trying to understand the quantitative influence of the SEM resolution on measurement accuracy.

This article describes how an uncertainty analysis may be performed on a scatterometry measurement. A method is outlined for propagating uncertainties through a least-squares regression. The method includes the propagation of the measurement noise as well as estimates of systematic effects in the measurement. Since there may be correlations between the various parameters determined by the measurement, a method is described for visualizing the uncertainty in the extracted profile. The analysis is performed for a 120 nm pitch grating, consisting of photoresist lines 120 nm high, 45 nm critical dimension, and 88° side wall angle, measured with a spectroscopic rotating compensator ellipsometer. The results suggest that, while scatterometry is very precise, there are a number of sources of systematic errors that limit its absolute accuracy. Addressing those systematic errors may significantly improve scatterometry measurements in the future.

For many years, lithographic resolution has been the main obstacle in keeping the pace of transistor densification to meet Moore's Law. For the 45 nm node and beyond, new lithography techniques are being considered, including immersion ArF (iArF) lithography and extreme ultraviolet lithography (EUVL). As in the past, these techniques will use new types of photoresists with the capability to print 45 nm node (and beyond) feature widths and pitches. In a previous paper [1], we focused on ArF and iArF photoresist shrinkage. We evaluated the magnitude of shrinkage for both R&D and mature resists as a function of chemical formulation, lithographic sensitivity, scanning electron microscope (SEM) beam condition, and feature size. Shrinkage results were determined by the well accepted methodology described in ISMI's CD-SEM Unified Specification [2]. A model for resist shrinkage, while derived elsewhere [3], was presented, that can be used to curve-fit to the shrinkage data resulting from multiple repeated measurements of resist features. Parameters in the curve-fit allow for metrics quantifying total shrinkage, shrinkage rate, and initial critical dimension (CD) from before e-beam exposure. The ability to know this original CD is the most desirable result; in this work, the ability to use extrapolation to solve for a given original CD value was also experimentally validated by CD-atomic force microscope (AFM) reference metrology. Historically, many different conflicting shrinkage results have been obtained among the many works generated through the litho-metrology community. This work, backed up by an exhaustive dataset, will present an explanation that makes sense of these apparent discrepancies. Past models for resist shrinkage inherently assumed that the photoresist line is wider than the region of the photoresist to be shrunk [3], or, in other words, the e-beam never penetrates enough to reach all material in the interior of a feature; consequently, not all photoresist is affected by the shrinkage process. In actuality, there are two shrinkage regimes, which are dependent on resist feature CD or thickness. Past shrinkage models are true for larger features. However, our results show that when linewidth becomes less than the eventual penetration depth of the e-beam after full shrinkage, the apparent shrinkage magnitude decreases while shrinkage speed accelerates. Thus, for small features, most shrinkage occurs within the first measurement. This is crucial when considering the small features to be fabricated by immersion lithography. In this work, the results from the previous paper [1] will be shown to be consistent with numerically simulated results, thus lending credibility to the postulations in [1]. With these findings, we can conclude with observations about the readiness of SEM metrology for the challenges of both dry and immersion ArF lithographies as well as estimate the errors involved in calculating the original CD from the shrinkage trend.

Non-planar transistor architectures, such as tri-gates or "FinFETs", have evolved into important solutions to the severe challenges emerging in thermal and power efficiency requirements at the sub-32 nm technology nodes. These architectures strain traditional dimensional metrology solutions due to their complex topology, small dimensions, and number of materials. In this study, measurements of the average dielectric layer thickness are reported for a series of structures that mimic non-planar architectures. The structures are line/space patterns (≈ 20 nm linewidth) with a conformal layer of sub-15 nm thick high-k dielectric. Dimensions are measured using a transmission X-ray scattering technique, critical dimension small angle X-ray scattering (CD-SAXS). Our test results indicate that CD-SAXS can provide high precision dimensional data on average CD, pitch, and high-k dielectric layer thickness. CD-SAXS results are compared with analogous data from both top-down scanning electron microscopy and cross-sectional transmission electron microscopy. In addition, we demonstrate the capability of CD-SAXS to quantify a periodic deviation in pitch induced by an imperfection in the phase shift mask.

Ever shrinking measurement uncertainty requirements are difficult to achieve for a typical metrology toolset, especially over the entire expected life of the fleet. Many times, acceptable performance can be demonstrated during brief evaluation periods on a tool or two in the fleet. Over time and across the rest of the fleet, the most demanding processes often have measurement uncertainty concerns that prevent optimal process control, thereby limiting premium part yield, especially on the most aggressive technology nodes. Current metrology statistical process control (SPC) monitoring techniques focus on maintaining the performance of the fleet where toolset control chart limits are derived from a stable time period. These tools are prevented from measuring product when a statistical deviation is detected. Lastly, these charts are primarily concerned with daily fluctuations and do not consider the overall measurement uncertainty. It is possible that the control charts implemented for a given toolset suggest a healthy fleet while many of these demanding processes continue to suffer measurement uncertainty issues. This is especially true when extendibility is expected in a given generation of toolset. With this said, there is a need to continually improve the measurement uncertainty of the fleet until it can no longer meet the needed requirements at which point new technology needs to be entertained. This paper explores new methods in analyzing existing SPC monitor data to assess the measurement performance of the fleet and look for opportunities to drive improvements. Long term monitor data from a fleet of overlay and scatterometry tools will be analyzed. The paper also discusses using other methods besides SPC monitors to ensure the fleet stays matched; a set of SPC monitors provides a good baseline of fleet stability but it cannot represent all measurement scenarios happening in product recipes. The analyses presented deal with measurement uncertainty on non-measurement altering metrology toolsets such as scatterometry, overlay, atomic force microscopy (AFM) or thin film tools. The challenges associated with monitoring toolsets that damage the sample such as the CD-SEMs will also be discussed. This paper also explores improving the monitoring strategy through better sampling and monitor selection. The industry also needs to converge regarding the metrics used to describe the matching component of measurement uncertainty so that a unified approach is reached regarding how to best drive the much needed improvements. In conclusion, there will be a discussion on automating these new methods3,4 so they can complement the existing methods to provide a better method and system for controlling and driving matching improvements in the fleet.

This paper compares and contrasts different combinations of scatterfield and scatterometry optical configurations as well as introduces a new approach to embedding atomic force microscopy (AFM) or other reference metrology results directly in the uncertainty analysis and library-fitting process to reduce parametric uncertainties. We present both simulation results and experimental data demonstrating this new method, which is based on the application of a Bayesian analysis to library-based regression fitting of optical critical dimension (OCD) data. We develop the statistical methods to implement this approach of nested uncertainty analysis and give several examples, which demonstrate reduced uncertainties in the final combined measurements. The approach is also demonstrated through a combined reference metrology application using several independent measurement methods.

Due to greater emphasis on precision than accuracy, many of the measurements made in semiconductor fabrication facilities are not traceable to the SI (Systeme International d'Unites or International System of Units) unit of length. However as the feature sizes of integrated circuits decrease and the use of lithography models becomes more prevalent, the need for accuracy cannot be overemphasized. In response, the National Institute of Standards and Technology (NIST) in conjunction with SEMATECH has developed a reference measurement system (RMS) that can be used to provide accurate measurements for inline metrology tools. The RMS is a critical dimension atomic force microscope (CD-AFM) with traceability to the SI meter. In this paper we present a set of strategies for achieving accuracy for different types of measurands within an RMS and examine several important factors when selecting reference instruments. We also present results of a recent evaluation of linewidth and height using two CD-AFMs and a calibrated AFM with displacement interferometry in all three axes. We further look at the stability of tips such as carbon nanotubes.

Critical dimension small angle X-ray scattering (CD- SAXS) is a metrology platform that is capable of measuring the average cross section and linewidth roughness (LWR) in test patterns with pitches ranging from 10 to 500 nm with sub-nm precision. These capabilities are obtained by measuring and modeling the scattering intensities of a collimated X-ray beam with sub-nm wavelength from a periodic pattern, such as those found in optical scatterometry targets. In this work, we evaluated the capability of both synchrotron-based and laboratory-scale CD-SAXS for characterizing LWR from measurements of periodic line/space patterns fabricated with extreme ultraviolet (EUV) lithography with sub-50 nm linewidths and designed with programmed roughness amplitude and frequency. For these patterns, CD-SAXS can provide high precision data on cross section dimension, including sidewall angle, line height, linewidth and pitch, as well as the amplitude of LWR. We will also discuss the status of ongoing efforts to compare quantitatively the CD- SAXS data with top-down scanning electron microscopy (CD- SEM) measurements.

Critical dimension small angle X-ray scattering (CD-SAXS) is a measurement platform that is capable of measuring the average cross section and sidewall roughness in patterns ranging from (10 to 500) nm in pitch with sub-nm precision. These capabilities are obtained by measuring and modeling the scattering intensities of a collimated X-ray beam with sub-nanometer wavelength from a periodic pattern, such as those found in optical scatterometry targets. In this work, we evaluated the capability a synchrotron-based CD-SAXS measurements to characterize linewidth roughness (LWR) by measuring periodic line/space patterns fabricated with extreme ultraviolet (EUV) lithography with sub-50 nm linewidths and designed with programmed roughness amplitude and frequency. For these patterns, CD-SAXS can provide high precision data on cross-section dimensions, including sidewall angle, line height, line width, and pitch, as well as the LWR amplitude. We also discuss the status of ongoing efforts to compare quantitatively the CD-SAXS data with topdown critical dimension scanning electron microscopy (CD-SEM) measurements.

Aggressive CMOS transistor scaling requirements have motivated the IC industry to look beyond simply reducing the film thickness or implementing different gate stack materials towards fundamentally redesigning the transistor architecture by forcing the silicon channel to protrude upwards from the planar (2D) substrate. These 3D transistors, namely FinFETs, ideally offer at least a 2X improvement in the drive current since more than one surface is available, for which the minority carrier population can be adjusted by an applied voltage. However, the ability to modulate this voltage is known to suffer due to the non-uniform film deposition on the three sides of the Si Fin. This concern is of immediate interest because it impedes device performance and future integration since subtle differences among the thicknesses on each side of the Fin will negatively impact threshold voltage and the capability to tune the effective work function. It is therefore necessary to have an in-line metrology capability that can properly characterize and understand the deposition of both the high-k and metal gate film on the sidewalls of the Fin in order for FinFETs to ultimately replace planar CMOS devices. We will report on the ability of scatterometry to accurately measure the high-k and metal film thickness on the sidewall of the FinFET. The results will be discussed in detail with emphasis on sensitivity towards fin critical dimension (CD) and sidewall thickness, and comparison of the conclusions reached from the analysis with cross-sectional transmission electron microscopy (TEM) data.

The International Technology Roadmap for Semiconductors (ITRS) provides a set of Metrology specifications as targets for each technology node. In the current edition (2007) of the ITRS the conventional precision (reproducibility) is replaced with a new metric - measurement uncertainty for dimensional metrology 1 . This measurement uncertainty contains single tool precision, tool-to-tool matching, sampling uncertainty, and inaccuracy (sample-to-sample bias variation and other effects). Clearly, sampling uncertainty is a major component of measurement uncertainty. This paper elaborates on sampling uncertainty and provides statistical estimates for sampling uncertainty. The authors in this paper address the importance and the methods of proper sampling. The correct sampling captures and allows for the expression of the information needed for adequate patterning process control. Along with typical manufacturing process control cases (excursion control, advanced and statistical process control), several other applications are explored such as optical and electron beam line width measurement calibration, measurement tool evaluations, lithographic scanner assessment and optical proximity correction implementation. The authors show how appropriate choices among measurement techniques, sampling methods, and interpretation of measurement results give meaningful information for process control and demonstrate how an incorrect choice can lead to wrong conclusions.

In the sub-90 nm technology nodes, optical metrology techniques are essential for process control of gate formation steps, from lithography to etch layers such as gate, trench, and dielectric interconnect layers and to spacers and straining layer depositions. Conventionally, optical metrology is based on measurements of periodic line or hole arrays (i.e., gratings) using spectroscopic ellipsometers or polarized reflectometers, collecting data across wide wavelength spectra at a single angle of incidence. In this paper, we present results of measurements on periodic etched amorphous-Si gate line arrays using focused beam ellipsometry (FBE), illuminating at three discrete laser wavelengths while data is collected over angles of incidence ranging from 45° to 65°. Results on thoroughly characterized samples representative of 65 and 45 nm technology are presented. These samples include a variety of both line critical dimensions (CDs) (from 18-50 nm) and line pitches (from 200-700nm) for dense and isolated lines arrays. We discuss precision and accuracy in terms of total measurement uncertainty; spot size, navigation, and tool matching are also presented. FBE-based metrology will meet current process control requirements within a substantial margin.

Over the last few years, the need for shape metrology for process control has increased. A key component of shape metrology is sidewall angle (SWA). However, few instruments measure SWA directly. The critical dimension atomic force microscope (CD-AFM) is one such instrument. The lateral scanning capability and the shape of the CD-AFM probe enable direct access to the feature sidewall. This produces profile information that could be used as a process monitor. Due to their relative insensitivity to material properties, CD-AFMs have been used as reference measurement systems (RMS) for measurands such as width. We present a technique for calculating the uncertainty of sidewall angle measurements using a CD-AFM. We outline an overall calibration strategy; address the uncertainty sources for such measurements, including instrument-related and parameter extraction; related; and discuss the way the calibration is transferred to workhorse instruments.

Critical dimension small angle X-ray scattering (CD-SAXS) is a metrology platform capable of measuring the average cross section and line width roughness (LWR) with a sub-nm precision in test patterns with line widths ranging from 10 to 500 nm. The X-ray diffraction intensities from a collimated X-ray beam of sub-Angstrom wavelength were collected and analyzed to determine line width, pitch, sidewall angle, LWR, and others structural parameters. The capabilities of lab-scale and synchrotron-based CD-SAXS tools for LWR characterization were tested by measuring a set of identical patterns with designed roughness amplitude and frequency. These test patterns were fabricated using EUV lithography with sub-50 nm linewidths. To compensate for the limited photon flux from the lab-based X-ray source, the incident beam of the lab system was collimated to a less extent than the synchrotron beam-based tool. Consequently, additional desmearing is needed to extract information from data obtained from lab-based equipment. We report the weighted nonlinear least-squares algorithm developed for this purpose, in addiiton to a comparison between the results obtained from our lab system and the synchrotron beam-based tool.

For many years, lithographic resolution has been the main obstacle for keeping the pace of transistor densification to meet Moore's Law. For the 45 nm node and beyond, new lithography techniques are being considered, including immersion ArF lithography (iArF) and extreme ultraviolet (EUV) lithography. As in the past, these techniques will use new types of photoresists with the capability to print 45 nm node (and beyond) feature widths and pitches. In a previous paper ("SEM Metrology for Advanced Lithographies," Proc SPIE, v6518, 65182B, 2007), we compared the effects of several types of resists, ranging from deep ultraviolet (DUV) (248 nm) through ArF (193 nm) and iArF to extreme UV (EUV, 13.5 nm). iArF resists were examined, and the results from the available resist sample showed a tendency to shrink in the same manner as the ArF resist but at a lower magnitude. This paper focuses on variations of iArF resists (different chemical formulations and different lithographic sensitivities) and examine new developments in iArF resists during the last year. We characterize the resist electron beam induced shrinkage behavior under scanning electron microscopy (SEM) and evaluate the shrinkage magnitude on mature resists as well as R&D resists. We conclude with findings on the readiness of SEM metrology for these challenges.

This paper is a comprehensive summary and analysis of a SEMATECH funded project to study the limits of optical critical dimension scatterometry (OCD). The project was focused on two primary elements: 1) the comparison, stability, and validity of industry models and 2) a comprehensive analysis of process stacks to evaluate the ultimate sensitivity and limits of OCD. Modeling methods are a requirement for the interpretation and quantitative analysis of scatterometry data. The four models evaluated show good agreement over a range of targets and geometries for zero order specular reflection as well as higher order diffraction. A number of process stacks and geometries representing semiconductor manufacturing nodes from the 45 nm node to the 18 nm node were simulated using several measurement modalities including angle-resolved scatterometry and spectrally-resolved scatterometry, measuring various combinations of intensity and polarization. It is apparent in the results that large differences are observed between those methods that rely upon unpolarized and single polarization measurements. Using the three parameter fits and assuming that the sensitivity of scatterometry must meet the criterion that the 3σ uncertainty in the bottom dimension must be less than 2% of the linewidth, specular scatterometry solutions exist for all but the isolated lines at 18 nm node. Scatterometry does not have sufficient sensitivity for isolated and semi-isolated lines at the 18 nm node unless the measurement uses wavelengths as short as 200 nm or 150 nm and scans over large angle ranges.

The conventional premise that metrology is a "non-value-added necessary evil" is a misleading and dangerous assertion, which must be viewed as obsolete thinking. Many metrology applications are key enablers to traditionally labeled "value-added" processing steps in lithography and etch, such that they can be considered integral parts of the processes. Various key trends in modern, state-of-the-art processing such as optical proximity correction (OPC), design for manufacturability (DFM), and advanced process control (APC) are based, at their hearts, on the assumption of fine-tuned metrology, in terms of uncertainty and accuracy. These trends are vehicles where metrology thus has large opportunities to create value through the engineering of tight and targetable process distributions. Such distributions make possible predictability in speed-sorts and in other parameters, which results in high-end product. Additionally, significant reliance has also been placed on defect metrology to predict, improve, and reduce yield variability. The necessary quality metrology is strongly influenced by not only the choice of equipment, but also the quality application of these tools in a production environment. The ultimate value added by metrology is a result of quality tools run by a quality metrology team using quality practices. This paper will explore the relationships among present and future trends and challenges in metrology, including equipment, key applications, and metrology deployment in the manufacturing flow. Of key importance are metrology personnel, with their expertise, practices, and metrics in achieving and maintaining the required level of metrology performance, including where precision, matching, and accuracy fit into these considerations. The value of metrology will be demonstrated to have shifted to "key enabler of large revenues," debunking the out-of-date premise that metrology is "non-value-added." Examples used will be from critical dimension (CD) metrology, overlay, films, and defect metrology.

One of the key challenges in critical dimension (CD) metrology is finding suitable calibration standards. Over the last few years there has been some interest in using features measured with the transmission electron microscope (TEM) as primary standards for linewidth measurements. This is because some modes of TEM can produce lattice-resolved images having scale traceability to the SI (Systeme International d'Unites or International System of Units) definition of length through an atomic lattice constant. As interest in using calibration samples that are closer to the length scales being measured increases, so will the use of these TEM techniques. An area where lattice-traceable images produced by TEM has been used as a primary standard is in critical dimension atomic force microscope (CD-AFM) tip width calibration. Two modes of TEM that produce crystal lattice-traceable images are high resolution transmission electron microscope (HR-TEM) and high angle annular dark field scanning transmission electron microscope (HAADF-STEM). HR-TEM produces lattice-traceable images by interference patterns of the diffracted and transmitted beams rather than the actual atomic columns, while HAADF-STEM produces direct images of the crystal lattice. The difference in how both of these techniques work could cause subtle variations in the way feature edges are defined. In this paper, we present results from width samples measured using HR-TEM and HAADF-STEM. Next we compare the results with measurements taken from the same location by two different CD-AFMs. Both of the CD-AFM instruments used for this work have been calibrated using a single crystal critical dimension reference material (SCCDRM). These standards, developed by the National Institute of Standards and Technology (NIST) and SEMATECH, used HR-TEM for traceable tip-width calibration. Consequently, the present work and the previous SCCDRM work provide a mutual cross-check on the traceability of the width calibration. Excellent agreement was observed.

For many years, lithographic resolution has been the main obstacle for keeping the pace of transistor densification to meet Moore's Law. The industry standard lithographic wavelength has evolved many times, from G-line to I-line, deep ultraviolet (DUV) based on KrF, and 193nm based on ArF. At each of these steps, new photoresist materials have been used. For the 45nm node and beyond, new lithography techniques are being considered, including immersion ArF lithography and extreme ultraviolet (EUV) lithography. As in the past, these techniques will use new types of photoresists with the capability of printing 45nm node (and beyond) feature widths and pitches. This paper will show results of an evaluation of the critical dimension-scanning electron microscopy (CD-SEM)-based metrology capabilities and limitations for the 193nm immersion and EUV lithography techniques that are suggested in the International Technology Roadmap for Semiconductors. In this study, we will print wafers with these emerging technologies and evaluate the performance of SEM-based metrology on these features. We will conclude with preliminary findings on the readiness of SEM metrology for these new challenges.

The need for 3D metrology is becoming more urgent to address critical gaps in metrology for both lithographic and etch processes. Current generation lithographic processing (ArF source, where λ=193 nm) sometimes results in photoresist lines with re-entrant profiles or T-topping, as do many etch processes. A re-entrant profile misleads top-down metrology into reading the critical dimension (CD) as too large. Recent advances in gate process technology also raise challenges to traditional top-down metrology. One such example is the FinFET, which is truly a 3D device with 3D metrology needs. The ability to measure the bottom width of a profile is crucial for process control. Recently, tilt-beam critical dimension-scanning electron microscopy (CD-SEM) applications have been developed to measure the bottom CD of such features, using the tilted-view to "see" the bottom, avoiding the feature's larger top. This is an important achievement, as the bottom of a profile is the main feature of interest in many processes. Estimation of sidewall angle (SWA) is also important. For several years, tilt-beam CD-SEM has been an available technique for this measurement, with limited adoption by the litho-metrology community. However, in this paper we will explore another method to use the tilt feature to measure average sidewall angle, based on edgewidth measurement and the assumption of basic trapezoidal profile and known height and combined with the ability to sample multiple-features. While it will not provide exact profile shape, this technique can be quite useful in providing average profile information and will definitely exhibit good throughput. Samples used will be photoresist and etched FinFET structures to measure sidewall angles. Correlations of the results to a traceable CD-atomic force microscopy (AFM) reference measurement system are provided. Conclusions will show preliminary findings of the readiness of tilt-beam CD-SEM for measuring profile and, by extension, the status of measuring 3D structures such as FinFETs, and using CD-SEM as a direct control of lithographic tooling for T-topped photoresist profiles.

The need to characterize line edge and line width roughness in patterns with sub-50 nm critical dimension challenges existing platforms based on electron microscopy and optical scatterometry. The development of x-ray based metrology platforms provides a potential route to characterize a variety of parameters related to line edge roughness by analyzing the diffracted intensity from a periodic array of test patterns. In this study, data from a series of photoresist line/space patterns featuring programmed line width roughness measured by critical dimension small angle x-ray scattering (CDSAXS) is presented. For samples with periodic roughness, CD-SAXS provides the wavelength and amplitude of the periodic roughness through satellite diffraction peaks. In addition, the rate of decay of intensity, termed an effective "Debye-Waller" factor, as a function of scattering vector provides a measure of the fluctuation in line volume. CDSAXS data are compared to analogous values obtained from critical dimension scanning electron microscopy (CDSEM). Correlations between the techniques exist, however significant differences are observed for the current samples. Calibrated atomic force microscopy (C-AFM) data reveal large fluctuations in both line height and line width, providing a potential explanation for the observed disparity between CD-SEM and CD-SAXS.

Requirements for increasingly integrated metrology solutions continue to drive applications that incorporate process characterization tools, as well as the ability to improve metrology production capability and cycle time, with a single application. All of the most critical device layers today, along with even non-critical layers, now require optical proximity correction (OPC), which must be rigorously modeled and calibrated as part of process development and extensively verified once new product reticles are released using critical dimension-scanning electron microscopy (CD-SEM) tools. Automatic setup of complex recipes is one of the major trends in CD-SEM applications, which is adding much value to CD-SEM metrology. In addition, as integrated circuit dimensions continue to shrink, local line width variation influences the statistical confidence of a measured CD's representation of the process. A feature, called "Average CD (ACD)," measures multiple targets within the field of view (FOV). ACD allows not only measurements of a single data point representing one discrete feature, but also sampling of the mean and variance of the process. These two applications, automatic recipe creation and ACD, are combined in the second version of the DesignGauge software, which is available for the latest-generation Hitachi S-9380II CD-SEMs. DesignGauge V2 is not only capable of offline recipe creation and CD-SEM control, but it also has the ability to directly transfer design-based recipes into standard CD-SEM recipes. These recipes can be used for OPC model-building and verification as with previous DesignGauge applications. The software also provides design template-based recipe setup for production layer recipes, which yields much needed improvement to production tool utilization, as production recipes can thus be written offline for new products, improving first silicon cycle time, reducing engineering time required to generate recipes, and improving CD-SEM utilization. Another benefit of the application is an improvement in recipe robustness over conventional direct image-based pattern recognition. This work will show an extensive evaluation of DesignGauge V2, including rigorous tests of navigation, pattern recognition success rates, SEM image placement, throughput of recipe creation, and recipe execution. The impact of ACD will also be evaluated.

We present a procedure for evaluating the accuracy and performance of critical dimension (CD) metrology tools used in monitoring the semiconductor manufacturing process. Our method involves a reference measurement instrument and SI traceable reference material to evaluate the accuracy and resolution of CD metrology tools. The achievable accuracy and intrinsic linearity of the tools under test are evaluated with respect to the reference system.

The need to characterize line edge and line width roughness in patterns with sub‐50 nm critical dimensions challenges existing platforms based on electron microscopy and optical scatterometry. The development of x‐ray based metrology platforms provides a potential route to characterize a variety of parameters related to line edge roughness by analyzing the diffracted intensity from a periodic array of test patterns. In this study, data from a series of photoresist line/space patterns featuring programmed line width roughness are measured by critical dimension small angle x‐ray scattering (CD‐SAXS). For samples with designed periodic roughness, CD‐SAXS provides the wavelength and amplitude of the periodic roughness through satellite diffraction peaks. For real world applications, the rate of decay of intensity, termed an effective “Debye‐Waller” factor in CD‐SAXS, provides an overall measure of the defects of the patterns. CD‐SAXS data are compared to values obtained from critical dimension scanning electron microscopy (CD‐SEM). Correlations between the techniques exist, however significant differences are observed for the current samples. A tapered cross sectional profile provides a likely explanation for the observed differences between CD‐SEM and CD‐SAXS measurements.

The conventional premise that metrology is a "non-value-added necessary evil" is a misleading one, which must he viewed as obsolete thinking. Much of the metrology requirements are now key enablers to traditionally labeled "value-added" processing steps in lithography and etch, such that they can be considered integral parts of the processes. This paper will explore the present and future trends and challenges in CD metrology. However, equipment is only part of the battle. The quality application of these tools in a production environment is quite important; the ultimate value-added by metrology is a result of quality tools run by a quality metrology team using quality practices.

The importance of Critical Dimension (CD) roughness metrics such as Line and Contact edge roughness (LER, CER) and their associated width metrics (LWR, CWR) have been dealt with widely in the literature and are becoming semiconductor industry standards. With the downscaling of semiconductor fabrication technology, the accuracy of these metrics is of increasing importance. One important challenge is to separate the image noise (present in any SEM image) from the physically present roughness. An approach for the removal of the non-systematic image noise was proposed by J.Villarrubia and B.Bunday [Proc. SPIE 5752, 480 (2005)]. In the presented work this approach is tested and extended to deal with the challenge of noise removal in the presence of various types of systematic phenomena present in the imaging process such as CD variation. The study was carried out by means of simulated LWR and using real measurements.

There are numerous metrology challenges facing photolithography for the 45 nm technology node and beyond in the areas of critical dimension (CD), overlay and defect metrology. Many of these challenges are identified in the 2005 International Technology Roadmap for Semiconductors (ITRS) [1]. The Lithography and Metrology sections of the ITRS call for measurement of 45/32/22/18 nm generation linewidth and overlay. Each subsequent technology generation requires less variation in CD linewidth and overlay control, which results in a continuing need for improved metrology precision. In addition, there is an increasing need to understand individual edge variation and edge placement errors relative to the intended design. This is accelerating the need for new methods of CD and overlay measurement, as well as new target structures. This paper will provide a comprehensive overview of the CD and overlay metrology challenges for photolithography, taking into account the areas addressed in the 2005 ITRS for the 45 nm technology generation and beyond.

As the trends in integrated circuit fabrication follow Moore's Law to smaller feature sizes, one trend seen in lithographic technology is the continually increasing use of optical enhancements such as Optical Proximity Correction (OPC). Small size perturbations are designed into the nominal feature shapes on the reticle such that the intended shape is printed. Verifying the success of OPC is critical to ramp-up and production of new process technologies. CD-SEMs are imaging tools which are capable of measuring feature sizes in any part of a chip, either in a test structure or within a circuit. A new trend in CD-SEM utilization is the implementation of automated recipe generation of complex CD-SEM recipes. The DesignGauge system uses design-to-SEM recipe creation and data collection. Once the recipe creation flow is implemented, the task of recipe creation can be accomplished within minutes. These applications enable a CD-SEM to be utilized to collect data for very complex OPC CD-SEM recipe runs which measure many different unique linewidths, spaces, and pattern placements within a circuit to check OPC success and lithographic fidelity. The data collection can provide accurate data results that can be utilized for comparing achieved feature measurements to nominal values from the design layout. This new application adds much value to the CD-SEM compared to other technologies such as OCD, as it completes the evaluation of in-circuit behavior to test structures in a scribe lane, something OCD currently cannot do. The present work evaluates the capabilities of DesignGauge, which is available for the latest-generation Hitachi S-9380II CD-SEMs. The evaluation includes rigorous tests of navigation, pattern recognition success rates, SEM image placement, throughput of recipe creation and recipe execution.

Downscaling of semiconductor fabrication technology requires continuous improvements in production process control. To ensure tool-to-tool matching and compatibility of critical dimension-scanning electron microscopy (CD-SEM) measurements to measurements from other technologies, such as optical CD, or from other fabrication entities, accuracy has become a much more important factor than in the past. CD-SEM measurements have always yielded a bias, which can be quite significant, but also typically neglected since it does not vary much over a process window. However, the standard CD-SEM metrology approach to algorithm accuracy (which can be formulated "Accuracy= Precision + Calibration") does not work for small features; i.e., the measurement bias is not constant for small features. Limitations of the standard measurement algorithm, based on the treatment of the singular point of the waveform for CDs smaller than 30 nm and the new model library-based approach, were considered. The implementation of reliable measurement algorithms for features at the 45 nm node and beyond requires development of more sophisticated approaches to SEM signal treatment. A three-dimensional (3-D) physical model that takes into account physical processes related to the beam interaction with material is considered. Reliability of the new approach is verified using Monte-Carlo SEM simulation and real SEM images as compared to reference measurements; total measurement uncertainty (TMU) is improved with the better models. The relation of the developed method to the standard SEM measurement algorithm and model-based approach is also considered.

The National Institute of Standards and Technology (NIST) and The International Sematech Manufacturing Initiative (ISMI) have been involved in a project to evaluate the accuracy of optical overlay measurements in the presence of measurement target asymmetries created by typical wafer processing. The ultimate goal of this project is to produce a method of calibrating optical overlay measurements on typical logic and memory production stacks. A method of performing accurate CD-SEM and CD-AFM overlay measurements is first presented. These measurements are then compared to optical overlay measurements of the same structures to assess the accuracy of the optical measurements. Novel image rotation tests were also performed on these structures to develop a method to decouple errors from metrology target asymmetries and measurement system optical asymmetries.

With shrinkage of device size, metrology requirements for Critical Dimension (CD), as defined as the ratio of precision of metrology to process tolerance (P/T), must meet the 0.1 (10%) or 0.2 (20%) criterion.[1][2][14] The precision requirement for gate CD at the 90nm node is thus ~ 0.3nm or less with P/T of 10%, which is far beyond what traditional CD metrology can achieve today. At future nodes, this requirement becomes even tougher, even with P/T of 20%. For years, scatterometry has demonstrated its capability to determine CD and cross sectional profile over periodically aligned line and space (i.e. grating) structures with superior precision. However, to gauge the true capability of scatterometry for process monitoring, the concept of Total Measurement Uncertainty (TMU)[11] of scatterometry in reference to CD-SEM and CD-AFM should be implemented since TMU comprehends both precision and accuracy relative to a reference measurement system. The methodology of implementation of TMU has been discussed in a separate article.[1][12][14][15][17] This paper presents a systematic study on TMU of scatterometry for Final Inspect (FI, post-etch) gate CD and profile, and includes a discussion on how the TMU may be further reduced. One potential option is to feed forward film stack information into the profile modeling, which reduces the number of parameters that have to be calculated during the real-time regression of the scatterometry data.

Linewidth roughness (LWR) is usually estimated simply as three standard deviations of the linewidth. The effect of image noise upon this metric includes a positive nonrandom component. The metric is therefore subject to a bias or "systematic error" that we have estimated can be comparable in size to the roughness itself for samples as smooth as required by the industry roadmap. We illustrate the problem using scanning electron microscope images of rough lines. We propose simple changes to the measurement algorithm that, if adopted by metrology instrument suppliers, would permit estimation of LWR without bias caused by image noise.

Downscaling of semiconductor fabrication technology requires an ever-tighter control of the production process. CD-SEM, being the major image-based critical dimension metrology tool, is constantly being improved in order to fulfill these requirements. One of the methods used for increasing precision is averaging over several or many (ideally identical) features, usually referred to as "Macro CD". In this paper, we show that there is much more to Macro CD technology- metrics characterizing an arbitrary array of similar features within a single SEM image-than just the average. A large amount of data is accumulated from a single scan of a SEM image, providing informative and statistically valid local process characterization. As opposed to other technologies, Macro CD not only provides extremely precise average metrics, but also allows for the reporting of full information on each of the measured features and of various statistics (such as the variability) on all currently reported CD SEM metrics. We present the mathematical background behind Macro CD technology and the opportunity for reducing number of sites for SPC, along with providing enhanced-sensitivity CD metrics.© (2005) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The Advanced Metrology Advisory Group (AMAG) is a council composed of the chief CD-metrologists from the SEMATECH consortium's Member Companies and from the National Institute of Standards (NIST). The AMAG wrote, with OCD tool supplier involvement, the "Unified Advanced Optical Critical Dimension (OCD) Scatterometer Specification for Sub-90nm Technology (2004 Version)" [22] to be a living document which outlines the required performance of OCD tools for supplier compliance to the 2003 International Technology Roadmap for Semiconductors (ITRS) and which conveys Sematech member companies' collective needs to vendors. Using this specification, evaluation efforts of currently available tools are being performed. The 2004 AMAG Unified Specification for Scatterometry includes sections outlining the test methodologies, metrics, and wafer-target requirements for each parameter to be benchmarked, and, if applicable, prescribes a target specification compatible with the ITRS. The methodologies are valid for the demands of the 90nm technology node and beyond. Parameters to be considered include: Precision, Repeatability and Reproducibility Accuracy System Matching Noise and Spectral Sensitivity Throughput Interaction with sample Measurement of material optical properties (n & k) Pattern recognition/stage navigation accuracy Specular Beam Width ("spot size") Cost of ownership (COO) When possible, the metrics in this specification have been made compatible with similar specifications in the AMAG CD-SEM Unified Specification so that fair intercomparisons of different tools can be made. Previous CD-SEM studies under this same project have been published, with the initial version of the International SEMATECH CD-SEM Unified Specification in 1998, and multi-supplier CD-SEM benchmarks in 1999, 2001 and 2003.© (2005) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The measurement of line-edge roughness (LER) has recently become a topic of concern in the litho-metrology community and the semiconductor industry as a whole. The Advanced Metrology Advisory Group (AMAG), a council composed of the chief metrologists from the International SEMATECH (ISMT) consortium’s Member Companies and from the National Institute of Standards and Technology (NIST), has a project to investigate LER metrics and to direct the critical dimension scanning electron microscope (CD-SEM) supplier community towards a semiconductor industry-backed, standardized solution for implementation. The 2003 International Technology Roadmap for Semiconductors (ITRS) has included a new definition for roughness. The ITRS envisions root mean square measurements of edge and width roughness. There are other possible metrics, some of which are surveyed here. The ITRS envisions the root mean square measurements restricted to roughness wavelengths falling within a specified process-relevant range and with measurement repeatability better than a specified tolerance. This study addresses the measurement choices required to meet those specifications. An expression for the length of line that must be measured and the spacing of measurement positions along that length is derived. Noise in the image is shown to produce roughness measurement errors that have both random and nonrandom (i.e., bias) components. Measurements are reported on both UV resist and polycrystalline silicon in special test patterns with roughness typical for those materials. These measurements indicate that the sensitivity of a roughness measurement to noise depends importantly both on the choice of edge detection algorithm and the quality of the focus. Measurements are less sensitive to noise when a model-based or sigmoidal fit algorithm is used and when the images are in good focus. Using the measured roughness characteristics for UV resist lines and applying the ITRS requirements for the 90 nm technology node, the derived expression for sampling length and sampling interval implies that a length at least 8 times the node (i.e., 720 nm) must be measured at intervals of 7.5 nm or less.

The widths of 284 lines in a 193 nm resist were measured by two methods and the results compared. One method was scanning electron microscopy (SEM) of cross-sections. The other was a model-based library (MBL) approach in which top-down CD-SEM line scans of structures are compared to a library of simulated line scans, each one of which corresponds to a well-defined sample structure. Feature edge shapes and locations are determined by matching measured to simulated images. This way of determining critical dimensions makes use of known physics of the interaction of the electron beam with the sample, thereby removing some of the ambiguity in sample edge positions that are assigned by more arbitrary methods. Thus far, MBL has shown promise on polycrystalline silicon samples [Villarrubia et al., Proc. SPIE 4689, pp. 304-312 (2002)]. Resist lines, though important in semiconductor manufacturing, pose a more difficult problem because resist tends to shrink and charge upon electron beam exposure. These phenomena are not well characterized, and hence are difficult to include in the models used to construct libraries. Differences between the techniques had a systematic component of 3.5 nm and a random component of about 5 nm. These differences are an upper bound on measurement errors attributable to resist properties, since they are partly attributable to other causes (e.g,. linewidth roughness).

The Advanced Metrology Advisory Group (AMAG) is a council composed of the chief CD-metrologists from the International SEMATECH Manufacturing Initiative (ISMI) consortium’s Member Companies and from the National Institute of Standards (NIST). The AMAG wrote and, in 2002, with CD-SEM supplier involvement, updated the “Unified Advanced CD-SEM Specification for Sub-130nm Technology (Version 2002)” to be a living document which outlines the required performance of advanced CD-SEMs for supplier compliance to the 2003 International Technology Roadmap for Semiconductors, and also conveys member companies’ other collective needs to vendors. Through applying this specification during the mid-2003 timeframe, a benchmarking effort of the currently available advanced CD-SEMs has been performed. These results are presented here. The AMAG Unified Specification includes sections outlining the test methodologies, metrics, and wafer-target requirements for each parameter included in the benchmark, and, when applicable, prescribes a target specification compatible with the ITRS and methodologies compatible with the demands of 90nm technology. Parameters to be considered include: •Precision, Repeatability and Reproducibility •Accuracy, Apparent Beam Width and Resolution •Charging and Contamination •Tool-to-Tool Matching •Pattern Recognition and Navigation Accuracy •Throughput •Instrumentation Outputs •Tool Automation and Utility •Precision and Accuracy of Profile Measurement •Precision and Accuracy of Roughness Measurement. Previous studies under this same project have been published, with the initial version of the International Sematech Unified Specification in 1998, and multi-supplier benchmarks in 1999 and 2001. The results for the 2003 benchmark will be shown and compared to the ITRS, and composite viewpoints showing these 2003 benchmark results compared to the past results are also shown, demonstrating interesting CD-SEM industry trends.

The measurement of line-edge roughness (LER) has recently become a major topic of concern in the litho-metrology community and the semiconductor industry as a whole, as addressed in the 2001 International Technology Roadmap for Semiconductors (ITRS) roadmap. The Advanced Metrology Advisory Group (AMAG, a council composed of the chief metrologists from the International SEMATECH (ISMT) consortium’s Member Companies and from the National Institute of Standards and Technology (NIST) has begun a project to investigate this issue and to direct the critical dimension scanning electron microscope (CD-SEM) supplier community towards a semiconductor industry-backed solution for implementation. The AMAG group has designed and built a 193 nm reticle that includes structures implementing a number of schemes to intentionally cause line edge roughness of various spatial frequencies and amplitudes. The lithography of these structures is in itself of interest to the litho-metrology community and will be discussed here. These structures, along with several other photolithography process variables, have been used to fabricate a set of features of varying roughness value and structure which span the LER process space of interest. These references are, in turn, useful for evaluation of LER measurement capability. Measurements on different CD-SEMs of major suppliers were used to demonstrate the current state of LER measurement. These measurements were compared to roughness determined off-line by analysis of top-down images from these tools. While no official standard measurement algorithm or definition of LER measurement exists, definitions used in this work are presented and compared in use. Repeatability of the measurements and factors affecting their accuracy were explored, as well as how CD-SEM parameters can affect the measurements.

The purpose of this paper is to define standard methods for effective and efficient image-based dimensional metrology for microlithography applications in the manufacture of integrated circuits. This paper represents a consensual view of the co-authors, not necessarily in total agreement across all subjects, but in complete agreement on the fundamentals of dimensional metrology in this application. Fundamental expectations in the conventional comparison-based metrology of width are reviewed, with its reliance on calibration and standards, and how it is different from metrology of pitch and image placement. We discuss the wealth of a priori information in an image of a feature on a mask or a wafer. We define the estimates of deviations from these expectations and their applications to effective detection and identification of the measurement errors attributable to the measurement procedure or the metrology tool, as well as to the sample and the process o fits manufacture. Although many individuals and organizations already use such efficient methods, industry-wide standard methods do not exist today. This group of professionals expects that, by placing de facto standard meth-odologies into public domain, we can help reduce waste and risks inherent in a "spontaneous" technology build-out, thereby enabling a seamless proliferation of these methods by equipment vendors and users of dimensional metrology. Progress in this key technology, with the new dimensional metrology capabilities enabled, leads to improved perform-ance and yield of IC products, as well as increased automation and manufacturing efficiency, ensuring the long-term health of our industry.

One goal of CD metrology is to monitor lithographic process control and how it relates to post-etch results. At present, in-fab process control for this purpose is achieved through top-down CD measurements. To acquire profile information requires destructive cross-section SEM measurements or time-consuming AFM measurements. To find height and profile information about a resist or etched structure directly on a CD-SEM, techniques using the combination of in-column beam tilt and stereographic imaging have been developed, implemented and improved on the Applied Materials NanoSEM-3D. This work is an extension of results previously published, although the tool used is greatly improved and the target feature stacks more thorough. The column of the NanoSEM-3D is designed to be able to electronically tilt the incident beam at small angles as it approaches the sample, through bending the beam within the column. Two images can be captured of the sidewall of the feature target, one at a smaller tilt angle and one at a larger tilt angle. Through matching common features between these two images, a reconstructed profile can be mathematically generated. A feature height and sidewall angle can be calculated, and general shape information such as top-rounding, footing and undercutting can also be displayed. To benchmark the effectiveness of this new technique, an experiment has been conducted to quantify the repeatability and reproducibility of height and sidewall angle measurements of lines of resist-on-poly and the resulting etched-poly lines, and correlate these to measurements of the these same profiles using XSEM to determine the accuracy of the technique. This study will span a reasonable lithographic process window. We hope to demonstrate the necessary precision and accuracy capability to non-destructively replace some cross-section work. In applying these techniques to a common etch bias problem, we also hope to demonstrate a strong correlation which can be used to directly predict post-etch behavior and serve as a model for other etch processes, work with which XSEM cross-sections have typically been used until now. The profile measurement technique is also applied to other CMOS features such as etched STI trench, resist and etched contact holes, and resist and etched damascene trenches and vias, with calculated tool precisions for feature height and sidewall angle.

In this work, an extremely flexible and simple dissolution rate monitor (DRM) based on inexpensive, commercially available, PC card spectrometers has been built that can be used quite robustly in both fab and laboratory environments for measuring the dissolution behavior of photoreist films. The hardware required in order to construct such a simple apparatus has been discussed along with various experimental configurations that are appropriate for different measurement tasks. A multiwavelength interferometric data analysis software (MIDAS) has been developed in this work that can robustly perform both single wavelength and multiwavelength DRM data analysis. The multiwavelength DRM and MIDAS software have been found to be very useful in analyzing a variety of resist film dissolution phenomena including monitoring films possessing dissolution rates exceeding 100 nm/s and studying resist film surface inhibition/acceleration. Another useful application has been to measure swelling in the processing of photoresists and other polymer thin films. The basic approaches and algorithms used for thin film thickness and dissolution rate determination in the MIDAS software are discussed in this paper. Results from the use of the MIDAS software in various applications are presented.

International SEMATECH (ISMT) and the National Institute of Standards and Technology (NIST) are working together to improve the traceability of atomic force microscope (AFM) dimensional metrology in semiconductor manufacturing. The rapid pace of technological change in the semiconductor industry makes the timely introduction of relevant standards challenging. As a result, the link between the realization of the SI (Systeme International d’Unites, or International System of Units) unit of length - the meter - and measurements on the fab line is not always maintained. To improve this situation, we are using an at-line critical dimension-AFM (CD-AFM) at ISMT as a developmental platform. This tool has been implemented as a Reference Measurement System (RMS) in the facilities at ISMT. However, it is currently being replaced by a next-generation CD-AFM tool. Using the current tool, we have performed measurements needed to establish the traceability chain and developed uncertainty budgets. Specifically, we have developed uncertainty budgets for pitch, height, and critical dimension (CD) measurements. Some evaluations were performed using samples for which a full traceability chain is not available. We expect to improve the uncertainties further for such samples. At present, the standard uncertainties are estimated to be approximately 0.2 % for pitch measurements, 0.4 % for step height measurements, and 5 nm for CD measurements in the sub-micrometer range. Similar budgets will be developed for the new tool once it is installed. We will describe our methodology for RMS implementation and the major applications for which it has been used. These include measurements on new NIST/ISMT linewidth standards, a reference tool for CD-scanning electron microscopes (SEMs), metrology on photo-masks, CD-SEM benchmarking, and 193 nm resist shrinkage measurements.

Resist slimming under electron beam exposure introduces significant measurement uncertainty in the metrology of 193 nm resists. Total critical dimension (CD) uncertainty of up to 10 nm can arise from line slimming through a combination of the line slimming during the initial measurement pass and the variation of line slimming across the wafer. For a 100 nm process, the entire CD error budget, can be consumed by line slimming. This research examines the uncertainty that results from the use of offset techniques to account for resist slimming in the process control of 193 nm resist CDs. The uncertainty associated with such offset techniques can be as great as 10 nm, depending upon the 193 nm resist and landing energy evaluated. Data are presented to demonstrate that 193 nm resist CD features experience line slimming greater than 5 nm at 500 eV landing energy during the initial measurement pass. Further, subsequent measurements demonstrate greatly reduced slimming and as a result are not indicative of the true magnitude of line slimming. Experiments conducted using CD-AFM pre- and post-analysis, demonstrate that ultra low landing energies significantly decrease the line slimming, reducing it to 1 nm or less.

One goal of CD metrology is to monitor lithographic process control and how it relates to post-etch results. At present, in-fab process control for this purpose is achieved through top-done CD measurements. To acquire profile information requires destructive cross-section SEM measurements or time- consuming atomic force microscope (AFM) measurements. To find height and profile information about a resist or etched structure directly on a CD-SEM, new techniques using the combination of in-column beam tilt and stereo graphic imaging have been developed and implemented on the Applied Materials VeraSEM-3D.

The Advanced Metrology Advisory Group (AMAG) is a council composed of the chief CD-metrologists from the International SEMATECH consortium's Member Companies and from the National Institute of Standards (NIST). The AMAG wrote and, in 2000, updated the 'Unified Advanced CD-SEM Specification for Sub- 0.18 micrometers Technology to be a living document which outlines the required performance of advanced CD-SEMs for vendor compliance to the International Technology Roadmap for Semiconductors, and also conveys other Member companies' collective needs to vendors. Following this specification, a benchmarking effort of the four currently available advanced CD-SEMs has been performed. This paper presents the result of this effort. Previous studies under this same project have ben published.

We present results using simulations and experiments to demonstrate metrological applications of the through-focus scanning optical microscopy (TSOM) down to features at and well below the International Technology Roadmap for Semiconductors' 22 nm node. The TSOM method shows the ability to detect sub-nanometer, three-dimensional shape variations such as line height, sidewall angle, width, and pitch in fins of fin-shaped field effect transistor structures using conventional optical microscopes. In addition, the method requires targets substantially smaller than the conventional target size. These results provide insight into the applicability of TSOM for economical critical dimension and yield enhancement metrology.

We explore how photoresist shrinkage behavior due to e-beam measurement by critical dimension-scanning electron microscope (CD-SEM) depends on various time-related factors. This will include an investigation of how the photoresist critical dimension (CD) and CD shrinkage varies with photoresist age and the differences in shrinkage trends between load/unload and static and dynamic repeatability cases, where time between measurements is a key variable. The results for this typical immersion argon flouride photoresist process will show that resist CD and shrinkage variation due to resist age and vacuum-cycling is insignificant, yet the shrinkage is strongly linked to time between consecutive measurements, with a well-defined, high-certainty logarithmic decay with time. These experiments identify a key difference between the shrinkage seen in static versus dynamic measurements, which will be shown to have far-reaching implications for the shrinkage phenomenon in general and for the best-known methods for executing CD-SEM metrology with photoresist samples.

Critical dimension atomic force microscopy is employed in semiconductor manufacturing as a reference system, used to provide accurate information to calibrate other tools. However, faced with increasingly challenging features, operators of these systems have needed to use multiple specialized tip types and scan modes on a sample in order to acquire a complete data set. To overcome this need, we measure the potential biases introduced within such a hybrid data set with respect to sidewall slope angle. Measurement results are presented for features with varying sidewall slope across a range of angles just above and below 90 deg. This sample was scanned with a variety tips and two different scan modes: critical dimension (CD) mode, an adaptive sidewall scanning mode able to detect limited undercut; and deep trench (DT) mode, a dynamic top-down-only mode commonly employed on small, challenging measurement features. In DT mode, we detected a cutoff point at 89 deg, below which all tips track the surface with a size-dependent bias. In contrast, CD mode produced results that were much more invariant to tip size except for the smallest tips. The smallest tips in CD mode exhibited divergent behavior, compared to both the mid-range CD tips and one another.

A key requirement for nanomanufacturing is maintaining acceptable traceability of measurements performed to determine size. Given that properties and functionality at the nanoscale are governed by absolute size, maintaining the traceability of dimensional measurements of nanoscale devices is crucial to the success of nanomanufacturing. There are various strategies for introducing traceability into the nanomanufacturing environment. Some involve first principles, but most entail the use of calibrated artifacts. In an environment where different types of products are manufactured, it is challenging to maintain traceability across different products mix. In this paper, we present some of the work we have done in developing methods to track the traceability of dimensional measurements performed in a wafer fabrication facility. We combine the concepts of reference measurement system, measurement assurance, and metrological timelines to ensure that traceability is maintained through a series of measurements that involve different instruments and product mixes, spanning a four-year period. We show how to use knowledge of process-induced and instrument systematic errors, among others, to ensure that the traceability of the measurements is maintained.

The National Institute of Standards and Technology (NIST) and SEMATECH are working to address traceability issues in semiconductor dimensional metrology. In semiconductor manufacturing, many of the measurements made in the fab are not traceable to the SI unit of length. This is because a greater emphasis is often placed on precision and tool matching than on accuracy. Furthermore, the fast pace of development in the industry makes it difficult to introduce suitable traceable standard artifacts in a timely manner. To address this issue, NIST and SEMATECH implemented a critical-dimension atomic-force-microscope-based reference measurement system (RMS). The system is calibrated for height, pitch, and width, and has traceability to the SI definition of length in all three axes. Because the RMS is expected to function at a higher level of performance than inline tools, the level of characterization and handling of uncertain sources is on a level usually seen in instruments at national measurement institutes. In this work, we discuss recent progress in reducing the uncertainty of the instrument as well as details of a newly implemented performance monitoring system. We also present an example of how the RMS concept can be used in a semiconductor manufacturing environment.