222 results on '"Ao Ren"'
Search Results
52. VEA: An FPGA-Based Voxel Encoding Accelerator for 3D Object Detection with LiDAR.
53. CADedup: High-performance Consistency-aware Deduplication Based on Persistent Memory.
54. SENTunnel: Fast Path for Sensor Data Access on Automotive Embedded Systems.
55. FRL: Fast and Reconfigurable Accelerator for Distributed Sound Source Localization.
56. Flexible Clustered Federated Learning for Client-Level Data Distribution Shift.
57. Federated learning with workload-aware client scheduling in heterogeneous systems.
58. Sim-to-Real Segmentation in Robot-assisted Transoral Tracheal Intubation.
59. Improving DNN Fault Tolerance using Weight Pruning and Differential Crossbar Mapping for ReRAM-based Edge AI.
60. FedSAE: A Novel Self-Adaptive Federated Learning Framework in Heterogeneous Systems.
61. CSAFL: A Clustered Semi-Asynchronous Federated Learning Framework.
62. DARB: A Density-Adaptive Regular-Block Pruning for Deep Neural Networks.
63. Measuring Data Reconstruction Defenses in Collaborative Inference Systems.
64. STICKER-T: An Energy-Efficient Neural Network Processor Using Block-Circulant Algorithm and Unified Frequency-Domain Acceleration.
65. ADMM-NN: An Algorithm-Hardware Co-Design Framework of DNNs Using Alternating Direction Methods of Multipliers.
66. A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits.
67. A stochastic-computing based deep learning framework using adiabatic quantum-flux-parametron superconducting technology.
68. A Buffer and Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits.
69. IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits.
70. VIBNN: Hardware Acceleration of Bayesian Neural Networks.
71. Structured Weight Matrices-Based Hardware Accelerators in Deep Neural Networks: FPGAs and ASICs.
72. Towards Budget-Driven Hardware Optimization for Deep Convolutional Neural Networks Using Stochastic Computing.
73. An area and energy efficient design of domain-wall memory-based deep convolutional neural networks using stochastic computing.
74. A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm2and 6T HBST-TRAM-Based 2D Data-Reuse Architecture.
75. Effects of dietary methionine and lysine supplementation on growth performance, meat composition and rumen fermentation pattern in goats
76. HEIF: Highly Efficient Stochastic Computing-Based Inference Framework for Deep Neural Networks.
77. Normalization and dropout for stochastic computing-based deep convolutional neural networks.
78. SC-DCNN: Highly-Scalable Deep Convolutional Neural Network using Stochastic Computing.
79. Deep reinforcement learning: Framework, applications, and embedded implementations: Invited paper.
80. Softmax Regression Design for Stochastic Computing Based Deep Convolutional Neural Networks.
81. Memristor crossbar-based ultra-efficient next-generation baseband processors.
82. Hardware Acceleration of Bayesian Neural Networks Using RAM Based Linear Feedback Gaussian Random Number Generators.
83. Ultra-fast robust compressive sensing based on memristor crossbars.
84. Towards acceleration of deep convolutional neural networks using stochastic computing.
85. Algorithm-hardware co-optimization of the memristor-based framework for solving SOCP and homogeneous QCQP problems.
86. Structural design optimization for deep convolutional neural networks using stochastic computing.
87. Hardware-driven nonlinear activation for stochastic computing based deep convolutional neural networks.
88. A low-computation-complexity, energy-efficient, and high-performance linear program solver based on primal-dual interior point method using memristor crossbars.
89. Designing reconfigurable large-scale deep learning systems using stochastic computing.
90. DSCNN: Hardware-oriented optimization for Stochastic Computing based Deep Convolutional Neural Networks.
91. Memristor-Based Discrete Fourier Transform for Improving Performance and Energy Efficiency.
92. A low-computation-complexity, energy-efficient, and high-performance linear program solver using memristor crossbars.
93. Design of high-speed low-power polar BP decoder using emerging technologies.
94. DARB: A Density-Aware Regular-Block Pruning for Deep Neural Networks.
95. A Stochastic-Computing based Deep Learning Framework using Adiabatic Quantum-Flux-Parametron SuperconductingTechnology.
96. ADMM-NN: An Algorithm-Hardware Co-Design Framework of DNNs Using Alternating Direction Method of Multipliers.
97. Algorithm-Hardware Co-Optimization of the Memristor-Based Framework for Solving SOCP and Homogeneous QCQP Problems.
98. Maternal intake restriction programs the energy metabolism, clock circadian regulator and mTOR signals in the skeletal muscles of goat offspring probably via the protein kinase A-cAMP-responsive element-binding proteins pathway
99. Protective Effect of Nanoselenium on Renal Oxidative Damage Induced by Mercury in Laying Hens
100. Offering soybean molasses adsorbed to agricultural by‐products improved lactation performance through modulating plasma metabolic enzyme pool of lactating cows
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