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We detail the design of multiresolution analog filter banks, linear models of cochlear function, with power dissipation being a prime engineering constraint. We propose that a reasonable goodness criterion is the information rate through the system, per watt of power dissipated. Speech applications requiring filter banks with a wide frequency tuning range, from 20 Hz to 20 kHz, and low power consumption make the transconductance-C integrator in subthreshold CMOS the preferable integrator structure. As a way of example, the dynamic range of a lowpass filter is computed and subsequently used to design a filter bank that models faithfully cochlear micro-mechanics. The power consumption of the entire filter bank is computed from analytical expressions and is estimated as 355 nW, at 68 kb/s overall information rate at the output of the system.

In this paper we explore a combination of above-and-subthreshold CMOS circuit techniques for the implementation of analog neuromorphic network processing. The implemented network embodies a blind signal separation algorithm performing an independent component analysis. It is essentially a continuous time recursive linear adaptive filter that uses a non-linear adaptation rule. Analog I/O interface, weight coefficients and adaptation blocks are all integrated on the chip. A test 2-neuron-2-synapse network as well as a small 5-neuron-20-synapse network were fabricated in a 2 micron n-well double-polysilicon, double-metal CMOS process. Circuit designs at the transistor level yield area efficient implementations for synapses and the adaptation blocks. We present experimental results from testing the systems with sinusoidal signals and noise and report on its performance as a blind separator of mixed speech signals.

Continuous-time, analog, complementary metal oxide semiconductor chips were used in the circuit realization of a model for the human auditory periphery. The silicon auditory periphery, whose biological counterpart is made up of the middle ear, basilar membrane and hair cell/synapse sections, was tested for its voiced-speech processing functions using the syllable 'ba.' Its output, similar to the instantaneous firing rates of auditory nerve fibers, has shown the feasibility of the circuit for speech analysis.

In low power current mode signal processing circuits it is often necessary to use current mirrors to replicate and amplify/attenuate current signals and clamp the voltage of nodes with high parasitic capacitances so that the smallest currents do not introduce unacceptable delays. The use of tunable active-input current mirrors would meet both requirements. In conventional active-input current mirrors, stability compensation is required. Furthermore, once stabilized, the input current cannot be made arbitrarily small. In this paper we introduce two new active-input current mirrors that clamp their input node to a given voltage. One of them does not require compensation, while the other may under some circumstances. However, for both, the input current may take any value. The mirrors can operate with their transistors biased in strong inversion, weak inversion, or even as CMOS compatible lateral bipolar devices. If it is biased in weak inversion or as lateral bipolars, the current mirror gain can be tuned over a very wide range. According to the experimental measurements provided in this paper, the input current may spawn beyond nine decades and the current mirror gain can be tuned over 11 decades. As an application example, a sinusoidal [g.sub.m.]-C-based VCO has been fabricated, whose oscillation frequency could be tuned for over seven decades, between 74 mhz and 1 MHz. Index Terms--Analog VLSI circuits, BiCMOS circuits, current mirrors, current mode circuits, operational transconductance amplifiers, sinusoidal oscillators, stability compensation, tunable amplifiers.