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Objectives. To examine the relationships among environmental characteristics, temperature, and health outcomes during heat advisories at the geographic scale of street segments.Methods. We combined multiple data sets from Boston, Massachusetts, including remotely sensed measures of temperature and associated environmental characteristics (e.g., canopy cover), 911 dispatches for medical emergencies, daily weather conditions, and demographic and physical context from the American Community Survey and City of Boston Property Assessments. We used multilevel models to analyze the distribution of land surface temperature and elevated vulnerability during heat advisories across streets and neighborhoods.Results. A substantial proportion of variation in land surface temperature existed between streets within census tracts (38%), explained by canopy, impervious surface, and albedo. Streets with higher land surface temperature had a greater likelihood of medical emergencies during heat advisories relative to the frequency of medical emergencies during non-heat advisory periods. There was no independent effect of the average land surface temperature of the census tract.Conclusions. The relationships among environmental characteristics, temperature, and health outcomes operate at the spatial scale of the street segment, calling for more geographically precise analysis and intervention. (Am J Public Health. Published online ahead of print May 21, 2020: e1-e8. doi:10.2105/AJPH.2020.305636).

A magnetoelectric antenna (ME) is a miniaturized device that exhibits the dual capability of energy harvesting and sensing in different frequency bands. In this paper, a behavioral circuit model for the ME antenna is presented to capture the radio frequency (RF) energy harvesting operation during circuit simulations. The ME antenna design of this work is under development for wireless communication with implantable devices, where one role of the antenna is to receive pulse-modulated power from a nearby transmitter. In this application, the proposed behavioral ME antenna model can be utilized during design optimizations of the energy harvesting circuits. The model has been assessed through simulations with an energy harvester design in 65nm CMOS technology. Measurements were performed to validate the results of the wireless power transfer link with an ME antenna having a 2.57 GHz resonance frequency connected to an energy harvester chip.

A major obstacle during the design of brain–computer interfaces is the unavailability of a neural implantable device that is µ-scale in size and is wireless, self-powered, and long-lasting. The current state-of-the-art implantable devices suffer from various limitations. Electromagnetic-based wireless devices are big in size because of their large antenna, which must be larger than one-tenth of the wavelength of the operational frequency. Ultrasound-based wireless devices, in addition to their low data rate, have massive loss in the skull and need an intermediate electromagnetic transceiver under the skull. Furthermore, almost all state-of-the-art wireless devices use micro-electrodes for neuronal recording, which are not reliable in long-term monitoring applications because of the direct contact between the tissue and metal electrodes. In this paper, we propose a novel, wireless, and ultra-compact implantable device termed NanoNeuroRFID. At the core of this device, there is a magnetoelectric (ME) antenna array. ME antennas are smart and ultra-miniaturized (

Advances of machine learning algorithms have led to improvements of seizure detection capabilities in monitoring systems based on electroencephalography (EEG). Seizure detection hardware requires accurate feature extraction, which is conventionally done in the digital domain by extracting power in different EEG frequency bands over a particular time window. This paper presents an analog counterpart to digital feature extraction. A received signal strength indicator (RSSI) circuit is used for extracting EEG power features in the analog domain. A high-precision RSSI circuit was designed in the sub-threshold domain with ultra-low power consumption and low sensitivity to process-voltage-temperature variations with CMOS technology. Simulation results show that the RSSI circuit consumes 24 nW power, and has a dynamic range of 53 dB with a linearity error of ± 0.5 dB, sufficient to accurately extract features for seizure classification. The analysis of 16 hours of patient EEG data indicates a seizure classification accuracy of 94%, and a non-seizure classification of 86%.

This paper presents a high efficiency DC-DC converter architecture with adjustable switching frequency to suppress the baseband noise from a power supply for an RF receiver front-end. The system is composed of a boost converter operating in a discontinuous conduction mode (DCM), an analog frequency-to-voltage converter (FVC), and a digital control loop. To prevent the switching noise of the power supply from mixing into the intermediate frequency (IF) signal band of the mixer, the FVC senses the switching frequency of a boost converter and compares it with a reference baseband frequency. The digital control scheme changes the switching frequency of the boost converter if it is close to the baseband frequency by increasing the bias current of the regulating comparator. The complete system has been designed in a 0.13 μm CMOS process. The simulated efficiency of the boost converter is 84.5% with a 300mV input level. Its peak inductor current control has been designed for different input voltage conditions ranging from 50mV to 300mV. The output voltage of the boost converter is 1V with a 1.35% ripple. The converter was simulated with an RF mixer circuit as load, where the mixer achieved an SFDR of 60.3 dB.

This paper introduces a behavioral circuit model for a magnetoelectric (ME) antenna, which is a novel miniaturized device with applications in low-power sensing. To facilitate the design of integrated circuits interfaced to the antenna, its model accounts for the amplitude modulation behavior observed during measurements of the nanoelectromechanical system (NEMS) device when subjected to an AC magnetic field and a DC biasing field. We propose a dynamic model for transient simulations, and show that the model characteristics match the experimentally obtained behavior of the ME antenna. As an example, the model is demonstrated through simulations of a sensor circuit for magnetic fields in the 282 microTesla to 28 milliTesla range.

This paper presents an ultra-low power and lower area, sequential physically unclonable function (PUF) circuit for Internet-of-Things (IoT). The proposed PUF is used to generate a 16 bit secret key array and uses a current-mode based differential bit cell architecture to exploit the inherent device mismatch. The proposed PUF design has an energy efficiency of 7.5fJ/bit and a native instability of 0.6875%.

An ultra-low power (ULP), energy-harvesting system-on-chip, that can operate in various application scenarios, is needed for enabling the trillions of Internet-of-Things (IoT) devices. However, energy from the ambient sources is little and system power consumption is high. Circuits and system development require an optimal use of available energy. In this paper, we present circuits that can improve the energy utilization in an IoT device by providing improvements at critical points of the flow of harvested energy. A boost converter circuit, that can harvest energy from 10-mV input voltage and a few nanowatt of input power, makes more harvested energy available for the IoT device. A single-inductor-multiple-output buck-boost converter provides high-efficiency and low-voltage power management solution to put most of the harvested energy for system use. A real time clock and ULP bandgap reference circuit significantly reduce the standby power consumption. The proposed ULP circuits are developed in 130-nm CMOS technology. The combined effects of these circuits and the system design technique can improve the life-time of an example IoT device by over four times in higher power consumption mode and over 70 times in ULP mode.

A symmetric chopper instrumentation amplifier architecture with two identical 8-bit digitally programmable capacitor banks and online digital calibration block are presented. Designed for long-term brain signal monitoring applications, the feedback capacitor banks generate negative capacitance to cancel the input capacitance from electrode cables to boost the input impedance to above 2 GΩ at 10 Hz. These banks are controlled by an automatic digital background calibration unit that includes an oscillation prevention scheme to ensure stable operation. A chopping technique is introduced to enhance the noise performance of the instrumentation amplifier in combination with the capacitive feedback loop that also contains chopping switches. The instrumentation amplifier and online calibration blocks are designed in 0.13-µm BiCMOS technology with a 1.2V supply, consuming 115.9 µW and 176 nW, respectively. Simulations show that the amplifier has a 26.9 dB gain, 8.06 KHz bandwidth, 0.52 µV input-referred noise integrated from 0.1-100Hz, and −49.9 dB THD with 1mV peak-to-peak input. The core layout area of the calibration block is 2100 µm2.

This paper presents an ultra-low power crystal (XTAL) oscillator circuit for generating a 32.768 kHz clock source for real-time clock generation. An inverting amplifier operational from 0.3 V $V_{DD}$ oscillates the XTAL resonator and achieves a power consumption of 2.1 nW. A duty-cycling technique powers down the XTAL amplifier without losing the oscillation and reduces the power consumption to 1.5 nW. The proposed circuit is implemented in 130 nm CMOS with an area of $0.0625\ \text{mm}^{2}$ and achieves a temperature stability of 1.85 ppm/°C.

This article describes the development of a radio frequency (RF) platform for electromagnetically modulated signals that makes use of a software-defined radio (SDR) to receive information from a novel magnetoelectric (ME) antenna capable of sensing low-frequency magnetic fields with ultra-low magnitudes. The platform is employed as part of research and development to utilize miniaturized ME antennas and integrated circuits for neural recording with wireless implantable devices. To prototype the reception of electromagnetically modulated signals from a sensor, a versatile Universal Software Radio Peripheral (USRP) and the GNU Radio toolkit are utilized to enable real-time signal processing under varying operating conditions. Furthermore, it is demonstrated how a radio frequency signal transmitted from the SDR can be captured by the ME antenna for wireless energy harvesting.

This paper studies the effects of DC-DC switching converters on RF and analog baseband circuits. Simulations of a low-noise amplifier, mixer, and lowpass filter have shown that the impact of switching supply noise can be kept to small levels by design. For the case of loads with frequency conversion, a boost converter design technique to shift the switching frequency of the converter out of the band of interest is proposed.

A boost converter for thermoelectric energy harvesting in 130 nm CMOS achieves energy harvesting from a 10 mV input, which allows wearable body sensors to continue operation with low thermal gradients. The design uses a peak inductor current control scheme and duty cycled, offset compensated comparators to maintain high efficiency across a broad range of input and output voltages. The measured efficiency ranges from 53% at ${\rm V}_{\rm I}=20\ {\hbox{mV}}$ to a peak efficiency of 83% at ${\rm V}_{\rm I}=300\ {\hbox{mV}}$ . A cold-start circuit starts the operation of the boost converter from 220 mV, and an RF kick-start circuits starts it from $-$ 14.5 dBm at 915 MHz RF power.

This paper presents a 48 nW, − 60 dB PSRR@ DC, switched capacitor bandgap reference circuit operational from 500 mV V DD . The design uses a switched capacitor network for the architecture, where instead of resistors, switching capacitors are used for generating the reference. A charge-pump network is used to reduce the minimum V DD required to operate the circuit. Compared to the prior work, this design improves the PSRR well over − 60 dB by using current source architecture. Measurement result shows a 1 mV change in output voltage for a 4.9 V change in V DD for a high-voltage version of the design. It achieves a stability of 45 ppm/∘C at an output voltage of 500 mV. We also present the theoretical background of the charge-pump-based bandgap while reviewing prior low-voltage bandgap circuits.

This paper presents a model of inductor based DC-DC converters that can be used to study the impact of power management techniques such as dynamic voltage and frequency scaling (DVFS). System level power models of low power systems on chip (SoCs) and power management strategies cannot be correctly established without accounting for the associated overhead related to the DC-DC converters that provide regulated power to the system. The proposed model accurately predicts the efficiency of inductor based DC-DC converters with varying topologies and control schemes across a range of output voltage and current loads. It also accounts for the energy and timing overhead associated with the change in the operating condition of the regulator. Since modern SoCs employ power management techniques that vary the voltage and current loads seen by the converter, accurate modeling of the impact on the converter efficiency becomes critical. We use this model to compute the overall cost of two power distribution strategies for a SoC with multiple voltage islands. The proposed model helps us to obtain the energy benefits of a power management technique and can also be used as a basis for comparison between power management techniques or as a tool for design space exploration early in a SoC design cycle.

This paper presents an ultra-low power batteryless energy harvesting body sensor node (BSN) SoC fabricated in a commercial 130 nm CMOS technology capable of acquiring, processing, and transmitting electrocardiogram (ECG), electromyogram (EMG), and electroencephalogram (EEG) data. This SoC utilizes recent advances in energy harvesting, dynamic power management, low voltage boost circuits, bio-signal front-ends, subthreshold processing, and RF transmitter circuit topologies. The SoC is designed so the integration and interaction of circuit blocks accomplish an integrated, flexible, and reconfigurable wireless BSN SoC capable of autonomous power management and operation from harvested power, thus prolonging the node lifetime indefinitely. The chip performs ECG heart rate extraction and atrial fibrillation detection while only consuming 19 μW, running solely on harvested energy. This chip is the first wireless BSN powered solely from a thermoelectric harvester and/or RF power and has lower power, lower minimum supply voltage (30 mV), and more complete system integration than previously reported wireless BSN SoCs.

We propose a fully on-chip CMOS temperature sensor in which a sub-threshold (sub-VT) proportional-to-absolute-temperature (PTAT) current element starves a current-controlled oscillator (CCO). Sub-VT design enables ultra-low-power operation of this temperature sensor. However, such circuits are highly sensitive to process variations, thereby causing varying circuit currents from die to die. We propose a bit-weighted current mirror (BWCM) architecture to resist the effect of process-induced variation in the PTAT current. The analog core constituting the PTAT, the CCO, and the BWCM is operational down to 0.2 V supply voltage. A digital block operational at 0.5 V converts the temperature information into a digital code that can be processed and used by other components in a system-on-chip (SoC). The proposed temperature sensor system also supports resolution-power trade-off for Internet-of-things (IoT) applications with different sampling rates and energy needs. The system power consumption is 23 nW and the maximum temperature inaccuracy is +1.5/−1.7 °C from 0 °C to 100 °C with a two-point calibration. The temperature sensor system was designed in a 130 nm CMOS technology and its total area is 250 × 250 μm2.

This paper presents a batteryless system-on-chip (SoC) that operates off energy harvested from indoor solar cells and/or thermoelectric generators (TEGs) on the body. Fabricated in a commercial 0.13 $\mu{\rm W}$ process, this SoC sensing platform consists of an integrated energy harvesting and power management unit (EH-PMU) with maximum power point tracking, multiple sensing modalities, programmable core and a low power microcontroller with several hardware accelerators to enable energy-efficient digital signal processing, ultra-low-power (ULP) asymmetric radios for wireless transmission, and a 100 nW wake-up radio. The EH-PMU achieves a peak end-to-end efficiency of 75% delivering power to a 100 $\mu{\rm A}$ load. In an example motion detection application, the SoC reads data from an accelerometer through SPI, processes it, and sends it over the radio. The SPI and digital processing consume only 2.27 $\mu{\rm W}$ , while the integrated radio consumes 4.18 $\mu{\rm W}$ when transmitting at 187.5 kbps for a total of 6.45 $\mu{\rm W}$ .

A proportional-to-absolute-temperature (PTAT) current element along with a current controlled oscillator (CCO) operational down to 0.2 V supply enables an ultra-low-power (ULP) temperature sensor. A bit-weighted current mirror (BWCM) architecture resists process-induced variation in the PTAT current. The power consumption is 23nW and the maximum inaccuracy is +1.5/-1.7°C from 0°C to 100°C with a 2-point calibration.

This paper presents an ultra-low swing level converter with integrated charge pumps that shows measured conversion in a 130nm CMOS test chip from an input at 145mV swing to a 1.2V output. Lowering the input allowable for a single ended level converter supports energy harvesting systems that need to use very low voltages.

A 1 trillion node internet of things (IoT) will require sensing platforms that support numerous applications using power harvesting to avoid the cost and scalability challenge of battery replacement in such large numbers. Previous SoCs achieve good integration and even energy harvesting [1][2][3], but they limit supported applications, need higher end-to-end harvesting efficiency, and require duty-cycling for RF communication. This paper demonstrates a highly integrated, flexible SoC platform that supports multiple sensing modalities, extracts information from data flexibly across applications, harvests and delivers power efficiently, and communicates wirelessly.

Most systems require a voltage reference independent of variation of power supply, process, or temperature, and a bandgap voltage reference (BGR) often serves this purpose. For ultra-low power (ULP) systems, the BGR may constitute a significant component of standby power, and the system start-up voltage is often determined by the voltage, V in , at which the BGR becomes operational. Lowering V in can also allow an ULP system to continue operation longer as its battery or energy harvested input voltage decreases. The minimum V in for state-of-the-art BGRs is restricted by V EB +V DS [1], where V EB is the emitter-base voltage of a pnp transistor, and V DS is the drain-source saturation voltage of a MOS transistor. Recent work brings the V in voltage down to 700mV [2]. There is a need to reduce the standby power and V in of a BGR to increase the lifetime of ULP systems. This paper presents a BGR circuit with measured minimum operating V in of 500mV, reducing the V in of [2] by 1.4x. Further, the power consumption of the proposed circuit is 32nW, which is 1.6x lower than the non-duty cycled BGR reported in [2]. A 2x-charge pump based bandgap core, a switched-capacitor network (SCN), and a current controlled oscillator and clock doubler circuit enable a BGR with a temperature variation of 75ppm/°C and power supply rejection (PSR) of up to −52dB at DC.

A boost converter for thermoelectric energy harvesting in 130nm CMOS reduces the achievable input voltage by 50% to 10mV, which allows wearable body sensors to continue operation with thermal gradients below 1oC. The design uses a peak inductor current control scheme and duty cycled, offset compensated comparators to maintain high efficiency across a broad range of input and output voltages. The measured efficiency ranges from 53% at VI=20mV to a peak efficiency of 83% at VI=300mV.

This paper presents a single inductor energy harvesting and power management (EHM) unit for ultra-low power (ULP) systems. The proposed circuit harvests energy from solar cells from 0.38V input voltage (Vin) and provides 4 output voltages - storage at 5V and V DD s at 3.3V, 1.5V and 1.2V. A peak inductor current control scheme enables high efficiency operation across wide input and output voltage range. The IC supports maximum power point tracking, battery management, and cold starts from 0.38V Vin.

We propose a fully on-chip clock-source system in which an ultra-low-power diode-based temperature-uncompensated oscillator (OSC[ subscript diode]) serves as the main clock source and frequency locks to a higher-power temperature-compensated oscillator (OSC[subscript cmp]) that is disabled after each locking event to save power. The locking allows the stability of the uncompensated oscillator to stay within the stability bound of the compensated design. This paper demonstrates the functionality of a locking controller that uses a periodic (counter-based) scheme implemented on-chip and a prediction (temperature-drift-based) scheme. The flexible clock source platform is validated in a 130 nm CMOS technology. In the demonstrated system, it achieves an effective average temperature stability of 7 ppm/°C in the human body temperature range from 20 °C to 40 °C with a power consumption of 36 nW at 0.7 V. It achieves a frequency range of 12 kHz to 150 kHz at 0.7 V., Charles Stark Draper Laboratory

This paper presents a model for DC-DC converters that is used to study power management techniques like dynamic voltage and frequency scaling (DVFS) etc. It accurately predicts the behavior of DC-DC converters of varying topologies across output voltage and load current and predicts the relative benefits of different power management options down to low voltage and current levels.

This paper presents an ultra low power clock source using a 1μW temperature compensated on-chip digitally controlled oscillator (Osc CMP ) and a 100nW uncompensated oscillator (Osc UCMP ) with respective temperature stabilities of 5ppm/o C and 1.67%/o C. A fast locking circuit re-locks Osc UCMP to Osc CMP often enough to achieve a high effective temperature stability. Measurements of a 130nm CMOS chip show that this combination gives a stability of 5ppm/o C from 20o C to 40o C (14ppm/o C from 20o C to 70o C) at 150nW if temperature changes by 1o C or less every second. This result is 7X lower power than typical XTALs and 6X more stable than prior on-chip solutions.

This paper presents a charge-pump based low swing interconnect receiver circuit. The interconnect circuit is single ended and supports swings of 300mV or lower. A charge pump front end at the receiver boosts the arriving signal before restoring it to the full logic level, improving the performance of the interconnect. For a 10mm long interconnect wire in a 45nm CMOS process, the proposed scheme provides 3X energy reduction at constant speed and 3.5X delay improvement at constant energy relative to prior art. We deploy the interconnect scheme as the data bus between the L1-L2 caches of a 4-core Alpha processor. Over a set of Splash benchmarks, the proposed architecture reduces total energy consumption by 70% while maintaining the same performance.

Recent advances in ultra-low power chip design techniques, many originally targeting wireless sensor networks, will enable a new generation of body-worn devices for health monitoring. We utilize the state-of-the-art in low power RF transmitters, low voltage boost circuits, subthreshold processing, biosignal front-ends, dynamic power management, and energy harvesting to realize an integrated reconfigurable wireless body-area-sensor node (BASN) SoC capable of autonomous power management for battery-free operation.