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Modular multilevel converter (MMC) is widely used due to its various advantages. However, it causes serious electromagnetic interference (EMI) problems. Therefore, it is necessary to suppress the conducted EMI of MMC. A novel spread-spectrum (SS) strategy called space spread-spectrum (SSS) is proposed in this article. The core idea of SSS strategy is to make the carrier frequency of each submodule different. The principle and formula derivation of SSS strategy are elaborated. SSS is a highly free strategy because carrier frequency can be distributed arbitrarily with space position. Several methods for determining carrier frequency distribution are proposed in this paper. These methods not only achieve EMI suppression, but also take into account less circulating current, higher switching frequency and lower switching loss. THD and switching loss variation under SSS strategy are also studied in the article. Experiments are carried out to validate the effectiveness of SSS strategy. The SSS strategy can reduce the conducted EMI more than 12dB and all obvious spikes in the spectrum are eliminated effectively. Besides, it is easy to implement and suitable for practical system with quantities of submodules.

In ac–dc power conversion system, modular multilevel converter (MMC) has been a promising technology, especially for high-voltage application. In such kind of application, the common-mode voltage (CMV) generated by power electronic switching can cause damage to electrical components and increase the electromagnetic interference (EMI) to the system. Hence, this article proposes a modulation scheme to reduce the CMV of MMC applied in high-voltage system, such as high-voltage dc. Usually, MMC consisting of numerous submodules (SMs) adopts the nearest level modulation (NLM) with the low switching frequency, so the CMV of the NLM scheme is analyzed, which indicates that the peak value of CMV is one-third of SM voltage. If one more or one less SM is turned on compared with NLM, the CMV caused by modulation can be eliminated theoretically. Subsequently, a modulation scheme based on the nearest zero CMV vector (NZCMVV) to reduce CMV is proposed for MMC. The NZCMVV scheme utilizes the two adjacent levels as candidate levels, and the theoretical ZCMVVs are picked out. Finally, the ZCMVV closest to the reference vector is selected to approximately replace the reference. The proposed method is simple and easy to implement. Simulated and experimental results validate that the proposed scheme can reduce CMV and CM current compared with the traditional NLM method.

In order to effectively suppress the intractable high-frequency conducted common-mode (CM) electromagnetic interference (EMI) and reduce the dependence on the high-frequency performance of the EMI filter, this article proposes a separate floating heatsink based suppression method (SFHBSM). SFHBSM suppresses high-frequency CM EMI by improving both the CM EMI source and the propagation path. On the one hand, SFHBSM achieves the nonringing CM EMI source without introducing additional resistive loss, by properly designing the parameters of the SFHBSM, the ringing effect in the CM EMI source can be pushed into a narrow bandwidth in the very high-frequency domain, where the ringing effect can be naturally killed by the skin effect. On the other hand, the CM EMI propagation path of the SFHBSM-based power converter is mathematically deduced, verifying that the SFHBSM can provide effective blocking for the CM EMI propagation in the high-frequency domain. Experiments show that under the combined effect of the ringing suppression and propagation blocking, SFHBSM achieves EMI reduction in almost the whole high-frequency domain, and provides up to 35 dB attenuation in a two-level three-phase power converter. Besides, ablation experiments have been conducted to evaluate the individual and combined effectiveness of each part of the SFHBSM.

This paper presents an advanced fault control for transformerless modular multilevel converters (MMCs) in AC/DC hybrid distribution networks (HDNs) under the single-phase grounding (SPG) fault. The characteristics of voltages and transmission paths of zero sequence currents in AC networks with different voltage levels and neutral grounding types under SPG faults are analyzed. According to the analysis, the SPG fault results in two issues: 1) the voltage imbalances in nonfaulted networks, which have negative influence on the operation of nonfaulted networks; 2) the overcurrent of MMC-based terminals results in the shutdown of MMCs instead of fault ride-through. To solve these two issues, two types of zero sequence fault control are proposed, which are suitable for different fault ride-through abilities of transformerless MMCs in AC/DC HDNs. The proposed fault control is implemented by an advanced zero sequence current controller (ZSCC). Furthermore, to reduce the effect of fault control on the sensitivity of current differential protection based on the zero sequence fault current, an improved set of current reference value is addressed. Finally, the theoretical analysis and proposed fault control are verified through simulations performed in MATLAB/Simulink.

Modular series–parallel dc–dc converters (MSPDDCs) are good options in high-power high-voltage applications. A reliable operation should be a top concern in such critical situations. In this article, a general fault-tolerant method for switch fault is proposed for MSPDDC, including fast fault diagnosis (FD) and postfault reconfiguration. The FD is achieved using the relationship between output inductor voltage and gate driver signal in each module. The inductor voltage is acquired by adding a small auxiliary winding into the magnetic core, and no expensive sensors are introduced. A general and low-cost hardware circuit is designed to locate faulty module in a very short time. The reconfiguration process for four structures is then systematically presented. Through a careful timing sequence design, a fast and smooth hot swap is realized, and its impact on the output side and the other healthy modules is minimized. The principle of FD and reconfiguration, hardware implementation, and experimental verification are given in this article.

The soft normally-open point (SNOP) is a multi-terminal power electronic device installed between two or more feeders in the low and medium voltage distribution network, which can adjust the active power and reactive power between the feeders. A small-signal model of SNOP connected to the distribution network is established. The model includes the linearization equations of the AC system, voltage source converter, control system and internal DC system. State space is used to describe the small-signal model. The state matrix of SNOP is derived, which is not limited by the strength of AC system and the number of terminals. The objective function of control parameter optimization is established according to the characteristic roots of the state matrix. Taking a three-terminal system as an example, the characteristic roots of the state matrix are calculated and the stability of the system can be judged. The accuracy of the model is verified by the comparison of the electromagnetic transient model and the small-signal model, and the parameter optimization method is verified by the time domain simulation.

Currently, frequency-domain electromagnetic interference (EMI) modeling has become the most commonly used method for EMI prediction and filter design. However, because of the unpredictability of the ringing effect in the present frequency-domain EMI modeling methods, the precision of the predicted EMI interference source is notably limited, which results in the inaccuracy of the system level EMI prediction. In order to achieve an accurate EMI prediction, this study presents a systematical study on the interference source of a 10 kVA three-phase bridge converter. The precise mathematical models of the common-mode and differential-mode interference source are constructed. Then, the characteristics of the multiple ringing effect, which is an important part of the interference source, are intensively analyzed. Based on the investigation of interference source, an improved interference source synthesis method is proposed. It can quickly and precisely predict the CM and DM interference source with multiple ringing effect, which can be used to achieve accurate frequency domain EMI prediction. Moreover, the multiple ringing effect is extended for IGBT parasitic parameter measuring. Instead of complicated device-level measurement, the grounding capacitance and junction capacitance can be effectively extracted through the ringing frequency measurement.

This paper presents an improved H8 power converter for common-mode voltage (CMV) reduction and electromagnetic interference suppression. The proposed H8 converter can realize zero CMV variation when entering and leaving the zero state, which is mainly achieved by both the improvement of the structure and the control strategy. For the system structure, two switches are added on the dc bus to float the ac part of the three-phase converter in the zero state. Besides, additional capacitors are used to realize controllable CMV. For the control strategy, a simple control strategy is proposed for the H8 converter. It can automatically adapt to the flowing orientation of the load current to realize synchronous switching of the power switches, which effectively eliminates the impact of the dead time. Through analysis, simulations, and experiment, a comparison between the proposed H8 converter and the conventional H6 converter is performed. Results validate the effectiveness of the H8 topology.

In a low-voltage parallel inverter system, the active power, unbalanced power, and harmonic power generally cannot be properly shared among inverters with droop control due to the mismatch of output impedance. To address this issue, this paper proposes a two-stage adaptive virtual resistor (AVR) control scheme. In the first stage, a proportional-integral controller is applied to regulate the active power with the use of a synchronous maximum power bus (SMPB), and the reactive power is adjusted by means of a Q–ω droop controller. In the second stage, all inverters switch to a P–E droop control mode by introducing the AVRs at fundamental positive-sequence, negative-sequence, and harmonic frequencies. Not only can this method eliminate the active power, unbalanced power, and harmonic power-sharing errors, it can also reduce the voltage deviation caused by the droop control. Moreover, the synchronization between inverters can be guaranteed as long as the SMPB is present, without using voltage sensors at the point of common coupling. Simulation and experimental results are provided to verify the feasibility of this method.

Nearest Level Modulation and capacitor voltage sorting algorithm are the most commonly-used modulation strategies for MMC in engineering. Unlike traditional carrier-based modulation methods, the Nearest Level Modulation and capacitor voltage sorting algorithm may make the switching sequences irregular, bringing difficulties to the analytic modeling of EMf sources wave forms. Besides, the extremely short simulation step size and long triansient state lead to huge time consumption on time domain EMf predictions. To solve these problems, a fast modeling method for EMf sources in MMC based on Nearest Level Modulation and steady-state capacitor voltage sorting algorithm is proposed for frequency domain EMf predictions. Time and frequency domain results show great agreement with Matlab Simulink simulation. The proposed method can be a reference for further research on the EMf predictions of MMC.

Modular Multilevel Converter used in high- voltage direct current transmission is prevalent nowadays. However, with quantities of IGBT modules, MMC becomes the natural source of Electromagnetic Interference. This paper puts forward a novel strategy called Space Spread-Spectrum-based Carrier Phase-Shifted PWM for MMC to reduce conducted common-mode EMI. This paper analyzes the principle of Space Spread-Spectrum with Double Fourier Transform, which deduces Space Spread-Spectrum-based Carrier Phase-Shifted PWM can change the harmonic from one high amplitude Nf c +nf 0 frequency spike pulse to N low amplitude Nf c +iNΔf+nf 0 frequency harmonics. Space Spread-Spectrum needs to follow several principles. The carrier frequency variation of corresponding submodules of the upper and lower bridge arm should be consistent. Spectrum should spread evenly and the frequency variation should not exceed f c /N. Simulation and experiment shows the good effect of Space Spread-Spectrum, which reduce the conducted common-mode Electromagnetic Interference about 10dB.

Due to the limited space on the trains and ships, the space of the interconnect cables was extremely small, leading to severe common mode(CM) crosstalk issue between unshielded cables. To reduce the coupling between unshielded cables, shielded cables were widely used. However, the coupling between shielded cables could not be ignored too. Therefore, a double-terminal grounding method was proposed for suppressing the crosstalk between shielded cables. Mathematic derivation was carried out to verify the method. Finally, a test bench was set up for experimental verification. And experimental results were in good agreement with the deduced results.

Soft open point (SOP) is a new power electronic device installed in distribution network to replace the normally open point (NOP), which can achieve normalized closed-loop operation of distribution network. This paper proposes a multi-port coordinated control strategy of SOP to achieve the power flow regulation and power quality improvement of distribution network under steady state operation. The proposed strategy can improve the power quality while balancing the active power among feeders with the SOP. Three-port back to back MMC SOP is taken as studied case. Simulation results verify the effectiveness of the strategies adopted.

Current limiting control is the key to continuous power supply of inverters. The inverters are generally switched to the current limiting mode to limit the fault currents when short-circuit faults happen. However, the fault currents will be distorted seriously due to the zero-current clamping effect as analyzed in this paper. In order to limit fault currents and suppress the fault current distortion, this paper presents a novel current limiting method. In the proposed method, the hardware current limiting circuit and the software current limiting scheme can immediately limit fault currents in cooperation. The switching frequency switchover strategy can effectively mitigate the fault current distortion. The purpose of the method is to prevent power devices from being damaged, and to ensure breakers to reliably operate and effectively support the subsequent relay protection. Simulation and experimental results verify the feasibility of the proposed method.

This letter proposes a method for the condition monitoring of submodule (SM) capacitors in modular multilevel converters (MMCs) without additional circuitry or computationally heavy algorithm. The proposed method leverages the discharging curve of SM capacitors in connection with the parallel bleeding resistors. It is independent of the MMC control and modulation schemes. Moreover, it potentially does not require thermal and load-related calibration for capacitor degradation monitoring. The principle, case study, and proof of concept of the proposed method are presented.

Electromagnetic interference (EMI) is a serious problem for Modular Multilevel Converter (MMC). The large quantity of switching devices in MMC bring in lots of EMI sources which are associated with modulation strategies. Two most commonly used modulation strategies for MMC are Nearest Level Modulation (NLM) and Carrier Phase-Shift Pulse Width Modulation (CPS-PWM). A comparison analysis on EMI sources' performance under NLM and CPS-PWM strategies are conducted by geometric deduction. Analysis and simulation results reveal that NLM has a better EMI performance in PWM frequency range than CPS-PWM.

As a key component in modular multilevel converter (MMC), the reliability of submodule (SM) capacitor is a major concern. To get the health state of SM capacitor and take proactive action, this paper develops a condition monitoring method without any extra sensors or complicated algorithms. In the proposed method, one SM in each arm is bypassed symmetrically at a time, and the energy stored in each capacitor dissipates through the internal bleeding resistor. The discharging time proves to be an effective indicator of capacitor degradation. The information of all SMs are acquired with a proper rotating sequence. This condition monitoring process could be enabled regularly and demonstrate the degradation trend accurately. Besides, it does not affect the normal operation of MMC, and works well in different control or modulation strategies. Experimental results verify the feasibility of the proposed method.

This paper aims to present a three-phase inverter topology to reduce the common mode voltage(CMV) variations. First, the role of the switching device’s junction capacitance in the transition from active state to inactive state is explained, which is based on a typical H8 inverter topology. Then, through theoretical analysis, the drawbacks of the clamping H8 topology and control strategy are clarified, the CMV of which cannot be clamped as expected. Therefore, based on the foundations, the clamping H8 topology inverter with paralleled resistors is proposed to reduce the CMV variations during the transition from active states to inactive states. And the improved modulation method is employed to eliminate the effect of the dead time on the waveform of CMV. Comparisons between the conventional H6 topology and the proposed H8 topology is carried out. The proposed conversion structure with the improved modulation method shows better performance in terms of CMV variations and EMI reduction, which is verified with experimental results.

The shunt active power filter (SAPF) cannot compensate harmonic and reactive current completely when capacity is limited. Aiming at the problem, an adaptive harmonic compensation control method based on second order generalized integrator (SOGI) is proposed with calculating APF’s capacity strictly. SOGI is used to extract the harmonic currents as instruction current. RDFT algorithm is used to calculate the RMS of each harmonic component. According to the SAPF’s capacity, the selective harmonic components to compensate and the corresponding ratio is adjusted adaptively. The PI and repetitive compound control strategy is used to track the compensation current accurately. Simulation analysis and experiments show that the stated method has obvious superiority in control simplicity and capacity utilization of SAPF.

Soft normally open point (SNOP) is a power electronic device installed at normally open point (NOP) in a distribution network which can greatly promote the flexibility and controllability of distribution network. This paper firstly introduces the typical installation of SNOP, and takes the back to back MMC SNOP system as the studied case. Then the PQ-VdcQ strategy is described as steady-state control strategy of SNOP system, and the control principle of power flow on feeder is briefly illustrated. Lastly, the strategies of unbalanced current compensation and active power oscillating suppression are described for fault ride-through strategy. To avoid overcurrent, the unbalanced current compensation strategy is adopted. Simulation results verify the accuracy and effectiveness of the strategies adopted.

This paper has proposed a multi-target virtual resistance strategy which can effectively realize targets of unbalanced voltage compensation and unbalanced current (power) sharing among inverters in 400 Hz low voltage microgrid. For unbalanced voltage compensation function, the strategy employs virtual resistance based on unbalanced voltage degree to compensate unbalanced voltage. For unbalanced current sharing function, the strategy uses current sharing degree and virtual resistance to share unbalanced current among inverters in parallel system. The experimental results of two inverters in parallel system are shown to prove the validity of proposed strategy. In addition, this strategy reduces large calculation and is easy to implement.

In this paper, an analysis and calculation of the dc-link current and voltage ripples are presented for a three-phase inverter with unbalanced load. A comparison of the dc-link average and root-mean-square (rms) currents between considering and ignoring high frequency harmonics of the output current is drawn. It is shown that high frequency harmonic currents have little effect on the dc-link current, and therefore, they can be ignored. Based on the symmetrical components method, the dc-link average and harmonic rms currents are derived, and the dc-link voltage ripple is compared between the balanced and unbalanced loads. It can be found that the dc-link current and voltage ripples consist of not only high frequency harmonics but also the double fundamental frequency harmonic, and the voltage ripple is independent of the positive-sequence component and determined by the negative-sequence component, under the unbalanced load. Experimental results are shown to verify the accuracy of the theoretical analysis.

Switch fault diagnosis and remedial actions are an important design aspect for isolated full-bridge dc-dc converters, and they can highly improve reliability of the whole system. In this paper, a fast switch short-circuit fault (SCF) diagnostic method is proposed for the phase-shifted full-bridge (PSFB) converter. The dc-link current and transformer primary voltage are treated as diagnosis criteria. Based on the combination of real-time criteria and switch gate-driver signals, the switch SCF can be identified rapidly, and thus further damage can be avoided. Besides, a remedial action for the faulty PSFB converter is introduced to keep the continuity of the system. The converter under fault can be reconfigured into an asymmetrical half-bridge converter. Moreover, a boost unit, including a switch and a diode, is inserted into between the output rectifier and filter capacitor to compensate the output voltage. The operational principle, design considerations, and implementation are discussed in this paper. Experimental results are shown to verify the validity of theoretical analysis.

A novel frequency-domain EMC modeling technique is proposed to predict the conducted electromagnetic interference (EMI) in a three-phase inverter system. The proposed model can predict the conducted emissions up to 30MHz. Moreover, the proposed model can analysis noise source and the noise propagation respectively. Based on the model, the influence of the IGBT stray capacitance on total EMI noise are analysed. In addition, it is found that the load current can influence the total EMI noise on LISN by affecting the DM noise source. The analysis is confirmed with simulation and experiment results.

This paper introduces a paralleled three-phase four-leg inverters and the corresponding pulse width modulation (PWM) method for the purpose of reduction the common mode current (CMC) and common mode electromagnetic interference (EMI). Considering the control principle of three-phase four-leg to limit the common mode voltage and the characteristic of paralleled inverters, the simple PWM scheme for paralleled three-phase four-leg inverters can be deduced. In the modified topology, the low frequency and high frequency models can be set up to determine the load parameters of the extra phase. The results based on MATLAB SIMULINK and experiments are provided to validate the proposed method.

A general fault diagnosis method is proposed for modular dc-dc converter system. The magnetic component voltage in each module is chosen as diagnostic signal, which can be easily obtained by adding an auxiliary winding into each magnetic core. Based on the feature of these signals, two logical hardware circuits are designed to achieve fast fault detection for different demands. Fault can be detected within one switching period, which enables a fast reconfiguration for continuous operation. The input-series-output-parallel (ISOP) modular dc-dc system is analyzed as an example. Fault diagnosis principle, hardware implementation, reconfiguration, and experimental verification are given in this paper.

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis.

Wiring inductance has a critical effect on electrical, thermal, and electromagnetic compatibility (EMC) performances in inverters. Therefore, the low stray inductance laminated busbar, as a state-of-the-art pathway interface, is widely used in high-power inverters. However, the asymmetrical stray inductances of the laminated busbar may cause different voltage and thermal stresses for semiconductor devices of the same power stage. In order to achieve low and symmetrical stray inductances in the laminated busbar, this paper presents the investigation, evaluation, and optimization of the stray inductances of the laminated busbar. Based on the current commutation loop (CCL) analysis, the investigation of two-layer, three-layer, and multilayer laminated busbars is proposed through three-dimensional (3-D) finite element analysis (FEA) simulations. It can be found that the skin effect, mutual effect, CCL length, CCL separation distance, and split plate significantly influence the stray inductance of laminated busbars. Furthermore, the multilayer laminated busbar structure for multilevel neutral point clamped (NPC) inverter is derived. On the basis of the theoretical analysis, CCL stray inductances of a three-layer laminated busbar are extracted by means of FEA simulation and an improved impedance resonant measurement in a single-phase H-bridge high-power inverter. Insulated gate bipolar transistor (IGBT) voltage overshoot waveforms further validate the stray inductance asymmetry of the laminated busbar. A compromise between the stray inductance and symmetry is proposed in the three-layer laminated busbar. Finally, several feasible guidelines for the optimization of the laminated busbar design are introduced.

In the inverter-interfaced AC microgrid (IIAM), when a short-circuit fault occurs at the distribution line, the output fault current of inverter is commonly limited to two times over its rated current due to the limited overcurrent capacity of power electronic device. Therefore, the conventional overcurrent protection principle cannot be applied to IIAM. Aiming at addressing this issue, a new protection method based on the low harmonics components is proposed in this paper. Through injecting a certain proportion of fifth harmonics to the fault current, the protection device can detect the fault according to the low harmonics components extracted by the digital relay (DR). This scheme does not rely on the large fault current. Therefore, some limitations of the traditional overcurrent protection are avoided. The corresponding experiments were carried out with two 10kVA parallel-connected inverters supply system, and the results proved the feasibility of this approach.

In this paper, a new fault diagnosis method, which treats magnetic components voltages as diagnostic criteria, is proposed for input-series-output-parallel (ISOP) modular dc-dc converters. Since diagnostic criteria can be easily measured by adding an auxiliary winding into each magnetic core, additional sensors are needless. Based on the diagnostic criteria features, a low-cost logical hardware circuit is designed, and faults can be detected within one switching period. The structure of the ISOP modular system and corresponding control method will be first introduced. Then fault diagnosis principle and implementation are given in detail. The simulation is used to verify the proposed method.

This paper proposes a four-stage fault protection scheme against the short-circuit fault for the high-power three-phase three-wire combined inverter to achieve high reliability. The short-circuit fault on the load side is the focus of this paper, and the short-circuit fault of switching devices is not involved. Based on the synchronous rotating frame, the inverter is controlled as a voltage source in the normal state. When a short-circuit fault (line-to-line fault or balanced three-phase fault) occurs, the hardware-circuit-based hysteresis current control strategy can effectively limit the output currents and protect the switching devices from damage. In the meantime, the software controller detects the fault and switches to the current controlled mode. Under the current controlled state, the inverter behaves as a current source until the short-circuit fault is cleared by the circuit breaker. After clearing the fault, the output voltage recovers quickly from the current controlled state. Therefore, the selective protection is realized and the critical loads can be continuously supplied by the inverter. The operational principle, design consideration, and implementation are discussed in this paper. The simulation and experimental results are provided to verify the validity of theoretical analysis.

This paper proposes a four-step open-circuit fault diagnosis and fault-tolerant scheme for isolated phase-shifted full-bridge (PSFB) dc-dc converters to improve the reliability. The fault diagnostic method utilizes the primary voltage of the transformer as the diagnostic criterion, which can be obtained easily by adding an auxiliary winding. When an open-circuit fault occurs in any switch of the PSFB converter, the proposed fault detection method can generate an indication of the abnormal state and trigger an active-phase-shifted in the control system. Under the APS state, it is very easy to locate the exact position of faulty switch because the voltage waveform of the primary winding heavily depends on the location of the faulty switch. After locating the position of the faulty switch, the PSFB converter is reconfigured into an asymmetrical half-bridge (AHB) converter by turning ON the normal switch in the faulty leg and adding a redundant winding to the secondary side. Therefore, the rebuilt AHB converter can keep the output voltage constant under a reduced power rating after the open-circuit fault. The operational principle, design consideration, and implementation are discussed in this paper. The experimental results are given to verify the validity of theoretical analysis. The proposed strategies outperform the traditional schemes in terms of cost, reliability, and power density.

A multiple-output dc-dc converter with shared zero-current-switching (ZCS) lagging leg is presented in this paper. In this proposed converter, each output is regulated by the phase shifted between the independent leading legs and the shared lagging leg. The switches in the leading legs process the individual output power and work in zero-voltage switching (ZVS), which are suitable for utilizing the MOSFETs; the switches in the shared lagging leg process the total output power and work in ZCS, which especially suit for using the insulated gate bipolar transistor. The ZVS of the leading legs is easy to achieve and the ZCS of the lagging leg is independent of the loads. Therefore, the proposed converter has compact structure, fully regulation abilities, adapted soft-switching modes, and simple modulation schemes. Moreover, the new outputs can be conveniently obtained by using the uniform algorithm. In this paper, the derivation of the proposed converter is presented; the proposed shared ZCS lagging leg converter with dual output is analyzed, and the analysis is further extended to the general multiple-output situation; the state variation of the proposed converter is also surveyed; finally, a three-output prototype with 200-240 V input, 24 V/5 A, 15 V/15 A, and 12 V/10 A outputs is built, and the analysis is verified by the experimental results.

A new diagnostic method for the dc-dc converter, which utilizes the magnetic near field as the diagnostic criterion, is proposed in this paper. The magnetic near field of the converter is captured using a loop magnetic near field probe. The frequency information in the measured waveform is extracted by the fast Fourier transfer; the interested low-order harmonic components are classified by the neural network while the interested high-order harmonic components are evaluated using the simple mathematical method. Finally, by compromising the results of the two parts, the detailed diagnostic conclusions are obtained. In this paper, the methodologies of the measurement and diagnosis are clearly described; then, the proposed method is used to monitor and diagnose the buck and phase shift full bridge converters. The experimental results are presented to show the validity of the analysis. Since the two chosen examples include most of the potential situations, the proposed method can be generalized and applied to many other types of converters.

One problem with microprocessor-based high-frequency pulsewidth-modulation (PWM) converters is the modulating resolution limitation caused by limited-time resolution of hardware timers. In this paper, a novel PWM technique, the double PWM (DPWM), is proposed. DPWM combines the advantages of low-frequency modulation and high-frequency switching in power conversion and resolves the contradiction between high frequency and accuracy in a digital control scheme. DPWM effectively increases the resolution in digital control, while the harmonics introduced by this method is found to be negligible. Theoretical analysis, characteristics, and design considerations are given, and they are verified by experiments on a 5.5-kW 20-kHz insulated-gate-bipolar-transistor boost-buck converter

In this paper, a five-stage fault protection scheme against the short-circuit fault for parallel high-power three-phase combined inverter to achieve high reliability is proposed. There are two control modes, Voltage Controlled Mode (VCM) and Current Controlled Mode (CCM). VCM operates under normal operation to keep constant output voltage. CCM operates under fault operation to limit the output current, which is combined with hardware current limit circuit and software current limit unit. For parallel inverter system, the output voltage recovers quickly and then switch from CCM to VCM for inverter once the short-circuit fault is recovered. However, A little time difference of switching mode between parallel inverters results in the surge circulating current, which reduces the system reliability. Thus, the pre-synchronized state is added to achieve the current sharing at any time and to achieve simultaneous mode change for each inverter. A prototype with two parallel three-phase 400kVA/50HZ inverters is built to verify the reliability of the proposed method.