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2. SEM overlay target design using e-beam simulation

3. Recess metrology challenges for 3D device architectures in advanced technology nodes

4. Plasma assisted particle contamination control

7. Understanding the influence of 3D sidewall roughness on observed line-edge roughness in scanning electron microscopy images

10. Recess metrology challenges for 3D device architectures in advanced technology nodes

11. Surface effects in simulations of scanning electron microscopy images

12. First results from the Large Dynamic Range Atomic Force Microscope for overlay metrology

14. Improving statistical validity with Macro CD-SEM imaging

18. Accuracy aware pixel selection in multi-wavelength μDBO metrology enables higher robustness and accuracy for DRAM

42. Edge placement error wafer mapping and investigation for improvement in advanced DRAM node

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