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The atmospheric neutron induced single event burnout (SEB) is observed for SiC MOSFETs by conducting irradiation at China Spallation Neutron Source (CSNS) with maximum energy close to 1.6 GeV. The failure is manifested as a sudden loss of voltage blocking ability during irradiation and a melting region is observed for the device with SEB. The SEB failure rates of SiC MOSFETs are calculated based on the experimental results. It shows that the failure rates increase exponentially with operating voltages. The measured failure rates are consistent with the results obtained at the other spallation neutron sources, which proves that the neutron beam line at CSNS is suitable for SEB testing. The information of the secondary ions produced by neutron is obtained through Monte Carlo simulations and the contributors to SEB are analyzed. A simulation method is also applied to calculate SEB failure rate by considering ionization energy deposition of secondary ions in the sensitive region of SiC devices. The simulated failure rates are also consistent with the experimental results. [ABSTRACT FROM AUTHOR]

We preform a first-principles study of performance of 5 nm double-gated (DG) Schottky-barrier field effect transistors (SBFETs) based on two-dimensional SiC with monolayer or bilayer metallic 1T-phase MoS2 contacts. Because of the wide bandgap of SiC, the corresponding DG SBFETs can weaken the short channel effect. The calculated transfer characteristics also meet the standard of the high performance transistor summarized by international technology road-map for semiconductors. Moreover, the bilayer metallic 1T-phase MoS2 contacts in three stacking structures all can further raise the ON-state currents of DG SiC SBFETs in varying degrees. The above results are helpful and instructive for design of short channel transistors in the future. [ABSTRACT FROM AUTHOR]

• A dynamic time-delay calculation algorithm based on MI and adaptive sliding window (MIDTA) is proposed. • MIDTA algorithm is used to solve the problem of long time-delay of cement kiln. • An algorithm of residual network and bidirectional novel gated recurrent unit (ResNet-BiNGRU) is proposed. • A Gaussian-weighted multi-model fusion method is proposed. • MIDTA-ResNet-BiNGRU multi-model fusion algorithm can be used to measure the temperature of cement rotary kiln with high precision. China's cement production energy consumption accounts for more than 10% of the country's total energy consumption, and its emissions account for about 60% of the country's industrial emissions. The temperature of a cement rotary kiln directly affects the quality of the final product, the energy consumption of a plant, and emissions. Therefore, it is necessary to measure, to a high degree of accuracy, the temperature of a cement rotary kiln to reduce energy consumption, emissions, and improve product quality. However, the conditions in cement kilns are complex and variable; and there are large time-delays, while temperatures are affected by historical working conditions, making temperature measurement extremely difficult. In this paper, a modelling algorithm with a residual network and a bidirectional novel gated cycle unit is used to predict the clinker exit temperature of the rotary kiln. In addition, to solve the problem of large time-delays in cement kilns, a dynamic time-delay calculation algorithm based on Mutual information and adaptive sliding windows is proposed for time series data reconstruction, and finally a Gaussian-weighted multi-model fusion is applied to the prediction results for cement rotary kilns that produce a wide range of working conditions. To verify the advantages and feasibility of the proposed method, experimental validation is carried out using original production data from a large cement manufacturing enterprise in South China. The results demonstrate that the single step prediction time of the presented approach is 0.66 s, which can predict cement kiln temperatures quickly and accurately, compared to a single conventional forecasting algorithm, the average temperature difference dropped from 11.76 °C to 3.51 °C, R2 increased from 0.43 to 0.89, 94% of the depicted temperature errors are at ± 10 °C This will provide an effective solution for online decision-making during actual cement production. [ABSTRACT FROM AUTHOR]

The mechanisms responsible for atmospheric neutron induced single event burnout (SEB) in commercial silicon carbide (SiC) power MOSFETs were investigated and analyzed. Firstly, based on the atmospheric neutron irradiation spectrometer (ANIS) at the China spallation neutron source (CSNS), accelerated neutron irradiation experiments were carried out to evaluate the dependence of the sensitivity of atmospheric neutrons induced SEB on the drain bias voltage (V DS) in SiC MOSFET. Secondly, microscopic detection and analysis of the burned-out devices were performed at the wafer level by combining microscopy, focused ion beam (FIB) and scanning electron microscope (SEM) to reveal SEB mechanisms inside the semiconductor device. Locally melted morphologies were observed both in the source contact and in the deeper SiC device. Since the melting point of the contact metal is much lower than that of SiC, it is the region where the burnout occurs initially, followed by the vicinity of the n−-drift/n+-drain interface. In addition, combined with the Geant4 calculation and TCAD simulation, the spatiotemporal evolution of the internal electric field and the maximum lattice temperature inside the device after ion incidence were simulated and analyzed. Results show that the strong impact ionization of the carriers induced by the local electric field causes a large amount of energy dissipation in a short time, which eventually leads to thermal damage to the device. • Single event burnout (SEB) of SiC power MOSFET • Broad spectrum-like atmospheric neutron irradiation experiment • Transient device simulations based on TCAD • Secondary ions, radiation effects and SEB mechanism [ABSTRACT FROM AUTHOR]

Dr. Xiarong Hu from the University of Electronic Science and Technology of China talks about the research behind his Letter 'SOI LDMOS with variable-k dielectric trench' on page 1235. [ABSTRACT FROM AUTHOR]