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For a hybrid energy storage system consisting of battery and super‐capacitor (SC) in More Electric Aircraft, a decentralised control strategy, which is based on the virtual impedance droop control, can implement the frequency domain allocation of load power avoiding communication delay and a single point of failure. Although the output voltage deviation and state‐of‐charge (SoC) limitation are solved by existing methods, it still suffers from settling time extending. Secondary voltage controls (SVCs) of virtual‐droop‐controlled for battery and SC are proposed to solve the issue. SVC for the output voltage is designed to compensate for the output voltage deviation in the battery converter based on virtual resistance droop control. SC converter, which is controlled by the SVC for input voltage in virtual capacitance droop control, enforces SC SoC back to the initial value and maintains consistent settling time. In this study, a set of detailed design methods for the controller parameters of SVC are developed not only to regulate the output voltage and SoC recovery but also to keep the same settling time. The results of the simulation and experiment validate the effectiveness of the proposed SVC and design method. [ABSTRACT FROM AUTHOR]

Wide bandgap semiconductors with fast switching speed capability are becoming an enabler to achieve the higher power density design. However, the further increase of switching frequency cannot continuously improve the power quality of ac-side waveforms in dc–ac/ac–dc application. The main reason is the distortion of pulsewidth modulation (PWM) voltage at switching point under high switching frequency. In general, there are two contributors causing PWM voltage distortions in bridge-based topologies. One is the deadtime, which occupies higher ratio in the small duty cycle case under high switching frequency and induces the voltage errors. The other one is the turn-off transient in the small load current or around the zero-crossing point of the ac-side current, because the relatively slow rising slope of the drain–source voltage will affect the right duty cycle. To solve this issue, this paper proposes a closed-loop modulation scheme to compensate the duty cycle distortion of PWM voltage based on one-cycle control or charge control. Compared to the traditional feedforward type of compensation, the proposed scheme does not need online calculation and instantaneous inductor current sampling, and it shows potential to be a general scheme for variety of topologies and modulations. Simulations and experiments are carried out on a 400-kHz single-phase full-bridge inverter with 400-Hz fundamental frequency to demonstrate the performance of the proposed approach. [ABSTRACT FROM AUTHOR]

Constant power loads (CPLs) are very common in multiconverter power system applications. Buck converters loaded by CPLs have different start-up and step-response processes from the resistive load. This paper analyzes the start-up process and step response of an average current-controlled buck converter with CPLs based on the phase portrait method. Design criteria rules have been proposed to achieve system stability during start-up and load transient processes. The proper current-limiting value is proposed accordingly to avoid the instability during the start-up and load change dynamics. Simulation and experimental results verify the analysis and the proposed proper current-limit value. [ABSTRACT FROM AUTHOR]