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The diode-front-end cascaded H-bridge (CHB) inverters have prevailed in the nonregenerative industry drive domain for high-power medium-voltage applications. The regenerative version of the CHB drives is made possible by adding the extra active-front-end rectifier in each power cell, such as a three-phase PWM rectifier. However, due to the instantaneous power unbalance, the dc-link capacitors of the regenerative power cell need to be overdesigned to maintain a stable low ripple dc-link voltage. To reduce the dc-link capacitance, this article proposes a novel closed-loop voltage ripple controller for the regenerative CHB drive without adding extra sensors. In the proposed method, dc-link voltage ripple amplitude and phase angle are accurately detected with a high-performance adaptive filter. Moreover, a latent instability issue is discussed and is avoided in the proposed controller. The performance of the proposed control strategy is validated experimentally on a seven-level regenerative CHB drive. [ABSTRACT FROM AUTHOR]

In this article, a new seven-level voltage source converter topology is proposed for high-power medium-voltage applications. The proposed converter has less number of components in the circuit compared to the existing advanced seven-level topologies. All the switches have the same voltage rating. Space vector modulation technique is developed for the proposed topology to balance the flying capacitors voltage. The performance of the proposed converter is evaluated at both steady-state and transient conditions in MATLAB/Simulink. A scaled-down prototype is built to verify the feasibility and performance of the proposed converter at different operating conditions. [ABSTRACT FROM AUTHOR]

In this article, a new postfault control algorithm for cascaded H-bridge (CHB) multilevel inverter is proposed to increase the maximum available output voltage under semiconductor fault conditions. Once a semiconductor switch in an H-bridge power cell fails, instead of bypassing the faulty cell, it can be utilized to generate a voltage. However, one of the three levels (positive, negative, or zero) of the faulty cell output voltage is not available, reducing the available output voltage of the cell to half. In the proposed method, the faulty cells being utilized and combined with the neutral shift (NS) method to achieve a higher output voltage of the CHB in faulty conditions. The output voltage obtained by the proposed method is analyzed for different faulty conditions and compared with the conventional NS method. Experimental results are presented confirming the effectiveness of the proposed methods in increasing the maximum output voltage at different faulty conditions. [ABSTRACT FROM AUTHOR]

In this article, a new five-level voltage source inverter is proposed for high-power applications. The proposed inverter is competitive in performance, component count, and control complexity compared with the conventional multilevel inverters. Also, the proposed inverter has a simple structure as it does not have any dc-link neutral points, unlike hybrid converters. Furthermore, the proposed topology can be connected in a back-to-back due to the presence of a common dc-link. Also, there is no need of isolated dc source and a complex phase-shifting transformer. In addition, a simple voltage balancing approach based on a level-shifted carrier pulsewidth modulation scheme is proposed to control the flying capacitor voltages. The proposed approach will make use of the redundancy switching states to balance the flying capacitor voltages in the proposed inverter. The steady-state and transient performance of the proposed five-level voltage source inverter and voltage balancing approach is validated through MATLAB simulation studies at different power factors and modulation indices. The simulation studies are further evaluated experimentally by a scaled-down laboratory prototype. Furthermore, the feasibility of the proposed topology is analyzed under the performance indices of voltage and current harmonic distortion, flying capacitor voltage ripples, converter power losses, and converter efficiency. [ABSTRACT FROM AUTHOR]

Demanding higher power, higher power quality, lower switching loss, and eliminating interface transformers in industrial applications caused significant attention toward multilevel converters. This paper presents current control of a seven-level topology for medium-voltage high-power applications. This topology has fewer active switches and components, and less control complexity in comparison to the other existing classic and advanced seven-level topologies. A comprehensive review has been done on seven-level topologies to demonstrate the advantages of this topology in this paper. A control method based on model predictive control (MPC) is developed to balance the flying capacitors of this topology at their desired values and control the output currents without the need of pulsewidth modulation blocks, and proportional-integral (PI) controllers, which is the advantage of MPC in power electronics applications. In order to evaluate the performance of the seven-level topology and the developed control method effectiveness, experimental results are shown for different conditions, which demonstrate the feasibility of the seven-level topology and the developed control technique. [ABSTRACT FROM AUTHOR]

This paper presents a new five-level T-type nested neutral point clamped (T-NNPC) converter. The proposed five-level T-NNPC topology is very attractive for medium-voltage applications as it can work in a wide range of voltages without the need of devices in series, and fewer components compared to the other five-level topologies. A model predictive control (MPC) strategy is also developed for the proposed converter to control the output currents at different output frequencies, and control flying capacitor voltages. A discrete-time model of the converter is developed and the control objectives that are the output currents and flying capacitor voltages are defined regarding switching states. A cost function is defined to minimize the deviation of the predicted values of the control objectives from their desired values. During each sampling time, the best switching state is selected and applied to the converter. The performance of the proposed five-level T-NNPC and the developed MPC strategy is studied in the MATLAB/Simulink environment, and the feasibility of the converter is evaluated experimentally. [ABSTRACT FROM AUTHOR]

In this letter, a new control method based on the sinusoidal pulsewidth modulation scheme is proposed to control capacitor voltages of a T-type four-level nested neutral-point-clamped (NNPC) inverter. The T-type four-level NNPC inverter has a lower number of switches and components compared with other four-level classic and advanced inverters, which make this topology attractive for high-power medium-voltage applications. This topology has been proposed and studied with the assumption of constant dc sources instead of flying capacitors. In this letter, a simple single-phase modulator is developed to balance flying capacitor voltages. The performance and the feasibility of the proposed control technique are evaluated experimentally under a steady-state and transient conditions and for different modulation indexes and loads. The experimental results demonstrate the effectiveness of the developed control method to control the capacitors’ voltages. [ABSTRACT FROM AUTHOR]

The five-level nested neutral-point-clamped (5L-NNPC) converter is one of the most promising topologies for medium-voltage (2.3–7.2 kV) high-power applications such as medium-voltage drives, wind energy conversion systems, and grid-connected systems. The 5L-NNPC requires a fewer number of switching devices, freewheeling and clamping diodes, and flying capacitors compared to the existing five-level multilevel converters. In the 5L-NNPC topology, each flying capacitor voltage is regulated at one-fourth of the dc-bus voltage to obtain the five-level operation. Due to the lack of redundant switching states, it is difficult to control the flying capacitor voltages by using the pulse-width-modulation-based classical control methods. This paper proposes a model-predictive current control (MPCC) approach to control the flying capacitor voltages along with the output currents of the 5L-NNPC converter. The discrete-time model of 5L-NNPC is developed to implement the MPCC scheme. The simulation and experimental studies are conducted to verify the dynamic and steady-state performance of 5L-NNPC with the MPCC scheme. The performance of the proposed MPCC approach is compared with the conventional space-vector-modulation-based voltage-balancing approach. Furthermore, the flying capacitor voltage control capability of MPCC is verified at different load power factors. [ABSTRACT FROM AUTHOR]

The five-level modular neutral-point-clamped (5L-MNPC) converter is realized by connecting two three-level neutral-point-clamped modules in series. For five-level operation, each dc-bus capacitor voltage of the modular neutral-point-clamped topology should be regulated at one-fourth of the net dc-bus voltage. In this letter, a simple voltage-balancing approach based on the carrier-based modulation scheme is proposed to achieve the above objectives. The proposed approach uses the redundancy switching states along with the current direction and the instantaneous value of the dc-bus capacitor voltage to achieve the voltage balancing in the 5L-MNPC topology. The dynamic performance of the 5L-MNPC topology with the proposed voltage-balancing approach is verified experimentally. [ABSTRACT FROM AUTHOR]

Compared with multilevel space vector modulation, level-shifted multicarrier sinusoidal pulsewidth modulation (SPWM) for nested neutral point-clamped (NNPC) inverters requires much less calculations and implementation efforts, but the existing conventional SPWM cannot suppress the severe flying-capacitor (FC) voltage ripples under low output-frequency conditions. In order to solve this problem, a multicarrier-based PWM strategy with complete voltage balance control (VBC) capacity is proposed in this paper. For NNPC inverters operating under low output-frequency conditions, two preprocessing steps, the zero-sequence injection and the modulation-signal rearrangement, are proposed before the comparisons between level-shifted carriers and modulating signals. These preprocessing steps make the average currents flowing through FCs zero, which is beneficial to greatly reduce the FC voltage ripples under low output-frequency conditions. Together with additional VBC, the proposed modulation can assure the FC voltages balanced under the entire output-frequency conditions. Principles and implementation processes of proposed modulation techniques and VBC methodsare elaborated in detail and compared with conventional modulation methods. Both simulation results from a 5-MVA system and experimental results based on a 5-kVA platform are presented to verify the effectiveness. [ABSTRACT FROM AUTHOR]

Four-level nested neutral-point clamped (NNPC) inverters experience severe voltage balancing problems under low output-frequency conditions when the conventional four-level space vector modulation (4L-SVM) technique is applied, which limits their wider application. In order to get a complete control of the flying-capacitor voltages, and to alleviate the calculation burden of conventional 4L-SVM, a simplified but effective 4L-SVM technique along with the voltage balance control (VBC) function is proposed in this paper. For low modulation indexes, zero and small vectors are selectively utilized and distributed to force the average charging and discharging time of flying capacitors to be equal to each other during every switching period, so that voltage ripples are greatly reduced to be within an acceptable level under low output-frequency conditions. For high modulation indexes, the simplification of conventional 4L-SVM for NNPC inverters into two-level SVM is proposed to reduce the computation complexity. Principles of the proposed 4L-SVM and VBC are elaborated in detail. The steady-state, transient-state, and VBC performances are investigated and compared with the case where the conventional 4L-SVM is applied. Simulation results of a 5 MVA inverter system and experimental results of a scaled-down 5 kVA inverter system are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

The recently-developed nested neutral-point clamped (NNPC) converter is a four-level converter for medium-voltage high-power applications. It has some merits such as operating over wide voltage ranges (2.4–7.2 kV) without switching devices in series and less diodes or capacitors when compared with classical four-level topologies. But it has severe voltage balancing problems under low output frequency conditions when conventional space vector modulation (SVM) or sinusoidal pulse width modulation (SPWM) is applied, which limits its wide applications. In order to solve this issue, a space virtual-vector modulation (SVVM) along with a voltage balance control (VBC) algorithm is proposed in this paper. It helps reduce the voltage ripples greatly and maintain them within an acceptable region under low output frequency conditions. Therefore, it guarantees even voltage stresses among switching devices and extends the NNPC converter's applications. Principles of the proposed SVVM and VBC algorithms are elaborated in detail, and the voltage balancing performance is investigated and compared with the cases where conventional SVM and SPWM with the same VBC are applied. The relationship curves between voltage ripples and flying capacitance, output power, and output frequency have been explored and compared for both conventional SVM and proposed SVVM. Simulation and experimental results are presented to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new five-level voltage source inverter for medium-voltage high-power applications. The proposed inverter is based on the upgrade of a four-level nested neutral-point clamped converter. This inverter can operate over a wide range of voltages without the need for connecting power semiconductor in series, has high-quality output voltage and fewer components compared to other classic five-level topologies. The features and operation of the proposed converter are studied and a simple sinusoidal PWM scheme is developed to control and balance the flying capacitors to their desired values. The performance of the proposed converter is evaluated by simulation and experimental results. [ABSTRACT FROM PUBLISHER]

A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4–7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

This paper proposes a model predictive control (MPC) strategy for a nested neutral point-clamped (NNPC) converter to control output currents and voltages of flying capacitors. The NNPC converter is a four-level converter topology for medium-voltage applications with interesting properties such as operating over a wide range of voltages (2.4–7.2 KV) without the need for connecting power semiconductor in series, high quality output voltage, less number of components compared to other classical four-level topologies. A discrete-time model of the converter is presented and all the control objectives are formulated in terms of the switching states. During each sampling interval, the predicted variables are assessed by the cost function and the best switching state which gives minimum value for the cost function is selected and applied to the converter gating terminals. The performances of the NNPC converter and predictive control scheme are verified through MATLAB/Simulink simulations and their feasibility is evaluated experimentally. [ABSTRACT FROM AUTHOR]

This study proposes a generalised approach based on model predictive strategy for the current control, dc-link capacitor voltages balancing, switching frequency reduction and common-mode voltage mitigation in multilevel diodeclamped converters. A generalised discrete-time model of the converters is presented, where all the control objectives are formulated in terms of the switching states. The control goals are expressed as a cost function, and with the help of suitable weighting factors these goals are met simultaneously. The cost function minimisation is used as criteria for choosing the best switching state which would be applied to the converter during next sampling interval. The real-time digital control issues such as computational burden and delay compensation are also discussed. The feasibility of the proposed method is verified by simulations in three- to six-level converters, and by experiments in three- and fourlevel converters. [ABSTRACT FROM AUTHOR]

A new auxiliary circuit for an ac–dc single-stage power-factor-corrected (SSPFC) full-bridge-type converter is proposed in this paper. The new auxiliary circuit is simple, handles low power, and is active only when the converter is operating under light load conditions. In this paper, the operation of an SSPFC converter is briefly reviewed and the main principle behind the auxiliary circuit is explained. The new auxiliary circuit is introduced, its operation is explained, and its feasibility in a multilevel SSPFC is confirmed with experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a new voltage source converter for medium voltage applications is presented which can operate over a wide range of voltages (2.4-7.2 kV) without the need for connecting the power semiconductor in series. The operation of the proposed converter is studied and analyzed. In order to control the proposed converter, a space-vector modulation (SVM) strategy with redundant switching states has been proposed. SVM usually has redundant switching state anyways. What is the main point we are trying to get to? These redundant switching states help to control the output voltage and balance voltages of the flying capacitors in the proposed converter. The performance of the converter under different operating conditions is investigated in MATLAB/Simulink environment. The feasibility of the proposed converter is evaluated experimentally on a 5-kVA prototype. [ABSTRACT FROM AUTHOR]

This paper presents a finite control set model predictive strategy and its application to the load voltage control of two-level four-leg inverters. The proposed approach uses the novel discrete-time model of the inverter and output $LC$ filter in order to predict the variables to be controlled. These predictions are carried out for the 16 switching states of the inverter and are evaluated using a cost function. The switching state that forces the load voltages to be closest to their respective references is chosen and applied to the inverter. The behavior of the predictive controller has been investigated, and the changes to both inductive and capacitive filter parameters have been considered. In order to improve the reliability of the fourth leg as well as the overall inverter efficiency, a solution is proposed, which combines hardware and software reconfigurations. The feasibility of the proposed method is verified through simulation and experimental results considering single-/three-phase, balanced/unbalanced, and linear/nonlinear loads. [ABSTRACT FROM PUBLISHER]

In this paper, a new integrated three-level ac-dc converter is presented. The proposed converter integrates the operation of the boost power factor correction and the three-level dc-dc converter. The converter is made to operate with two independent controllers-an input controller that performs power factor correction and regulates the dc bus and an output controller that regulates the output voltage. The input controller prevents the dc-bus voltage from becoming excessive while still allowing a single-stage converter topology to be used. The paper explains the operation of the new converter in detail and discusses its features and a procedure for its proper design. Experimental results obtained from a prototype are presented to confirm the feasibility of the new converter. [ABSTRACT FROM AUTHOR]

A new three-phase single-stage rectifier is proposed in this paper. The outstanding features of the proposed rectifier are that it can produce input currents that do not have deadband regions and an output current that can be continuous when the converter is operating from maximum load to at least half of the load. In this paper, the operation of the new converter is explained, its features and design are discussed in results, and its operation is confirmed with experimental results obtained from a prototype. [ABSTRACT FROM PUBLISHER]