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A novel Type-Reduction/Defuzzification circuit architecture for an analog interval type-2 fuzzy inference system is proposed. Based on the Nie-Tan type-reduction method, the circuit operates with current-mode inputs, representing the firing intervals of the rules created by the inference engine, and generating a PWM output. It is demonstrated that by selecting an appropriate number of consequents it is possible to create the PWM output directly, without the need for analog multiplier/divider circuits. This feature makes the circuit very simple, aiding in the design process, while the PWM output makes it suitable for controlling DC-DC converters, maximum power point trackers (MPPT) for energy generators, or other switching applications. It is designed to achieve very low power consumption, allowing its use in power restrained environments, such as energy harvesting systems. The circuit was designed using TSMC $0.18~\mu \text{m}$ technology, in CADENCE Virtuoso software, and simulated for different combinations of input values, demonstrating its capabilities. It was also simulated as part of a type-2 fuzzy inference system with two inputs, nine rules, and firing intervals represented by currents within 0 and $10~\mu \text{A}$ . The circuit was prototyped, and the experimental average power consumption was only $53.8~\mu \text{W}$ , validating its low power consumption characteristic.

A novel strategy for implementation of an analog current-mode interval type-2 fuzzy inference engine circuit with low-power consumption is presented. Previous current-mode architectures rely on minimum/maximum circuits, using current mirrors to perform bounded-difference operations or winner-take-all circuits to mirror the appropriate current among the inputs. It means that currents representing the membership degrees of input fuzzy sets may need to be copied several times to obtain the firing levels of each rule. To avoid this drawback, the proposed method uses high-gain differential amplifiers, operating with low bias currents, as comparators, creating digital signals that indicate the largest/smallest current. It allows digital gates to determine directly which of the currents from the membership degree generator circuits represent the correct solution to the overall inference process. The methodology for developing the system and obtaining the logical expressions is presented. Simulations show that a traditional implementation using min/max circuits presented in the literature consumes 4.4 times more power than the proposed architecture. The circuit was prototyped in TSMC 0.18- $\mu \text{m}$ technology and its functionality demonstrated by the correct generation of the consequents firing levels. The measured power consumption was 413.42 $\mu \text{W}$ , including the power from the fuzzifier circuits, with a power supply of 1.2 V.

Made available in DSpace on 2018-11-26T15:46:11Z (GMT). No. of bitstreams: 0 Previous issue date: 2018-01-01 Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES) A novel analog fuzzy membership function generator architecture, based on current steering mirrors, for interval type-2 fuzzy controllers is proposed in this paper. The Footprint of Uncertainty (FOU), characteristic of an interval type-2 fuzzy set, is generated by this novel architecture, which uses current steering mirrors controlled by a voltage input and allows width variation based on a central line. This main feature makes the circuit inherently type-2, i.e., not dependent of any type-1 fuzzifier, unlike all previous analog fuzzifiers found in the literature. The circuit operates in current mode and is capable of generating trapezoidal, triangular, Z-shaped and S-shaped membership functions. Input currents allow shape configuration, whereas a digitally programmable current mirror provides different inclinations, making it fully programmable (shape, width of the FOU, inclination, and position). Simulations validating the architecture were performed with TSMC CMOS 0.18 mu m technology, in CADENCE software. The circuit was later fabricated and characterized. Experimental results confirmed its ability to work as a fuzzifier, with all specified features, showing to be suitable even for dedicated low power applications. Inst Tecnol Aeronaut, Dept Eletron Aplicada, Praca Marechal Eduardo Gomes 50, BR-12228900 Sao Jose Dos Campos, SP, Brazil Univ Estadual Paulista, UNESP, Dept Engn Eletr, Campus Guaratingueta,Ave Ariberto Pereira da Cunha, BR-12516410 Guaratingueta, SP, Brazil Univ Estadual Paulista, UNESP, Dept Engn Eletr, Campus Guaratingueta,Ave Ariberto Pereira da Cunha, BR-12516410 Guaratingueta, SP, Brazil