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Brain-inspired neuromorphic computing has garnered significant attention for going beyond the constraint of von Neumann architecture. To emulate the human brain functions, various artificial synaptic devices have been proposed. Due to the high reliability and the CMOS compatibility, the synaptic transistors based on charge trapping (CT) mechanism have been considered to be one of the most promising candidates. However, most of the synaptic transistors based on CT mechanism were fabricated by costly vacuum-based techniques. In this report, based on a fully solution-driven strategy, the InZnO synaptic transistors, with Nd2O3 as the CT layer and ZrO2 as the dielectric layer, were integrated. The typical synaptic behaviors, including excitatory postsynaptic current, inhibitory postsynaptic current, memory enhancement, potentiation, and depression characteristics, were simulated by modulating presynaptic spikes. It is confirmed that the fabricated synaptic transistor shows low channel conductance and low energy consumption of 0.13 pJ per synaptic event. A recognition accuracy of 93.0% was achieved for the MNIST handwritten digital image dataset by an artificial neural network simulation. This study demonstrates the feasibility of solution-processed synaptic transistors, which exhibit significant potential for the neuromorphic applications. [ABSTRACT FROM AUTHOR]

The development of large-scale manufacturing and cost-saving artificial synaptic devices is of great significance for the realization of hardware neural networks. In this work, the In2O3 synaptic transistors with boron ion-doped ZrOx as the dielectric layer were fabricated by the solution process. The large counterclockwise hysteresis indicates that the nonvolatile memory capacity of the synaptic transistors was improved by boron ions doping. Typical synaptic functions including excitatory postsynaptic current, paired pulse facilitation, and high-pass filtering properties were simulated by applying gate bias. The multilevel channel conductance can be modulated by successive positive and negative pulses. Additionally, small nonlinearities were shown in the potentiation and depression processes, and high accuracies of 92.0% (small digits) and 93.8% (large digits) were obtained in digital recognition training. This study indicates that oxide-gated synaptic transistors based on the boron ions doping strategy show great potential for neuromorphic applications. [ABSTRACT FROM AUTHOR]

α-Synuclein (α-Syn) is a major biomarker of Parkinson's disease (PD). Concentration detection of α-Syn in cerebrospinal fluid and plasma of patients are used as a clue for early PD detection. Herein, we propose a thin-film transistor (TFT) biosensor based on an indium gallium zinc oxide (IGZO) thin film fabricated by the sol-gel method. The IGZO TFT biosensor is used for the early detection of PD after surface functionalization for α-Syn. The surface functionalization worked on the surface of the extended gate indium tin oxide sensing platform instead of the channel layer of TFT. Depending on concentrations of α-Syn in human cerebrospinal fluid and plasma, we diluted six different concentrations of α-Syn for detection, ranging from 1 pg ml−1 to 100 ng ml−1. The result shows that the biosensor exhibits high sensitivity and selectivity for α-Syn, a reliable sensing performance with a sensitivity of 189.9 mV dec−1, and a coefficient of determination R2 of 99.7% between 10 pg ml−1 and 100 ng ml−1. [ABSTRACT FROM AUTHOR]

Emulating synaptic behavior using the three-terminal and ion-coupled transistors is considered as a promising strategy for the realization of neuromorphic devices. Meanwhile, one-dimensional (1-D) nanostructures show great potential for the fabrication of flexible electronic devices. In this work, 1-D indium oxide (In2O3) nanofibers were fabricated by the electrospinning (ES), and the flexible and compatible synaptic transistor based on In2O3 nanofibers was integrated on polyimide (PI) substrate. The synaptic behaviors, such as the short-term plasticity (STP) and long-term plasticity (LTP), are simulated by the synaptic transistor with chitosan solution as the gate dielectric. The fabricated synaptic transistor exhibits good biocompatibility and environmental compatibility, and the pattern recognition rate of the simulated device array by the Mixed National Institute of Standards and Technology (MNIST) database of the handwritten digits is confirmed to be as high as 92%. [ABSTRACT FROM AUTHOR]

Thin-film transistors (TFTs) with bilayer channels were used to improve the field-effect mobility and bias stress stability of the TFTs. Homogeneous structures were fabricated by the combination of a carrier deficient layer made of In2O3 thin film annealed in oxygen atmosphere (InO:O) and an electron injection layer made of In2O3 thin film annealed in air (InO:A). Compared with the InO:A/InO:A TFT with only air annealing, the field-effect mobility of InO:O/ InO:A TFT with two-step annealing process was improved from 0.04 to 5.11 cm2/Vs, the on/off current ratio was ameliorated from 4.6 × 105 to 7.6 × 107 A, while the VTH is decreased from 12.5 to 4.7 V under the positive bias stressing (PBS). It is confirmed that the excessive oxygen vacancies are produced by annealing the thin film in the air. The electrical performance of the InO:O/InO:A TFTs with two-step annealing process is greatly improved due to the formation of a low defect state and high carrier concentration electron transport layer, through the combination of the carrier transport layer and the carrier injection layer. These optimized electrical properties indicate an important step toward achieving transparent, high performance, and low-temperature metal oxides TFTs. [ABSTRACT FROM AUTHOR]

In this letter, high-performance thin-film transistors (TFTs), with indium oxide (In2O3) as front channel layer, high permittivity ZrO2 as dielectric layer, and aluminum oxide (Al2O3) as passivation layers were integrated by a fully solution process. It is found that the incorporation of Al2O3 passivation layer gives rise to a sharp decrease in the off current (Ioff) and a corresponding increase in the on/off current ratio ($\text{I}_{\text {on}}$ /Ioff) of the TFTs, compared to that without Al2O3 passivation. Furthermore, the thickness effect of the passivation layer on the performance of In2O3 /ZrO2 TFTs has been investigated systematically. The In2O3 /ZrO2 TFTs with optimized Al2O3 passivation layers can be operated at 3 V with high performance, including a high field-effect mobility of 21.22 cm2 /V s, a large $\text{I}_{\text {on}}$ /I off of 107 and a negligible hysteresis (~0V). This work demonstrates an effective strategy for the construction of high performance TFTs by incorporating the passivation layer. [ABSTRACT FROM AUTHOR]

Emulating the essential synaptic working principles using a three-terminal synaptic transistor has been an important research field in recent years. Electrospun metal oxide nanofibers have been regarded as promising blocks for large-area, low-cost, and one-dimensional (1D) electronic devices. In this letter, zinc-tin oxide (ZnSnO) nanofibers were fabricated by electrospinning, and the synaptic transistors based on ZnSnO nanofibers were integrated. To mimic the synaptic behavior of human brain, LiClO4 dissolved in polyethylene oxide was used as the gate electrolyte in the synaptic transistors. The plasticities, including short term and long term, are mimicked with the help of electrolyte ion dynamics under low and large bias voltage, and an energy consumption of as low as 0.44 pJ per event is observed. This work demonstrates a new approach for establishing the large-scale, energy-efficient 1D artificial synapses for neuromorphic networks. [ABSTRACT FROM AUTHOR]

Abstract: The fabrication of functionalized 1D oxide fibers with accurate control of orientation, location, and number is highly demanded and challengeable based on current techniques, which hinder their practical application in opto/electronic devices. Herein, a rapid and simple method is developed to directly draw the oxide fibers from its polymer solution over large area. The draw‐spinning method enables the accurate positioning of individual fiber and the construction of complex patterns, holding great potentials in fiber‐based electronics. The assembled field‐effect transistors (FETs) based on single indium oxide (In2O3) fiber exhibit excellent current modulation capability with a high on/off current ratio of 106. Adjusting the number of fibers within the channel, the device performance can be modulated. Moreover, the draw‐spinning technique is applied to fabricate highly aligned fiber arrays by using brush pen. The FETs based on aligned In2O3 fiber arrays exhibit superior current‐driven capability compared with the devices with limited number of fibers. Their further integrations on high‐permittivity dielectric layer show improved device performance at an operating voltage of 4 V. This method is scalable and can be implemented easily to fabricate various functional fibers in both laboratory and industrial manufacturing. [ABSTRACT FROM AUTHOR]

Solution-processed metal-oxide thin films based on high dielectric constant (k) materials have been extensively studied for use in low-cost and high-performance thin-film transistors (TFTs). Here, scandium oxide (ScOx) is fabricated as a TFT dielectric with excellent electrical properties using a novel water-inducement method. The thin films are annealed at various temperatures and characterized by using X-ray diffraction, atomic-force microscopy, X-ray photoelectron spectroscopy, optical spectroscopy, and a series of electrical measurements. The optimized ScOxthin film exhibits a low-leakage current density of 0.2 nA cm−2 at 2 MV cm−1, a large areal capacitance of 460 nF cm−2 at 20 Hz and a permittivity of 12.1. To verify the possible applications of ScOx thin films as the gate dielectric in complementary metal oxide semiconductor (CMOS) electronics, they were integrated in both n-type InZnO (IZO) and p-type CuO TFTs for testing. The water-induced full oxide IZO/ScOx TFTs exhibit an excellent performance, including a high electron mobility of 27.7 cm2 V−1 s−1, a large current ratio (IonIoff) of 2.7 × 107 and high stability. Moreover, as far as we know it is the first time that solution-processed p-type oxide TFTs based on a high-k dielectric are achieved. The as-fabricated p-type CuO/ScOx TFTs exhibit a large IonIoff of around 105 and a hole mobility of 0.8 cm2 V−1 at an operating voltage of 3 V. To the best of our knowledge, these electrical parameters are among the highest performances for solution-processed p-type TFTs, which represents a great step towards the achievement of low-cost, all-oxide, and low-power consumption CMOS logics. [ABSTRACT FROM AUTHOR]