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The trap-induced hysteresis on the performance of a graphene field-effect transistor is experimentally diminished here by applying consecutive gate-to-source voltage pulses of opposing polarity. This measurement scheme is a practical and suitable approach to obtain reproducible device characteristics. Trap-affected and trap-reduced experimental data enable a discussion regarding the impact of traps on static and dynamic device performance. An analytical drain current model calibrated with the experimental data enables the study of the trap effects on the channel potential within the device. High-frequency (HF) figures of merit and the intrinsic gain of the device obtained from both experimental and synthetic data with and without hysteresis show the importance of considering the generally overlooked impact of traps for analog and HF applications. [ABSTRACT FROM AUTHOR]

This article presents the small-signal and noise characterization of different technologies based on chemical vapor deposition (CVD) and silicon-carbide (SiC) graphene field-effect transistors (GFETs). The noise model, built on noise figure measurements under $50~\Omega $ using the F50 method, was verified by additional source-pull measurements, with special care for the GFET stability. The four noise parameters were then extracted by using the validated F50 model up to 18 GHz, and the correlations between noise and small-signal parameters were shown for two different configurations: top-gated and back-gated GFETs. [ABSTRACT FROM AUTHOR]

In this article, a detailed parameter extraction methodology is proposed for low-frequency noise (LFN) in single-layer (SL) graphene transistors (GFETs) based on a recently established compact LFN model. The drain current and LFN of two short channel back-gated GFETs (L = 300 and 100 nm) were measured at lower and higher drain voltages, for a wide range of gate voltages covering the region away from charge neutrality point (CNP) up to CNP at p-type operation region. Current–voltage (IV) and LFN data were also available from a long-channel SL top solution-gated (SG) GFET (L = 5 μm), for both p- and n-type regions near and away CNP. At each of these regimes, the appropriate IV and LFN parameters can be accurately extracted. Regarding LFN, mobility fluctuation effect is dominant at CNP, and from there, the Hooge parameter αH can be extracted, whereas the carrier number fluctuation contribution which is responsible for the well-known M-shape bias dependence of output noise divided by squared drain current, also observed in our data, makes possible the extraction of the NT parameter related to the number of traps. In the less possible case of a Λ-shape trend, NT and αH can be extracted simultaneously from the region near CNP. Away from CNP, contact resistance can have a significant contribution to LFN, and from there, the relevant parameter SΔ R2 is defined. The LFN parameters described above can be estimated from the low drain voltage region of operation where the effect of velocity saturation (VS) mechanism is negligible. VS effect results in the reduction of LFN at higher drain voltages, and from there, the IV parameter hΩ which represents the phonon energy and is related to VS effect can be derived both from drain current and LFN data. [ABSTRACT FROM AUTHOR]

In this paper, we present a fabrication process of graphene field effect transistors (GFETs) using natural oxidation of aluminum as dielectrics, which provide an alternative fabrication choice for future flexible electronics with the large scale and arbitrary substrates. The high-quality monolayer graphene is preserved by our process, and the mobility up to 3250 cm2/Vs is measured after whole device fabrication. GFETs with double bottom-gate structure varying from 300 to 100 nm in gate length have been characterized by both static and dynamic measurements. The total gate capacitances of our device structure are evaluated based on the measurement results of scattering parameters. We report an intrinsic current gain cutoff frequency (ft{\-\text {int}}) of 11 GHz and a maximum oscillation frequency (f\max ) of 8 GHz in devices with 100 nm gate length. Moreover, both the values of ft{\-\text {int}} and f\max for different gate lengths are also discussed. Our results indicate that the full process exhibits great potential, especially for graphene-based flexible electronics. [ABSTRACT FROM AUTHOR]