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We report the first ever terahertz monolithic integrated circuit amplifier based on 25-nm InP high electron mobility transistor (HEMT) process demonstrating amplification at 1 THz (1000 GHz) with 9-dB measured gain at 1 THz. This milestone was achieved with a 25-nm InP HEMT transistor, which exhibits 3.5-dB maximum available gain at 1 and 1.5 THz projected $f_{\mathrm {\mathbf {MAX}}}$ .

Due to copyright restrictions, the access to the full text of this article is only available via subscription. In this paper we discuss the design of low-noise amplifiers (LNAs) for both cryogenic and room-temperature operation in general and take the stability and linearity of the amplifiers into special consideration. Oscillations that can occur within a multi-finger transistor are studied and verified with simulations and measurements. To overcome the stability problem related to the multi-finger transistor design approach a parallel two-finger unit transistor monolithic microwave integrated circuit LNA design technique, which enables the design of wideband and high-linearity LNAs with very stable, predictable, and repeatable operation, is proposed. The feasibility of the proposed design technique is proved by demonstrating a three-stage LNA packaged in a WR10 waveguide housing and fabricated using a 35-nm InP HEMT technology that achieves more than a 20-dB gain from 75 to 116 GHz and 26-33-K noise temperature from 85 to 116 GHz when cryogenically cooled to 27 K. Jet Propulsion Laboratory, California Institute of Technology ; Oak Ridge Associated Universities under NASA Postdoctoral Program (NPP) ; Academy of Finland ; Alfred Kordel Foundation ; National Aeronautics and Space Administration

This paper reports on several solid-state power amplifier (PA) modules operating at frequencies around the 220-GHz propagation window. Included is a single module demonstrating saturated output power ≥60 mW from 205 to 225 GHz and peak output power of 75 mW at 210 GHz using eight-way on-chip power combining. The output power is further increased by using waveguide power combining with WR-4 waveguide. Results include a single two-way combined module achieving >; 100 mW of power from 210 to 225 GHz and four-way combining using two two-way combiners to reach 185 mW of output power at 210 GHz. The amplifier MMICs uses sub-50-nm InP HEMT transistors, coplanar waveguide (CPW) technology, and on-chip electromagnetic transitions to waveguide. Finally, preliminary burn-in and initial room-temperature lifetest data is shown.

In this paper, progress toward developing solid-state power-amplifier modules at 0.65 THz is reported. This work is enabled by a >;1 THz fMAX InP HEMT transistor with a 30-nm gate and an integrated circuit process specifically tailored for circuits operating at frequencies approaching 1 THz. The building block of the reported amplifier modules is an eight-stage terahertz monolithic integrated circuit (TMIC) amplifier. The first six stages of the TMIC use 20- transistors, while the final two output stages rely on two power-combined 20-μm transistors to increase the output power. For operation at 0.65 THz, the TMIC also relies on integrated electromagnetic transitions for direct coupling with the WR1.5 waveguide of the amplifier package. Two modules are reported, with the first module containing a single TMIC and demonstrating a peak saturated output power of 1.7 mW at 640 GHz with a measured small-signal gain ≥10 dB from 629 to 638 GHz. The second module features two power-combined TMICs to increase output power. This is done using a waveguide Y-junction as both the combiner and splitter. In test, this power-combined module reached a peak output power of 3 mW at 650 GHz and measured small-signal gain ≥10 dB from 625 to 640 GHz.

In this paper, background describing THz monolithic integrated circuits using InP HEMT is presented. This three-terminal transistor technology has been used to realize amplifiers, mixers, and multipliers operating at 670 GHz. Transistor and processing technology, packaging technology, and circuit results at 670 GHz are described. The paper concludes with initial results from a 670-GHz InP HEMT receiver and trends for InP HEMT components.

Pivotal in the design of circuits is the ability to efficiently translate available transistor gain to high gain per stage. Remarkably, for 35-nm InP HEMT transistors, the efficiency of this translation remains high even up to ~0.5 THz. The ever shrinking wavelength correlated with higher frequencies necessitates a scaling of not only the device layout, but also of the passive elements and wafer thickness. Furthermore, to avoid distributed effects, the length of transistor gate fingers must be reduced.

In this paper we propose a parallel two-finger unit transistor MMIC low-noise amplifier design technique which enables the design of wideband and high linearity low-noise amplifiers with very stable, predictable, and repeatable operation. We prove the feasibility of the proposed design technique by demonstrating a three-stage LNA packaged in a WR10 waveguide housing and fabricated using a 35-nm InP HEMT technology that achieves more than a 20-dB gain from 75 to 116 GHz and 26–33-K noise temperature from 85 to 116 GHz when cryogenically cooled to 27 K.

In this letter, low noise amplification at 0.67 THz is demonstrated for the first time. A packaged InP High Electron Mobility Transistor (HEMT) amplifier is reported to achieve a noise figure of 13 dB with an associated gain greater than 7 dB at 670 GHz using a high fMAX InP HEMT transistors in a 5 stage coplanar waveguide integrated circuit. A 10-stage version is also reported to reach a peak gain of 30 dB. These results indicate that InP HEMT integrated circuits can be useful at frequencies approaching a terahertz.

In this work, we report on developments toward ultra-low noise amplifier modules for the WR4 frequency range, covering 170-260 GHz. The amplifiers in question utilize 35 nm HEMT transistors on a 50 μm thick InP substrate, and were developed at NGC. While recent work in this frequency band has demonstrated the usefulness and advanced technology of utilizing integrated waveguide transitions fabricated on the high dielectric constant MMIC amplifiers themselves, we present evidence here that more standard, cost effective techniques like merging low-loss quartz probes with short wire bonds can provide excellent noise performance, even at these high frequencies. The amplifiers discussed in this paper demonstrate a record 600K noise (4.8 dB) at 220 GHz and 700K (5.2 dB) noise at 240 GHz.

This paper reports on the process and technology of the sub-50nm InP HEMT MMIC process which has enabled signal amplification up to 670 GHz. In particular, considerations not commonly addressed such as the related processing requirements and uniformity of transistors to establish working chipsets are discussed. Finally, initial burn in data is presented as the technology evolves from a research and development process to production.

Over the last few years, operating frequencies of InP HEMT Transistors have pushed above 100 GHz (1 THz). This has allowed electronic circuitry to be realized at frequencies as high as 670 GHz. In particular, Low Noise Amplifiers (LNA), Power Amplifiers (PA), mixers and multipliers have all been implemented. A result of this has been integrated circuit receivers and transmitters operating to frequencies as high as 670 GHz.

In this paper, a 210 GHz solid-state power amplifier (SSPA) module is presented. The amplifier MMIC uses sub-50 nm InP HEMT transistors, coplanar waveguide (CPW) technology, and on-chip electromagnetic transitions to waveguide. Two levels of power combining were used on-chip to achieve total transistor output periphery of 0.96 mm. The first level is a 1:4 CPW Dolph-Chebychev transformer. The second level is a two-way, novel dual transition to the waveguide. In this method, two amplifiers were placed on the MMIC die, each with independent transition to the waveguide, where their output power is combined. This method reduced the combining loss compared to traditional coupler methods. The SSPA module demonstrated saturated output power iY 60 mW from 205 to 225 GHz and peak output power of 75 mW at 210 GHz, representing a significant increase in SSPA output power at these frequencies compared to the prior state-of-the-art.

Broadband sub-millimeter wave technology has received significant attention for potential applications in security, medical, and military imaging. Despite theoretical advantages of reduced size, weight, and power compared to current millimeter-wave systems, sub-millimeter-wave systems are hampered by a fundamental lack of amplification with sufficient gain and noise figure properties. We report on the development of a sub-millimeter wave amplifier module as part of a broadband pixel operating from 300-350 GHz, biased off of a single 2V power supply. Over this frequency range, > 38 dB gain and < 8.3 dB noise figure are obtained and represent the current state-of-art performance capabilities. The prototype pixel chain consists of two WR3 waveguide amplifier blocks, and a horn antenna and diode detector. The low noise amplifier Sub-Millimeter-wave Monolithic Integrated Circuit (SMMIC) was originally developed under the DARPA SWIFT and THz Electronics programs and is based on sub 50 nm Indium Arsenide Composite Channel (IACC) transistor technology with a projected maximum oscillation frequency f max > 1.0 THz. This development and demonstration may bring to life future sub-millimeter-wave and THz applications such as solutions to brown-out problems, ultra-high bandwidth satellite communication cross-links, and future planetary exploration missions.

In this paper, we demonstrate that the cascode amplifier topology can be extended to operating frequencies > 500 GHz. Two packaged cascode amplifiers are reported, including a broadband 3 stage amplifier with ~17 dB gain and 8.3 dB packaged noise figure at 300 GHz and a narrowband amplifier with 10 dB gain at 0.55 THz measured in package. Both of these amplifiers use 30 nm InP HEMT transistors, are realized in coplanar waveguide on a 1-Mil thick InP substrate and use a monolithically integrated electromagnetic transition for coupling energy from the chip to the waveguide package.

In this paper, a 220 GHz solid-state power amplifier (SSPA) module is presented. Eight-way on-chip power combining is used to achieve a saturated output power ≥ 50 mW over a 217.5 to 220 GHz bandwidth, representing a significant increase in SSPA output power at this frequency compared to prior state of the art. The amplifier MMIC is implemented in coplanar waveguide (CPW) technology and uses sub 50 nm InP HEMT transistors. Two levels of power combining, a 2∶1 tandem coupler and a 4∶1 Dolph-Chebychev transformer, are realized in CPW. The module demonstrates ≥ 11.5 dB small signal gain from 207 to 230 GHz. Saturated output power ≥ 40 mW was measured from 216 to 222.5 GHz.

Broadband sub-millimeter wave technology has received significant attention for potential applications in security, medical, and military imaging. Despite theoretical advantages of reduced size, weight, and power compared to current millimeter wave systems, sub-millimeter wave systems have been hampered by a fundamental lack of amplification with sufficient gain and noise figure properties. We report a broadband pixel operating from 300 to 340 GHz, biased off a single 2 V power supply. Over this frequency range, the amplifiers provide > 40 dB gain and 1.0 THz. The first sub-millimeter wave-based images using active amplification are demonstrated as part of the Joint Improvised Explosive Device Defeat Organization Longe Range Personnel Imager Program. This development and demonstration may bring to life future sub-millimeter-wave and THz applications such as solutions to brownout problems, ultra-high bandwidth satellite communication cross-links, and future planetary exploration missions.