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The optimization of traditional FTL(Flash Translation Layer) algorithm is mainly aimed at the average response time of flash memory read and write operation on a flash chip, because of the Out-of-place update, traditional FTL algorithm writes data in a new free page each time, and a new block is assigned when a block is full. Therefore, when the flash memory is almost full, a written request will lead to a garbage collection, in which there will be many write copies, which will lead to a significant decrease in response time. In this paper, we optimize the traditional FTL algorithm and propose an FTL algorithm that guarantees real-time performance by shortening the worst response time of the request as a measure of the guaranteed flash Qos (Quality of Service) under the condition that the address mapping is provided the upper layer. The algorithm adopts the idea of space-for-time and spreads the written copy of flash memory to each write request so that the worst response time of the write request is significantly reduced. The algorithm also wears balancing considerations to the algorithm. After experimental verification, the proposed algorithm has advantages over existing FTL algorithms in terms of real-time performance and has a performance improvement of more than 11% in terms of average response time and wear balance. By the way, we add the wear-level module into an algorithm. According to improving the algorithm, the worst response time has shorten 47.6%. [ABSTRACT FROM AUTHOR]

This paper mainly focuses on the I/O cache of the server layer device of the network block device in the embedded background. It proposes a method focusing on different read/write loading features, configuring the cache capacity ratio utilized for isolated processing reading data and writing data, and an algorithm for automatically analyzing sequential addressing writing and random addressing writing data streams. The effectiveness of the algorithm for automatically analyzing sequential addressing writing and random addressing writing data streams is verified by experiments. The experimental results show that according to the different interleaving conditions of the data stream, the proportion of the data stream can be written in sequential addressing, which can be different in all input data streams. After separating sequential data streams interleaved by three inputs, the percentage of data streams written in sequential addressing is significantly increased by 50%. [ABSTRACT FROM AUTHOR]

The dramatic increase of storage devices in distributed storage cluster system and the inherent characteristics of distributed deployment mode make network resources become one of the bottlenecks of data storage process. By analyzing the functional characteristics of data flow transmission of the components of the storage system, the network topology structure of the storage system is constructed, and the evaluation index of node flow load is put forward based on the degree centrality and the betweenness centrality theory of the network to explore the network topology and real-time flow characteristics. According to the evaluation index of node flow load, a network-aware data layout scheme is proposed. By balancing the flow load of bottleneck link, congestion and transmission delay can be reduced to further shorten the total task execution time and improve the efficiency of data writing. [ABSTRACT FROM AUTHOR]