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In this work, the excimer-laser-induced crystallization of a-Si films on SiO2 was investigated using a long-pulse-duration (200 ns) XeCl source. The microstructural analysis of the laser-irradiated area, for incident energy densities comprised between the thresholds corresponding to the surface and full melting, respectively, of the Si layer, was performed by scanning electron microscopy and Raman spectroscopy. A super-lateral-growth regime was evidenced quite comparable to that which occurs when classical excimer laser pulses of short duration (≈20 ns) are used. A numerical simulation of the surface melt dynamics was also performed and compared to the experimental observations.

The purpose of this work is twofold: (i) to study the damage induced by ion implantation, with special attention to low implanted doses; (ii) to study the efficiency of annealing techniques — particularly incoherent light annealing — in order to relate the electrical activity of implanted atoms to damage annealing. We have used three methods to study the damage induced by ion implantation: (1) RBS (or nuclear reactions) in random or in channeling geometry (2) RX double crystal diffractometry and (3) electrical measurements (free carrier profiling). Damage induced by silicon implantation at doses >10 14 at/cm 2 can be monitored by all three techniques. However, the sensitivity of RBS is poor and hence this technique is not useful for low implantation doses. As device technology requires dopant levels in the range of 5 × 10 12 atoms/cm 2 , we are particularly interested to the development of analytical techniques able to detect the damage at this implantation level. The sensitivity of such techniques was checked by studying homogeneously doped (5 × 10 16 e − /cm 3 ) and semi-insulating GaAs samples implanted with 3 × 10 12 silicon atoms/cm 2 at 150 keV. The substrate temperature during implantation was 200°C. The damage produced in these samples and its subsequent annealing are evidenced by strong changes in X-ray double crystal diffraction spectra. This method hence appears as a good monitoring technique. Annealing of the implanted layers has been performed using incoherent light sources (xenon lamps) either in flash or continuous conditions. Reference samples have also been thermally annealed (850°C, 20 min in capless conditions). The results are compared, and the electrical carrier profiles obtained after continuous incoherent light irradiation indicate that the implanted silicon atoms are almost dully activated. The advantages and disadvantages of incoherent light irradiation are discussed (surface oxidation, surface damage) in comparison with standard thermal treatment.

(100) heteroepitaxial Silicon films with thicknesses in the 0.4-1 μm range have been deposited onto single-crystal substrates of yttria-stabilized zirconia (YSZ) by pyrolysis of SiH 4 at ≈ 980° C. Using the well-known oxygen transport properties of YSZ, we have subsequently been able to grow a buried thermal SiO 2 layer at the Si-YSZ interface, resulting in a Si(100)/amorphous SiO 2 /YSZ(100) structure, in which the most defective part of the initial epitaxial film has been eliminated. The interface SiO 2 layers have been characterized by Rutherford backscattering spectroscopy and scanning electron microscopy. The oxygen transport mechanism through the YSZ substrate is also briefly discussed.

(100) single crystal silicon films have been deposited on (100) oriented yttria stabilized zirconia (YSZ) single crystal substrates. Taking advantage of the high‐temperature oxygen ion and electronic transport properties of YSZ material, we have subsequently grown buried SiO2 layers (with thicknesses in the 1000‐A range) at the Si/YSZ interface, the result being a Si(100)/a‐SiO2/YSZ (100) structure. Since, similarly to silicon films on sapphire, the planar defect density in as‐deposited material is highest at the Si/substrate interface, the oxidation process results in an overall increase of the crystalline quality of the epi‐Si deposits. We present here our first results of thermal and anodic oxidation of the interface. The buried SiO2 layers have been characterized by Rutherford backscattering spectroscopy and scanning electron microscopy on chemically delineated cross sections. Thermal oxidation has been performed at typically 1150 °C with oxygen pressures ranging from 10−1 to 2 atm. In our operating c...

The selective growth of GaAs by HVPE was studied on (001), (110), (111)Ga and (111)As, GaAs patterned substrates by varying the I1I/V ratio. A kinetic modelling of the growth was developed, based upon the SEM observations of the growth morphologies as well as on experimental curve synthesis. The growth rate is written as a function of the diffusion fluxes of the adsorbed AsGa and AsGaCI molecules and takes into account the chlorine desorption by H2. 1.5 μm thick GaAs films were then fabricated on Si (001) by a confined epitaxial lateral overgrowth technique. These conformal films exhibit intense and uniform luminescence signals, showing that the dislocation densities of GaAs are lower than 105 cm−2. SEM analyses reveal that conformal growth fronts consist in (110) and (111)As A planes under the III/V ratios (superior to 1) which were tested.

Direct-view active matrix liquid crystal displays (AMLCDs) are now fabricated in very large volumes using amorphous silicon (a-Si:H) technology. For this purpose, high temperature polysilicon technology is currently used in Japan, with the active matrix fabricated on a quartz substrate. However, quartz substrates of display quality are rather expensive and low temperature polysilicon technology on glass substrates using laser annealing has been introduced as one possible alternative. Recently the transfer of single-crystalline Si layers on glass has been reported. In this case, circuits are fabricated on SOI substrates obtained by a zone melting recrystallisation process and transfered on the glass after completion of almost all the processing steps. This technique is of interest, as high temperature processing steps and fine design rules can be utilized. The main drawback of the technique is that the transfer operation is the final step. We propose an alternative and new technique based on the transfer before processing of a single crystalline Si layer on glass. Processing is subsequently performed at low temperature, using technological steps developed for the fabrication of low temperature polysilicon devices. A SIMOX substrate is thermally oxydized and then bonded at 450/spl deg/C to the glass substrate (Corning 7059 or 1737). The silicon substrate and the thin buried oxide are then removed by a combination of mechanical and chemical etching.

Polycrystalline silicon TFT technology is rapidly emerging for large-area electronic applications, because of the relatively large mobility values of charge carriers with respect to the corresponding values in amorphous silicon. In contrast, because of the complex energy distribution of localized states within the energy gap, and the resulting space-charge effects, the TFT electrical characteristics are difficult to model, and a numerical approach is needed in order to better understand the physical effects which influence the device performances. In this article we perform numerical simulations of TFTs at different temperatures under static and dynamic conditions and, by fitting experimental data, extract the energy distribution and the capture cross-section of the grain-boundary traps and the parameters of the impact-ionization model. As opposed to single-crystal silicon SOI devices, we find that the TFT current and transconductance increase as temperature increases.