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164 results on '"Wilson, Ron"'

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1. Quality offers 100 Base TX PHY chip

2. ADI extends Blackfin DSP for high-speed video

3. Rad-tolerant FPGA preps for launch

4. QualCore rolls a pair of interface cores

5. Faraday platform targets Layer 4 to 7 switching -- Platform-ASIC-based design taps all-digital serdes block, metal-configured logic

7. Super I/O chip aims at embedded

16. Arteris spins packet-based on-chip net IP

21. IDT rolls chips to handle data flow management -- Device family allows use of double-data-rate DRAM for broadband comms data

22. Zilog adds a few more features to its Z8 Encore! family

27. XPLD line bending barriers on size, cost and definition

29. Nanowatt MCUs pack peripherals

30. LSI Logic puts ASIC design on the fast track

31. Infineon blends USB, HDLC on MCU

32. Genesis tailors gmD2000 for better pictures, richer color -- NTSC decoder promises quality in, quality out

33. VLSI supplies chips for telecom

34. Cypress line challenges logic, memory-count marks -- CPLDs expand in densities

35. Flash rides Microchip MCUs

36. Pentium chip sets go mobile

37. Silicon packs 4 DSP engines

38. 'Web-aware' MPUs roll

39. DEC primes video for Pentium

40. ATI shows video strategy

41. Confab sees MCU activity

42. LSI readies 0.35-micron ASIC process

43. Xilinx announces sea-of-gates FPGA

44. Embedded CPUs spar

45. S3 rolls MPEG chip set

46. Altera puts memory into its Flex PLDs

47. Mini-RISC chips debut; Motorola, ARM target embedded applications

48. CPLDs, FPGAs converge

49. 0.35(micron)-ASIC battle brews

50. PLD makers target arrays

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