164 results on '"Wilson, Ron"'
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2. ADI extends Blackfin DSP for high-speed video
3. Rad-tolerant FPGA preps for launch
4. QualCore rolls a pair of interface cores
5. Faraday platform targets Layer 4 to 7 switching -- Platform-ASIC-based design taps all-digital serdes block, metal-configured logic
6. LSI Logic takes aim at PCI Express -- RapidChip structured ASICs tackle high-speed interface
7. Super I/O chip aims at embedded
8. Two A/D converters push architectural limits -- Parts set new standards of performance for ADI
9. TSMC focuses reference flow on power closure -- Version 5.0 has new tools, separate voltage islands and many unanswered questions
10. SMSC card readers support multiple standards -- Attached to USB 2.0, chips work with internal or external memory, provide speed ramp
11. IP marriage begets integrated SoC -- PMC, QED pairing yields CPU design with ASSP traits
12. Rambus offers interface IP for DDR, DDR2 DRAMs -- Two families will cover bulk memory, consumer/graphics
13. Cradle rolls 30-frame/s H.264 codec -- Turnkey package targets developers of Ethernet videoconferencing gear
14. Cypress plans bigger, faster, cheaper PSoC chips -- Three new subfamilies of programmable cores poised for debut by year's end
15. Broadcom preps Gbit Ethernet for small business -- As costs drop, can a push for home markets be far behind?
16. Arteris spins packet-based on-chip net IP
17. ARC bills latest CPU core as central processor -- Built at 130 nm, the compact 400-MHz ARC 700 boasts a number of design tweaks
18. IP core taps varied storage interfaces -- Palmchip provides IDE/ATA, CF, CF+, PCMCIA protocols from a single controller
19. ARC platform adds digital audio cluster, tools -- Customizes execution units for app-specific performance
20. Audio chip aims at loaded cell phones -- Wolfson Microelectronics rolls highly integrated IC promising hi-fi handsets
21. IDT rolls chips to handle data flow management -- Device family allows use of double-data-rate DRAM for broadband comms data
22. Zilog adds a few more features to its Z8 Encore! family
23. Cypress Semi tunes up its line of SoCs -- Programmable IC has 16 kbytes of flash, 24-MHz MCU
24. Wafer-bonding technique yields new materials -- Room-temperature process enables covalent bonding, eliminating need for adhesives
25. Ramtron rolls out 4-kbit FRAM at 0.35 micron -- It supports continuous reading, writing at up to 20 MHz via an SPI interface
26. Headphone amp gives a boost to D/A -- Part builds on iPod work to up audio quality while cutting quiescent power
27. XPLD line bending barriers on size, cost and definition
28. Virage pulls back the covers to detail platforms -- Playing to its strengths, core vendor emphasizes I/O cells, memory tools, logic libraries
29. Nanowatt MCUs pack peripherals
30. LSI Logic puts ASIC design on the fast track
31. Infineon blends USB, HDLC on MCU
32. Genesis tailors gmD2000 for better pictures, richer color -- NTSC decoder promises quality in, quality out
33. VLSI supplies chips for telecom
34. Cypress line challenges logic, memory-count marks -- CPLDs expand in densities
35. Flash rides Microchip MCUs
36. Pentium chip sets go mobile
37. Silicon packs 4 DSP engines
38. 'Web-aware' MPUs roll
39. DEC primes video for Pentium
40. ATI shows video strategy
41. Confab sees MCU activity
42. LSI readies 0.35-micron ASIC process
43. Xilinx announces sea-of-gates FPGA
44. Embedded CPUs spar
45. S3 rolls MPEG chip set
46. Altera puts memory into its Flex PLDs
47. Mini-RISC chips debut; Motorola, ARM target embedded applications
48. CPLDs, FPGAs converge
49. 0.35(micron)-ASIC battle brews
50. PLD makers target arrays
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