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This article presents a quasi-load insensitive (QLI) Doherty power amplifier (DPA). The proposed theory makes the amplifier load insensitive in terms of output power, while its efficiency is slightly degraded for complex loads. The load insensitiveness is achieved by dynamically changing the supply voltages ( ${V_{DD}}$ ) and the input power splitting for both the carrier and peaking transistors. The optimal, load-dependent, ${V_{DD}}$ values are theoretically derived from back-off (BO) and full power conditions using load line theory. The optimal input excitation signals for the carrier and peaking devices are also derived for these variable ${V_{DD}}$ conditions. A 3.6-GHz QLI DPA was designed, and a complete system, composed of the DPA output stage, a two-channel medium power driver, an adaptive input driving stage, and a load sensing system, was implemented. The laboratory measurements have been performed for loads distributed inside a 2.0 maximum voltage standing wave ratio (VSWR) circle and show an output power variation between 43.8 and 42.6 dBm and a BO efficiency between 50% and 35%. Under modulated signal excitation, for the worst case loads, the peak output power capability of the DPA is improved from 41.7 to 43.1 dBm, and the average efficiency is increased from 32.6% to 43%.

This work presents a new artificial neural network (ANN) model formulation for RF high-power transistors which includes the S-parameters of the active device. This improves the small-signal extrapolation capability, and the OFF-state impedance approximation, making it suitable for Doherty power amplifier (DPA) design. This extrapolation capability plays a key role in the correct Doherty load modulation prediction, since, at low power levels, the peaking PA is subjected to active loads that cannot be synthetized with a passive load-pull system, forcing the model to extrapolate. Thus, the proposed model formulation is able to solve the issues that are normally observed when ANN-based models are used in complex PA architectures as the Doherty PA. To validate the proposed behavioral model, a 700-W asymmetrical LDMOS DPA, centered at 1.84 GHz, was simulated and measured.

This article presents an automatic system that is able to dynamically restore the output power capability of a power amplifier (PA) under variable loading scenarios. This is accomplished by dynamically adapting the supply voltage, ${V_{\mathrm{ DD}}}$ , of the PA according to the developed theoretical model. To dynamically vary ${V_{\mathrm{ DD}}}$ , a GaN dc–dc converter, based on the commercial EPC 9067 Demo Board, was used. The load is measured using an impedance meter, which is based on the slotted line principle and was specifically designed for low insertion loss. This impedance meter also generates a load-dependent pulsewidth modulated signal that controls the dc–dc converter switching, regulating ${V_{\mathrm{ DD}}}$ . The prototype was designed for 3.55 GHz and tested with CW and modulated signal excitations, being able to compensate the output power degradation under variable loading conditions inside a 2.1 voltage standing wave ratio circle. For a constant gain compression level, the average efficiency degradation over the tested range of impedances is less than 5%, and the average power improvement is 0.7 dB. The worst case measured output power of the PA is compensated from 37.0 to 39.9 dBm, which corresponds to a 2.9 dB improvement. Using a modulated signal excitation, the peak envelope power, which is compressed by almost 3 dB without ${V_{\mathrm{ DD}}}$ compensation, is restored, and the average output power is improved by 0.6 dB. The system can track the load and adjust ${V_{\mathrm{ DD}}}$ with a worst case step-up delay of 25 ms.

Charge-trapping phenomena in radio-frequency (RF) power amplifiers (PAs) based on GaN high-electron-mobility transistor (HEMT) technology are understood to be responsible for the dynamic self-biasing behavior that leads to a seemingly intractable slow dynamic residual nonlinearity in communications applications. For this reason, and based on recent developments in the characterization and modeling of charge-trapping phenomena, in this article we demonstrate how the dynamic self-biasing behavior of GaN HEMT-based PAs can be characterized, modeled, and compensated. First, we describe a method for the accurate characterization of the capture and emission dynamics of charge-trapping phenomena using transient two-tone large-signal RF measurements. Then, we demonstrate that the accurate modeling of these phenomena is contingent on the capture process being described by a state-variable time constant, rather than a fixed near-instantaneous time constant as is typically assumed. Finally, we propose a fully analog electronic circuit that implements an approximation of the Shockley–Read–Hall (SRH) statistics-based physical model of charge trapping to compensate the dynamic self-biasing behavior of a 15 W GaN HEMT-based PA.

In this article, we present an analog circuit for the compensation of long-term memory effects in power amplifiers (PAs) based on GaN high-electron-mobility transistors (HEMTs). The analog compensation circuit (ACC) is supported on a charge-trapping behavioral model that features a state-dependent variable emission time constant, rather than a fixed emission time constant. This allows not only for the more accurate modeling and compensation of the nonlinear long-term memory effects experienced by GaN HEMT-based PAs, but also for the adaptation of the dynamics of the ACC to varying operating conditions, such as the ambient temperature. We demonstrate that the proposed ACC is able to successfully eliminate any multiple-time-constant transient symptom of current collapse following a high-power radio-frequency pulse or two-tone excitation and accurately preserve the class of operation of a GaN HEMT-based PA. Moreover, we also demonstrate that the proposed ACC can aid the linearization of GaN HEMT-based PAs for fifth-generation (5G) New Radio (NR) communications, allowing for the reduction in the complexity of the digital predistorter. For a 5G NR time-division duplexing signal with a bandwidth of 20 MHz, the inclusion of the ACC improved out-of-band emissions by over 15 dB and improved the error-vector magnitude by over 10 p.p. at essentially no cost to the PA’s power-added efficiency.

Pulsed radar amplifiers are known to present severe long-term memory effects in their pulse-to-pulse stability. These are usually attributed to electrothermal dynamics or to trapping effects originated in gallium-nitride (GaN) HEMTs. Expanding on our previous work where we devised a method for determining a suitable dynamic variation in the HEMT’s gate–source voltage for compensating these long-term memory effects in single-ended amplifiers, in this article, we present a feed-forward model to calculate this compensation signal in real-time pulsed radar applications.

Every new generation of mobile systems should provide higher capacity, serve more users, be more energy efficient, and have lower cost. Radio-access hardware constitutes a major bottleneck for reaching these goals, which is a particularly noticeable issue now that 5G communication systems are being developed. A combination of breakthroughs in communication theory-as in massive multiple input/multiple output (MIMO) [1], highly integrated semiconductor and packaging technologies, and extended spectrum allocations- has enabled a paradigm shift in the way radio hardware will be realized. Today's high-power, fewantenna, sectorized systems will soon be replaced with highly integrated active antenna systems having up to hundreds of individually driven low-power radios operating with very wideband signals.

In this paper, we describe a hybrid analog/digital linearization scheme for GaN high-electron-mobility transistor (HEMT)-based power amplifiers that consists of a novel analog feedforward circuit and a conventional generalized memory polynomial (GMP) digital predistorter (DPD). The analog circuit implements a nonlinear filter that compensates the long-term memory effects observed in GaN HEMTs due to the self-biasing behavior caused by electron-trapping phenomena. Experimental tests demonstrate that this linearization scheme achieves a level of intermodulation distortion 6.8 dB better than what can be achieved with just the use of the GMP DPD. This level of distortion is in compliance with the linearity specifications for multicarrier Global System for Mobile communications base station transmitters.

Modern and future transmitter architectures are being driven toward multi-input multi-output (MIMO) transceivers, which make use of several radio frequency (RF) power amplifiers (PAs) to drive an antenna array. When moving to high integration scenarios, as is expected for fifth-generation communications, the isolation between the array and the PAs is often removed. Since the array elements are electromagnetically coupled, the waves fed to the antennas are also driving the output ports of the PAs. This effect creates an apparent variable load at the output of each PA, depending on the operation of the transmitter. In this system, the behavior of each PA cannot be fully described solely as a function of its input, as it will change according to the coupled signal. To predict and understand the behavior of these MIMO systems, simulation becomes a powerful tool. These simulators should be able to reproduce the main figures of merit (FoMs) of the transmitter, namely, output power, distortion, and efficiency. In this paper, we show how a recently proposed dc behavior model and an RF signal behavior model can be used in simulation setups to predict the MIMO transmitter FoMs of interest.

The long-term memory effects of gallium nitride (GaN) transistors have prevented its use in situations where the modulated envelope signal has a wide amplitude variation over time, such as in time division duplex systems. These long-term memory effects are generally attributed to electron trapping in GaN high electron-mobility transistors (HEMT), which have shown to be very difficult to compensate, especially in cellular base station transmitters known to be subjected to highly restrictive linearity specifications. On top of the electron trapping effects, we show that thermal effects can also induce long-term memory behaviors, which should also be accounted for when linearizing these devices. Because the conventional behavioral modeling approach has been incapable to compensate these long-term memory effects on GaN HEMT-based power amplifiers (PAs), we started by investigating the physical mechanisms responsible for these semiconductor impairments in GaN devices. This physics-based knowledge was then used to design new predistorter models that could effectively compensate those PAs subjected to GaN trapping and thermal effects. In this paper, we describe the new predistortion models for PA linearization, as well as the characterization methods used to determine their parameters. To validate the linearization effectiveness of the proposed model, several high power GaN-based PAs are tested with multicarrier GSM signals, and their linearization results are compared against other state-of-the-art models, evidencing a clear and significant improvement. In fact, to the authors’ knowledge, the proposed approach is the first one to reduce the PA distortion effects due to GaN long-term memory effects to such low levels, allowing a comfortable compliance with the imposed linearity masks.

In this paper, a new architecture for designing tunable single- and dual-band radio-frequency fully digital transmitters is proposed and validated. The proposed architecture excels the state of the art in terms of simplicity and flexibility. While its short critical path leverages the use of equivalent polyphase decomposition techniques to increase the global system’s sampling frequency, the capability of changing the system’s frequency response in real time enables its use in both single- and dual-band transmission scenarios. To mitigate a crosstalk in the dual-band scenario, a precompensation technique is also proposed. This novel concept has been successfully validated in a field-programmable gate array (FPGA) based transmitter. To validate both the proposed transmitter as well as the precompensation mechanism, spectrum and error-vector magnitude (EVM) measurements were obtained for two scenarios with a carrier frequency of 2.5 GHz: 1) single-band, using quadrature phase-shifting keying (QPSK), 16-quadrature amplitude modulation (QAM) and 64-QAM, with no intermediate frequency (IF), for different symbol rate (SR) values (from 3.125 up to 15.625 Msps) and 2) single- and dual-band, using QPSK and 16-QAM, with an SR of 3.125 Msps, for different IF values (from 2 up to 120 MHz). All the experimental results present EVM values below 2.6%, resulting in a well-defined constellation.

Power efficiency is one of the main concerns in modern radio frequency (RF) power amplifier (PA) design. However, efficiency-driven designs typically impose operation of these devices in a compressed mode [1]. When operating in this region, the amplifiers will behave nonlinearly and produce a distorted output signal [1]. This distortion produces new spectral components at the PAs' output that are outside the bandwidth of the input signal, so the distorted output signal has a wider bandwidth than the input signal. This bandwidth enlargement effect, called "spectral regrowth," is undesired in RF transmitters due to wireless systems' spectral mask regulations [2].

Traditionally, power amplifier behavioral modeling and digital predistortion have been based on polynomials or Volterra series. Recently, however, there has been a trend to substitute polynomial representations by interpolated lookup tables (LUTs) because of the known problems associated with the series' identification. These problems, commonly recognized as ill-conditioning, are generally related to the poor orthogonality verified in the polynomial basis functions for many common input signals. However, in this paper we will show that polynomials can be reformulated to achieve the identification quality of interpolated LUTs, while maintaining their beneficial properties. At the same time we will provide a unified view between polynomial and spline interpolation basis functions. By doing this we will present polynomials that share the benefits of spline interpolated LUTs and argue that both descriptions can be used interchangeably and with similar advantages.