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The potential for using the degraded beam of high-energy proton radiation sources for proton hardness assurance testing for ICs that are sensitive to proton direct ionization effects are explored. SRAMs were irradiated using high energy proton radiation sources (\sim 67-70~MeV). The proton energy was degraded using plastic or Al degraders. Peaks in the SEU cross section due to direct ionization were observed. To best observe proton direct ionization effects, one needs to maximize the number of protons in the energy spectrum below the proton energy SEU threshold. SRIM simulations show that there is a tradeoff between increasing the fraction of protons in the energy spectrum with low energies by decreasing the peak energy and the reduction in the total number of protons as protons are stopped in the device as the proton energy is decreased. Two possible methods for increasing the number of low energy protons is to decrease the primary proton energy to reduce the amount of energy straggle and to place the degrader close to the DUT to minimize angular dispersion. These results suggest that high-energy proton radiation sources may be useful for identifying devices sensitive to proton direct ionization. [ABSTRACT FROM AUTHOR]

Radiation effects are presented for the first time for vertically integrated 3 \times 64-kb SOI SRAM circuits fabricated using the 3D process developed at MIT Lincoln Laboratory. Three fully-fabricated 2D circuit wafers are stacked using standard CMOS fabrication techniques including thin-film planarization, layer alignment and oxide bonding. Micron-scale dense 3D vias are fabricated to interconnect circuits between tiers. Ionizing dose and single event effects are discussed for proton irradiation with energies between 4.8 and 500 MeV. Results are compared with 14-MeV neutron irradiation. Single event upset cross section, tier-to-tier and angular effects are discussed. The interaction of 500-MeV protons with tungsten interconnects is investigated using Monte-Carlo simulations. Results show no tier-to-tier effects and comparable radiation effects on 2D and 3D SRAMs. 3DIC technology should be a good candidate for fabricating circuits for space applications. [ABSTRACT FROM PUBLISHER]